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3.3V CMOS 16-BIT IDT74LVCH16543A REGISTERED TRANSCEIVER WITH 3-STATE O


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IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
3.3V CMOS 16-BIT IDT74LVCH16543A REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, VOLT TOLERANT I/O, BUS-HOLD
Typical tSK(0) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 0.635mm pitch SSOP, 0.50mm pitch TSSOP 0.40mm pitch TVSOP packages Extended commercial range -40°C +85°C 3.3V ±0.3V, Normal Range 2.7V 3.6V, Extended Range CMOS power levels (0.4µ typ. static) inputs, outputs Volt tolerant Supports insertion
DESCRIPTION
LVCH16543A 16-bit registered transceiver built using advanced dual metal CMOS technology. LVCH16543A used 8bit transceivers 16-bit transceiver. Separate latch-enable (LEAB LEBA) output-enable (OEAB OEBA) inputs provided each register permit independent control either direction data flow. A-to-B enable (CEAB) input must order enter data from port output data from port. LEAB controls latch function. When LEAB low, latches transparent. subsequent lowto-high transition LEAB puts latches storage mode. OEAB performs output enable function port. Data flow from port port similar requires using CEBA, LEBA, OEBA inputs. Flow-through organization signal pins simplifies layout. inputs designed with hysteresis improved noise margin. pins this 16-bit registered transceiver driven from either 3.3V devices. This feature allows this device translator mixed 3.3V/5V supply system. LVCH16543A been designed with 24mA output driver. This driver capable driving moderate heavy load while maintaining speed performance. LVCH16543A "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
Drive Features LVCH16543A: High Output Drivers: ±24mA Reduced system switching noise
APPLICATIONS:
3.3V mixed voltage systems Data communication telecommunication systems
Functional Block Diagram
OEBA CEBA
OEBA CEBA
LEBA OEAB CEAB LEAB
LEBA OEAB CEAB LEAB
SEVEN OTHER CHANN
SEVEN OTHER CHANN
1999 Integrated Device Technology, Inc.
JULY 1999
DSC-4612/-
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
CONFIGURATION
OEAB LEAB
ABSOLUTE MAXIMUM RATINGS
OEBA LEBA
Unit
Link
Symbol VTERM(2) VTERM(3) TSTG IOUT
Description Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Current through each
Max. +6.5 +6.5 +150 ±100
SO56-1 SO56-2 SO56-3
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25OC, 1.0MHz)
Symbol COUT CI/O Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
Link
LEAB OEAB
LEBA OEBA
NOTE: applicable device type.
FUNCTION TABLE (each 8-bit section)(1,2)
SSOP/ TSSOP/ TVSOP VIEW
Inputs xCEAB xLEAB xOEAB Latch Status Storing Storing Transparent Storing Transparent Storing Storing Output Buffers High High Current Inputs Previous(3) Inputs High High Recommended
DESCRIPTION
Names xOEAB xOEBA xCEAB xCEBA xLEAB xLEBA Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs B-to-A 3-State Outputs(1) B-to-A Data Inputs A-to-B 3-State Outputs(1)
NOTE: These pins have "Bus-hold". other pins standard inputs, outputs, I/Os.
1998 Integrated Device Technology, Inc.
NOTES: HIGH Voltage Level Voltage Level Don't Care A-to-B data flow shown; B-to-A flow control same, except using xCEBA, xLEBA xOEBA. Before xLEAB LOW-to-HIGH Transition
DSC-123456
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: -40OC +85OC
Symbol IOZH IOZL IOFF ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input Leakage Current High Impedance Output Current (3-State Output pins) Input/Output Power Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 5.5V 2.3V, 18mA 3.3V 3.6V 5.5V(2) Quiescent Power Supply Current Variation input 0.6V other inputs
Link
Test Conditions 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 5.5V 5.5V
Min.
Typ.(1)
Max.
Unit
NOTES: Typical values 3.3V, +25°C ambient. This applies disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
Link
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current
3.0V 2.3V 3.6V
Test Conditions 2.0V 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max.
Unit
NOTES: Pins with Bus-hold identified description. Typical values 3.3V, +25°C ambient.
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 12mA Min. 24mA 0.1mA 12mA 2.7V 3.0V 12mA 24mA Max. 0.55
Link
Unit
2.3V 2.3V 2.7V 3.0V 3.0V Output Voltage 2.3V 3.6V 2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C +85°C.
OPERATING CHARACTERISTICS, 3.3V 0.3V, 25°C
Symbol Parameter Power Dissipation Capacitance Transceiver Outputs enabled Power Dissipation Capacitance Transceiver Outputs disabled Test Conditions 0pF, 10Mhz Typical Unit
SWITCHING CHARACTERISTICS
Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSK(o) Parameter Propagation Delay Transparent Mode Propagation Delay xLEBA xAx, xLEAB Output Enable Time xCEBA xCEAB Output Enable Time xOEBA xOEAB Output Disable Time xCEBA xCEAB Output Disable Time xOEBA xOEAB Set-up Time, data before Set-up Time, data before Hold Time, data after Hold Time, data after Pulse Width xLEBA xLEAB, xCEBA xCEAB Output Skew(2)
2.7V 3.3V±0.3V
Min.
Max.
Min.
Max.
Unit
NOTES: test circuits waveforms. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
TEST CIRCUITS WAVEFORMS TEST CONDITIONS PROPAGATION DELAY
Symbol VLOAD VCC(1)= 3.3V ±0.3V VCC(1) 2.7V VCC(2)= 2.5V ±0.2V Unit
Link
ITIO ITIO
Link
TEST CIRCUITS OUTPUTS
ulse enerator
ENABLE DISABLE TIMES
ITCH ALLY ITCH ALLY
Link DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator.
NOTE: Pulse Generator Pulses: Rate 10MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 10MHz; 2ns; 2ns.
NOTE: Diagram shown input Control Enable-LOW input Control Disable-HIGH.
SET-UP, HOLD, RELEASE TIMES
Link
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other tests Switch VLOAD
Open
Link
OUTPUT SKEW
PULSE WIDTH
Link
NOTES: Link tSK(o) OUTPUT1 OUTPUT2 outputs. SK(b) OUTPUT1 OUTPUT2 same bank.
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
ORDERING INFORMATION
Bus-Hold Family XXXX Device Type Package Temp. Range
543A
Shrink mall Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) 16-Bit Registered Transceiver with 3-State Outputs, Tolerant Double-Density with Resistors, ±24mA
Bus-hold -40°C +85°C
CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054
SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com*
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