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NTSC-Timing Operation Solid-State Reliability Color Monochrome Operati


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SN28835 1/2-INCH NTSC TIMER
NTSC-Timing Operation Solid-State Reliability Color Monochrome Operation Four Selectable-Antiblooming Modes Variable-Integration-Time Option Surface-Mount Package Clamp-Pulse Select Option Horizontal Vertical Resets External Synchronization
PACKAGE (TOP VIEW)
GT1/SH3 GT3/SH2
description
SN28835 monolithic integrated circuit designed supply timing signals Texas Instruments (TITM) 8-mm TC242/TC244 color TC243/TC245 monochrome image sensors. SN28835 supplies both CCD-drive signals NTSC-television synchronization signals standard video rates. requires single supply voltage 14.318-MHz crystal-oscillator input. SN28835 provides user with several options including multiple antiblooming modes, variable-integration time, external synchronization, delayed horizontal transfer.
BCP1 BCP2 CSYNC CBLK SC(90) ABS0 ABS1
MODE ABIN
SN28835 designed drive image sensor through intermediary level-shifting devices such TMS3473B parallel driver SN28846 serial driver. also supplies sample-and-hold signals TL1593 3-channel sample-and-hold circuit multiplex signals TL1051 video preprocessor. SN28835 NTSC synchronization-signal outputs include composite sync, composite blank, clamp, subcarrier, subcarrier delayed degrees, burst flag. SN28835 supplied 44-pin plastic flat package characterized operation from -20°C 45°C.
This device contains circuits protect inputs outputs against damage high static voltages electrostatic fields. These circuits have been qualified protect this device against electrostatic discharges (ESD) according MIL-STD-883C, Method 3015; however, precautions should taken avoid application voltage higher than maximum-rated voltages these high-impedance circuits. During storage handling, device leads should shorted together device should placed conductive foam. circuit, unused inputs should always connected appropriated logic voltage level, preferably either ground. Specific guidelines handling devices this type contained publication Guidelines Handling (ESDS) Devices Assemblies available from Texas Instruments. trademark Texas Instruments Incorporated.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
POST OFFICE 655303
DALLAS, TEXAS 75265
HIGH WHTA VGATE HGATE CLK2M
Copyright 1991, Texas Instruments Incorporated
SN28835 1/2-INCH NTSC TIMER
functional block diagram
Oscillator 14.318 Divide 2.045
CLK2M
Divide Phase Shift
SC(90)
Horizontal Counter
Vertical Counter
Decoder
BCP1 BCP2 CSYNC CBLK VGATE HGATE WHTA
Clock Generator
Antiblooming Generator ABS0 ABS1
ABIN
Serial Generator MODE
GT3/SH2 GT1/SH3
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
Terminal Functions
TERMINAL NAME ABIN ABS0 Antiblooming levels these terminals determine which four antiblooming modes selected: ABS1 ABS0 Operation pulses 2-MHz burst pulses 1-MHz burst pulses 1-MHz continuous pulses Optical black clamp Optical black clamp Burst flag Composite blank 2-MHz clock Clamp Clamp Composite sync Delay select When high, three serial-transfer pulses occur early relative sample-and-hold pulses SH1, SH2, SH3. When low, three serial-transfer pulses occur late relative sample-and-hold pulses. Field index Ground Exposure control: gates outputs (see description GPS) When high, timer operates normal-integration-time mode (tint 16.67 connected internally operate imager variable-integration-time mode, must held user-defined logic circuit must inserted between vary integration time (see Figure TMS3473B parallel-driver MIDSEL input switch GT1/SH3 logic signal both gate TL1051 video preprocessor sample-and-hold channel TL1593 3-channel sample-and-hold circuit. gate TL1051 video preprocessor GT3/SH2 logic signal both gate sample-and-hold channel TL1051 video preprocessor. Horizontal-counter reset Decoded count signal. HGATE test point used normal operation. used (tie high) TC243/TC245 select. When MODE low, TC244/245 imager selected; when MODE high, TC242/243 selected (see appropriate data sheets imager differences). Power down. low-logic level causes device enter power-consumption mode. Parallel-image-area gate clock Parallel-storage-area gate clock Standby-mode select. When high, normal operation selected; when low, power-down mode selected. Subcarrier Subcarrier phase shifted degrees Sample hold DESCRIPTION
ABS1 BCP1 BCP2 CBLK CLK2M CSYNC
GT1/SH3 GT3/SH2 HGATE HIGH MODE SC(90)
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
Terminal Functions (Continued)
TERMINAL NAME VGATE WHTA Serial clock Serial clock Serial clock Transfer-gate clock power Vertical-counter reset Vertical drive Vertical-dump speed. When high, vertical-dump frequency 3.58 MHz; when low, vertical-dump frequency MHz. Real-display-area signal. test point used normal operation. Decoded count signal. VGATE test point used normal operation. WHTA test point used normal operation. Crystal oscillator (see Figure DESCRIPTION
tint Transfer Pulse
Flush Pulses
Figure Flush Transfer Pulses
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
variable-integration-time mode
addition normal mode operation, SN28835 timing generator offers optional variable-integration mode with TC244 TC245 area-array image sensors. variable-integration mode selected applying low-logic level GPS. This low-logic level disables vertical-drive (VD) signal from controlling, internal timer, image-area storage-area parallel transfer signal (GP). Prior start integration period, charge that accumulated image area must transferred out. flush this previous signal dark-current charge from image area, pulsed times. Each pulse generates image-area storage-area gate transfer signals that shift unwanted charge into clearing drain. This clearing function should performed during high time signal (see Figure through Figure 12). integration period continues long remains high. must held low-logic level prevent from controlling internally. integration ceases readout occurs when pulsed simultaneously; this accomplished taking high-logic level. readout timing dependent vertical-drive pulse; this means that total-integration time multiple 1/60 second plus time interval between last pulse next pulse. image readout occurs within normal 1/60-second readout interval. integration time less than 1/60 second, normal output operation occurs; integration time greater than 1/60 second, frame buffer required capture image. Integration times greater than 1/60 second result image degradation temperatures greater than 25°C dark-current generation. degradation seen decrease dynamic range (contrast) increase noise. recommended that image sensor cooled long-exposure operation. dark-current generation reduced factor each temperature decrease. sensor operates 30°C. Cooling accomplished using thermoelectric Peltier cooler attached image sensor. Condensation header must prevented isolating cooled sensor from moist air. Vacuum isolation preferred; however, continual flushing nitrogen across header also prevent condensation.
SN28835
NOTE: SN28835 designed with crystal oscillator. terminals should connect directly external driver outputs.
Figure Connection External Crystal Oscillator SN28835
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, (see Note Input voltage range, Output voltage range, Continuous total power dissipation below) 25°C Operating free-air temperature range, 20°C 45°C Storage temperature range, TSTG 55°C 125°C Lead temperature (1/16 inch) from case seconds 260°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTE voltage values with respect GND.
recommended operating conditions
Supply voltage, High-level input voltage, Low-level input voltage, Operating frequency Power-up time Operating free-air temperature, 14.318 UNIT
electrical characteristics over recommended ranges supply voltage operating free-air temperature (unless otherwise noted)
PARAMETER ICC(AV) ICC(S) Average supply current Standby supply current GT3/SH2 GT1/SH3 other outputs GT3/SH2 GT1/SH3 other outputs TEST CONDITIONS UNIT
input Schmitt-trigger input with 0.1-V hysteresis. inputs except have pullup-current sources.
switching characteristics over recommended ranges supply voltage operating free-air temperature
PARAMETER fclock Frequency Pulse duration Rise time Fall time SC(90) SH1, GT2, GT1/SH3, GT3/SH2 SC(90) SH1, GT2, GT1/SH3, GT3/SH2 GT1SH3 GT3SH2 other outputs GT1SH3 GT3SH2 other outputs TEST CONDITIONS 3.579545 4.772727 UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Frame Lines Line 63.55
(525)
Vertical Scale
262.5
268.5
262.5
268.5
Field
Even Field
CSYNC CBLK BCP1 BCP2
521.5
522.5
258.5
VGATE HGATE SC,SC(90) S1,S2,S3
Continuous
SH1,GT3/SH2, GT1/SH3 ABIN PS,T CLK2M
Continuous
intervals equal 33.3 equals frame
Figure Vertical Timing, Normal-Integration Mode
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Horizontal Scale Case (130)
CSYNC Case Case
CBLK
BCP1 BCP2 HGATE 4.77273
CLK2M
Continuous
SC,SC(90)
Continuous 4.77273
SH1,GT3/SH2, GT1/SH3 4.77273 intervals equal 63.55 equals horizontal-scan line CSYNC varies depending which horizontal-scan line 262.5-line field being examined: Case depicts equalizing pulses that occur during horizontal-scan lines Case depicts vertical serration pulses that occur during horizontal-scan lines Case applies remaining horizontal-scan lines.
Figure Horizontal Timing
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Master Clock Horizontal Scale GT3/SH2 GT1/SH3 OUT1 OUT2 OUT3
1112 1314 1516 1819 1112 1314 1819
Dark
Dummy Dummy Dummy
Active Half Dark
BCP1 BCP2 CBLK master-clock periods equal 63.55 equals horizontal-scan line intervals equal 63.55 equals horizontal-scan line
Figure Serial Sample-and-Hold Timing Start Horizontal Transfer
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Horizontal Scale Master Clock Early Late GT3/SH2 GT1/SH3 Acceptable intervals equal 63.55 equals horizontal-scan line master-clock periods equal 63.55 equals horizontal-scan line
Figure Timing Signals Using Both Early Late Options
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
ABIN Timing Start Horizontal Scale CBLK BCP1 ABIN (mode ABIN (mode ABIN (mode ABIN (mode (always free running) (130)
ABIN Timing Start ABIN (modes intervals equal 63.55 equals horizontal-scan line NOTE: high connected internally)
ANTIBLOOMING-MODE SELECTION MODE ABS1 ABS0 2-MHz burst 1-MHz burst ABIN
1-MHz free running mode duty cycle 43%; other modes, duty cycle 50%.
Figure Antiblooming Timing Start Horizontal Transfer
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Vertical-Dump Frequency (3.58 MHz) 1024
ABIN Even (driver output) Even INLVL
Figure ABIN Timing
NOTES: When vertical-dump frequency (chosen level VDS), duty cycle high low; duty cycle vertical-dump frequency 3.58 MHz. When high, connected internally Neither SC(90) used 3.58-MHz clock. goes when low. begin clocking after goes high. phase shift between pulses equal 14-MHz crystal-oscillator clock period.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Power-Up Operation Power (see Note (see Note PS,T Refresh Pulses (see Note 1024 Pulses Pulses
ABIN
Standby Operation (see Note PS,T ABIN
Note
Refresh Pulses (see Note 1024 Pulses Pulses
Figure Power-Up Standby Timing
NOTES: 0.1-µF capacitor connected between GND. both powerup standby operation, 1024 refresh pulses generated even connected internally When low, ABIN, low. connected internally (GPS high).
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Pulses (see Note Pulses (see Note
PS,T
ABIN
BCP1, BCP2
Operation Mode
Normal Operation
Variable-Integration-Time Operation
Note
Figure Timing Normal Operation Versus Variable-Integration-Time Operation
NOTES: When level changes from high low, pulses generated When goes low, pulses generated Depending shutter design, either held clocked during variable-integration-mode operation. clocked, follows during intervals which high.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
PARAMETER MEASUREMENT INFORMATION
Operation Horizontal Scale
CSYNC
Operation Internal Vertical Counter (see Note Equalization Pulses CSYNC
Figure Horizontal Vertical Reset Timing
intervals equals 63.55 equals horizontal-scan line NOTE internal vertical counter preset value (indicating vertical sync) when transitions from high. Immediately following low-to-high transition VCR, horizontal scanning commences line frame.
SC(90)
Figure SC(90) Timing
POST OFFICE 655303
DALLAS, TEXAS 75265
SN28835 1/2-INCH NTSC TIMER
MECHANICAL DATA
FS/S-PQFP-G44 PLASTIC QUAD FLATPACK
1,00
0,55 0,20 0,10
14,20 18,20 17,40
2,20
2,30
0,10 Seating Plane 1,50 1,10 0,10
4040160/A-10/93 NOTES: linear dimensions millimeters. This drawing subject change without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgement, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS INVOLVE POTENTIAL RISKS DEATH, PERSONAL INJURY, SEVERE PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SEMICONDUCTOR PRODUCTS DESIGNED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION PRODUCTS SUCH APPLICATIONS UNDERSTOOD FULLY CUSTOMER'S RISK. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof.
Copyright 1998, Texas Instruments Incorporated

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