LM2631 Synchronous Step-Down Power Supply Controller LM2631 contr

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LM2631 Synchronous Step-Down Power Supply Controller LM2631 contr

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LM2631 Synchronous Step-Down Power Supply Controller
LM2631 Synchronous Step-Down Power Supply Controller
LM2631 controller provides active functions step-down (buck) switching converters. These dc-to-dc converters provide core power battery-operated systems. High efficiency achieved using synchronous rectification pulse-skipping mode operation light load. Inexpensive N-channel MOSFETs used reduce system cost. Bootstrap circuit used drive high-side N-channel MOSFET. Current mode control scheme used improve line regulation transient response, also provides cycle-by-cycle current limiting. operating frequency adjustable between kHz. external shutdown used disable device reduce quiescent current noise applications, bringing FPWM high force device operate constant frequency mode. Other features include external synchronization pin, PGOOD indicate state output voltage. Protection circuitry includes thermal shutdown, undervoltage overvoltage shutdown protection, soft-start capability, levels current limits: first level simply limits load current directly; second level, load pulls output voltage down below regulated value, chip will shut down. This operation disabled during startup, internal timer will enable output does come preset time.
Features
4.5V input range Adjustable output (1.5V adjustable operating frequency Externally synchronizable On-board power good function Precision 1.24V reference output typical quiescent current shutdown current Thermal shutdown Direct current limit protection Input undervoltage lockout Output undervoltage shutdown protection Output overvoltage shutdown protection Programmable soft-start function Tiny TSSOP package
Applications
Notebook subnotebook computers Cellular phones Portable instruments Battery-powered digital devices
Typical Application Circuit
DS100937-1
1999 National Semiconductor Corporation
DS100937
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Absolute Maximum Ratings (Note
Military/Aerospace specified devices required, please contact National Semiconductor Sales Office/ Distributors availability specifications. Voltages from indicated pins PGND: CBOOT CSH, FPWM, SYNC Power Dissipation 70°C), (Note -0.3V -0.3V -0.3V -0.3V -0.3V -0.3V 720mW
Storage Temperature Range Soldering Dwell Time, Temperature (Note Wave Infrared Vapor Phase Rating (Note
-65°C +150°C
sec, 260°C sec, 240°C sec, 219°C
Operating Ratings
Junction Temperature 4.5V -25°C +125°C
Electrical Characteristics
Specifications standard type face 25°C those with boldface type apply over full operating junction temperature range. 10V, PGND 0V,unless otherwise stated. (Notes Symbol System VOUT VOUT/ VOUT VOUT/ VOUT Input Supply Voltage Output Voltage Adjustment Range Load Regulation Line Regulation Input Supply Current with Switching Controller Input Supply Current with Switching Controller (Internal Rail Supplied from Pin) Input Supply Current with Shut Down Minimum Output Voltage Providing Internal Rail Soft Start Source Current 1.5V (CSH-CSL) VCSH 2.15V, VCSL 2.1V VCSH 5.15V, VCSL 0.002 1.2/1.4 0.15 (Note Soft Start Sink Current Current Limit Voltage (Voltage from CSL) Undervoltage Shutdown Latch Threshold VOUT Undervoltage Shutdown Latch Threshold (Note VOUT Overvoltage Shutdown Latch Threshold (Note 1.5V VCSL 1.8V 90/80 130/140 Rising Edge 72/70 89/90 113/110 129/130 V(min) V(max) V(min) V(max) mA(max) µA(max) µA(min) µA(max) mV(min) mV(max) V(min) VOUT VOUT(min) %VOUT(max) VOUT VOUT(min) VOUT(max) Parameter Conditions Typical Limit Units
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Electrical Characteristics
Symbol System Parameter
(Continued)
Specifications standard type face 25°C those with boldface type apply over full operating junction temperature range. 10V, PGND 0V,unless otherwise stated. (Notes Conditions Typical Limit Units
VOUT Regulation Comparator Enable Threshold Hysteresis Regulation Comparator Regulator Window Detector Thresholds (PGOOD from High Low) Regulator Window Detector Thresholds (PGOOD from High) Gate Drive VBOOT IBOOT Bootstrap Voltage (Voltage from CBOOT CBOOT Leakage Current High Drive Source Current High Drive Sink Current Drive Source Current Drive Sink Current High-Side On-Resistance HDRV LDRV Low-Side On-Resistance HDRV LDRV Oscillator FOSC Oscillator Frequency FADJ Open CBOOT Sourcing VCBOOT VHDRV VCBOOT HDRV Forced LDRV Forced LDRV Forced
VOUT VOUT VOUT
VOUT
0.45 0.35 0.55
V(min)
172/162 228/230
kHz(min) kHz(max) kHz(min) kHz(max) %(min) kHz(min)
Oscillator Frequency
FADJ Sourcing 2.94 (Note
VFADJ DMAX
Voltage FADJ Maximum Duty Cycle Maximum Frequency Synchronization Minimum Pulse Width SYNC Signal FADJ Open Low-Going Wide Rectangular Pulses Applied SYNC Input SYNC Pulses Low-Going
1.03
ns(min)
Error Amplifier ICOMP Feedback Input Bias Current COMP Output Source Current COMP Output Sink Current Voltage Reference VREF Reference Voltage (Nominal)) IREF 1.238 1.219/1.219 1.251/1.262 V(min) V(max) 1.3V, VCSH 5.15V, VCSL VCOMP 0.2V, VCOMP 1.2V, 1.4V
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Electrical Characteristics
Symbol Voltage Reference VREF Reference Voltage (Line Regulation) Reference Voltage (Load Regulation) Logic Inputs Outputs Minimum High Level Input Voltage (SD, FPWM SYNC) Maximum Level Input Voltage (FPWM SYNC) Maximum Level Input Voltage (SD) Parameter
(Continued)
Specifications standard type face 25°C those with boldface type apply over full operating junction temperature range. 10V, PGND 0V,unless otherwise stated. (Notes Conditions 4.5V Typical 1.238 1.219/1.219 1.251/1.262 IREF 1.238 1.219/1.219 1.251/1.262 Limit Units V(min) V(max) V(min) V(max)
Logic Input Voltage PGOOD Sourcing PGOOD Sinking
V(min) V(max) V(max)
Maximum Input Leakage Curren1t FPWM SYNC) PGOOD High Level Output Voltage PGOOD Level Output Voltage
V(min) V(max)
Note Absolute maximum ratings indicate limits beyond which damage device occur. Electrical specifications apply when operating device outside rated operating conditions. Note maximum allowable power dissipation calculated using PDmax (TJmax TA)/JA where TJmax maximum junction temperature, ambient temperature, junction-to-ambient thermal resistance specified package. rating results from using 160°C, 70°C, 125°C/W TJmax, respectively. 125°C/W represents worst-case condition heat sinking 20-pin TSSOP. Heat sinking allows safe dissipation more power. Absolute Maximum power dissipation must derated above 70°C ambient. LM263 actively limits junction temperature about 160°C. Note detailed information soldering plastic small-outline packages, refer Packaging Databook available from National Semiconductor Corporation. Note testing purposes, applied using human-body model, capacitor discharged through resistor. Note typical center characterization data taken with 25°C. Typicals guaranteed. Note limits guaranteed. electrical characteristics having room-temperature limits tested during production with 25°C. cold limits guaranteed correlating electrical characteristics process temperature variations applying statistical process control. Note This limit guaranteed design. Note Percentage limits determined measuring shutdown latch threshold pin, dividing nominal reference voltage. Note Pulling 2.94 FADJ simulates adjusting oscillator frequency with resistor connected from FADJ GND.
Typical Performance Characteristics
Efficiency Load Current (FPWM Low, VOUT 3.3V) Efficiency (FPWM High, Input Voltage VOUT 2.9V)
DS100937-11
DS100937-12
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Typical Performance Characteristics
Quiscent Supply Current Supply Voltage (Not Switching, FPWM Low, VOUT 2.0V)
(Continued) Quiscent Supply Current Supply Voltage (FPWM Low, VOUT 3.3V)
DS100937-15
DS100937-16
Supply Current Oscillator Frequency (FPWM High)
Oscillator Frequency Adjusting Resistor
DS100937-18 DS100937-17
Oscillator Frequency Junction Temperature
Reference Voltage Junction Temperature
DS100937-13
DS100937-14
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Connection Diagram Ordering Information
20-Lead TSSOP (MTC)
DS100937-2
View Order Number LM2631MTC-ADJ Package Number MTC20
Description
SYNC PGOOD Name Shutdown control input, active low. Oscillator synchronization input. Connect this ground used. constant monitor output voltage. PGOOD will output voltage exceeds nominal value. Once PGOOD goes low, will high output moves within nominal value. soft-start control pin. capacitor connected from this ground sets ramp time full current output. Compensation network connection (connected output voltage error amplifier). Output voltage feedback input (connected center external resistor divider). Frequency adjustment input. output precision reference. Low-noise analog ground. Current-sense positive input. Current-sense negative input. internal connection. Main power supply pin. internal connection. When FPWM high, pulse-skipping mode operation light load disabled. converter forced operate constant frequency mode. Power ground. Low-side gate-drive output. Bootstrap capacitor connection high-side gate drive. Switched-node connection, which connected with source high-side MOSFET. High-side gate-drive output. HDRV floating drive output that rides voltage. Function
COMP FADJ VREF FPWM PGND LDRV CBOOT HDRV
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Block Diagram
DS100937-3
FIGURE LM2631 Block Diagram
Operation
Basic Operation Current Mode Controlled Switching Regulator main control loop includes error amplifier, current amplifier comparator shown Figure During heavy load load with FPWM mode enabled, controller constant frequency current mode operation: high-side switch turned beginning each clock cycle, output error amplifier compared with sensed inductor current ramp; once ramp
reaches control level error amplifier, comparator reset driver logic turn high-side switch; low-side switch turned after certain delay (the voltage sensed low-side switch turned once voltage reaches zero. preset maximum delay ns). low-side switch stays until cycle until inductor current reaches zero; when this occurs, zero cross detector will disable low-side driver turn low-side switch. zero cross detector disabled FPWM mode. peak current mode step-down converter, compensation ramp needed avoid subharmonic oscillations
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Operation
(Continued)
when duty cycle higher than 50%. LM2631, this compensation ramp internally equal maximum down slope current amplifier output:
Frequency Control (FADJ) SYNC With FADJ open, switching frequency kHz. frequency increased connecting resistor between FADJ ground. device also synchronized with external CMOS logic clock range from kHz. recommended connect SYNC ground used. Protections current limit comparator provides cycle-by-cycle current limit function turning high-side MOSFET whenever sensed current reaches Note that, current limit voltage will increase when output voltage less than 1.5V. second level current limit accomplished voltage detector: load pulls output voltage down below nominal value, device will turn high-side MOSFET turn low-side MOSFET. overvoltage protection comparator will turn low-side switch when output voltage exceeds 120% nominal value. Both protection features disabled during start-up. latched conditions reset shutting device down then powering Built-in undervoltage lockout circuit will keep most internal function blocks until input voltage rises about 3.5V. Soft Start capacitor provides soft start feature. When regulator first powered when goes high, 10µA current source charges capacitor from 0.6V clamping voltage. switch duty cycle starts with narrow pulses gradually wider voltage ramps about 1.3V, above which duty cycle will controlled maximum current limit until output voltage rises nominal value regulator starts operate normal current mode control. LM2631 digital counter, referenced oscillator frequency, soft start timeout. timeout dependent switching frequency (timeout 4096/FS). output voltage doesn't move within window nominal value during this period, device will latch itself off. Power Good LM2631 provides power good signal monitoring voltage compared feedback voltage with VREF voltage. Once output voltage exceeds window nominal value, PGOOD goes low, stays until output voltage returns window nominal value.
Where gain current sense amplifier. maximum output voltage equals Also, inductor 0.025 sense resistor assumed determine internal compensation ramp. Different values inductor sense resistor used long resulted MDOWN RSEN VOUT/L) less than Pulse-Skipping Mode Light Load Pulse-skipping mode enabled pulling PFWM low. This mode decreases switching frequency light loads reduce switching frequency related losses. PFWM low, controller goes into pulse-skipping mode when sensed inductor current goes below threshold pulse-skipping comparator. pulse-skipping mode, high-side switch only turns beginning clock cycle when voltage feedback falls below reference voltage. Once switch stays until sensed current rises threshold Fast Transient Response When output voltage fails exceed nominal level, voltage regulation(LREG) comparator will logic turn high-side switch maximum duty cycle. This improves transient response since bypasses error amplifier comparator. During start-up, LREG disabled. Boost High-Side Gate Drive flying capacitor used bootstrap power supply high-side driver illustrated Figure boost capacitor charged from internal voltage rail (about 5.5V) through internal diode when synchronous rectifier (low-side MOSFET) then boosts high-side gate voltage turn high-side MOSFET beginning next cycle. internal diode connecting between CBOOT reduces count external components. input voltage application (Vin 5V), some external charge pump circuitry used boost gate voltage order reduce conduction loss. Details will discussed Application Circuits Section. Supply Voltage LM2631 When available, recommended connect LM2631 (pin13) This improve efficiency (see second figure Typical Performance Characteristics), also reduce power dissipation inside Since supply only used power LM2631 (including gate charge external MOSFETs), only requires small amount current. Reference 1.238V reference 2.4% accuracy over temperature. capacitor recommended between VREF ground. load VREF should exceed 100µA.
Design Procedure
Guidelines selecting external components discussed this section. Inductor Selection most critical parameters inductor inductance, peak current resistance. inductance related switching frequency ripple current:
Higher switching frequency allows smaller inductor, reduces efficiency. higher value ripple current reduces inductance, increase conductance loss, core loss,
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Design Procedure
(Continued)
current stress inductor switch devices, requires bigger output capacitor same output voltage ripple requirement. reasonable value setting ripple current output current. Since ripple current increase with input voltage, maximum input voltage always used determine inductance. resistance inductor parameter efficiency. Lower resistance available with bigger winding area. good tradeoff between efficiency core size letting inductor copper loss equal output power. Input Capacitor aluminum tantalum capacitor needed between drain high-side MOSFET ground prevent large voltage transients from appearing input. capacitor selected based current voltage requirements. current given
ward voltage less than body diode, efficiency improved. breakdown voltage rating preferred higher than maximum input voltage. Since only short period time (about each cycle), average current rating only requires higher than maximum output current. important place very close drain source extra parasitic inductance parallel loop will slow turn-on direct current through body diode (Programming Output Voltage) following formula select appropriate resistor values: VOUT VREF(1 R1/R2) where VREF 1.238V Select value between 100k. (Use higher accuracy metal film resistors). Current sense resistor value sense resistor determined minimum current limit voltage maximum peak current. calculated follows:
current reaches maximum (IOUT/2) when equals 2VOUT. parallel several capacitors required meet current rating. aluminum capacitor, voltage rating should least higher than maximum input voltage. tantalum capacitor used, voltage rating should about twice maximum input voltage. tantalum capacitor should also surge current tested manufacturer. also recommended small ceramic capacitor (0.1 between ground. Output Capacitor selection COUT driven maximum allowable output voltage ripple. output ripple FPWM mode approximated
where tolerance factor sense resistor. Layout Considerations Layout critical reduce noises ensure specified performance. important guidelines listed follows: Minimize parasitic inductance loop input capacitors MOSFETS: using wide short traces. This important because rapidly switching current, together with wiring inductance generate large voltage spikes which cause noise problems. Always minimize high-current ground traces: such traces from PGND source then negative terminals output capacitors. dedicated (Kelvin sense) short traces from CSH, pins sense resistor, Keep these traces away from noise traces (such trace, gate traces). Minimize traces connecting Schottky diode. parasitic inductance loop delay turn-on Schottky diode, which diminishes efficiency gain from adding Minimize traces from drivers (HDRV LDRV pin) MOSFETs gates. Minimize trace from center output resistor divider keep away from noise sources avoid noise pickup. dedicated sense trace (separated from power trace) used connect resistor divider output. sense trace ensures tight regulation output.
term plays dominant role determining voltage ripple. aluminum electrolytic tantalum capacitors (such Nichicon series, Sanyo OS-CON, Sprague 593D, 594D, TPS) recommended. Electrolytic capacitors recommended temperature below -25°C since their rises dramatically cold temperature. Tantalum capacitors have much better specification cold temperatures preferred temperature applications. Power MOSFETs N-channel logic-level MOSFETs required this application. MOSFETs with on-resistance total gate charge recommended achieve high efficiency. drain-source breakdown voltage ratings recommended times maximum input voltage. Schottky Diode Schottky diode used prevent intrinsic body diode low-side MOSFET from conducting during dead time when both MOSFETs off. Since for-
Application Circuits
typical application circuit shown Figure with some components values shown Table
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Application Circuits
(Continued)
DS100937-4
FIGURE Typical 2.5V Application Circuit TABLE Components Typical 2.5V, 300kHz Application Circuits Input Voltage Output Current Application 4.75V Notebook Fairchild FDS6680; Siliconix Si4410DY; International Rectifier IRF7805 Sumida CDRH127-7R6: 5.9A 22µF, Sprague 593D 220µF, Sprague 593D Motorola MBRS140T3 4.5V Desktop Fairchild FDB7030L; Motorola MTB75N03HDL Pulse PE-53681: 11.4A Sanyo OS-CON 6.3V Sanyo OS-CON Motorola MBRS340T3
Inductor Input Capacitors Output Capacitors Rectifier Sensing Resistor Compensation components
When input voltage (less than 5V), bootstrap function cannot deliver enough gate voltage fully drive high-side MOSFET which increases Rdson, consequently reduces efficiency. external charge-pump doubler
added double CBOOT voltage (see Figure also added increase gate drive voltage both high-side low-side MOSFETs.
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Application Circuits
(Continued)
DS100937-5
FIGURE High Efficiency, kHz, 2.5V Converter. Efficiency (typ) load.
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LM2631 Synchronous Step-Down Power Supply Controller
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead TSSOP (MTC) Order Number LM2631MTC-ADJ Package Number MTC20
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National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: 80-530 Email: europe.support@nsc.com Deutsch Tel: 80-530 English Tel: 80-532 Tel: 80-532 Italiano Tel: 80-534
critical component component life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness.
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National does assume responsibility circuitry described, circuit patent licenses implied National reserves right time without notice change said circuitry specifications.

LM2631 Synchronous Step-Down Power Supply Controller LM2631 contr

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