2451.4 Digital Filter HSP43891/883 video-speed Digital Filte

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2451.4 Digital Filter HSP43891/883 video-speed Digital Filte

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HSP43891/883
2451.4
Digital Filter
HSP43891/883 video-speed Digital Filter (DF) designed efficiently implement vector operations such digital filters. comprised eight filter cells cascaded internally shift output stage, single integrated circuit. Each filter cell contains two's complement multiplier, three decimation registers 26bit accumulator. output stage contains additional 26bit accumulator which contents filter cell accumulator output stage accumulator shifted right 8-bits. HSP43891/883 maximum sample rate 25.6MHz. effective multiply-accumulate (mac) rate 204MHz. HSP43891/883 configured process expanded coefficient word sizes. Multiple cascaded larger filter lengths without degrading sample rate single process larger filter lengths less than 25.6MHz with multiple passes. architecture permits processing filter lengths over 1000 taps with guarantee overflows. practice, most filter coefficients less than 1.0, making even larger filter lengths possible. provides 8-bit unsigned 9-bit two's complement arithmetic, independently selectable coefficients signal data. Each filter cell contains three re-sampling decimation registers which permit output sample rate reduction rates 1/2, input sample rate. These registers also provide capability perform operations such matrix multiplication spatial correlations/convolutions image processing applications.
Features
This Circuit Processed Accordance MIL-STD-883 Fully Conformant Under Provisions Paragraph 1.2.1. 0MHz 25.6MHz Sample Rate Eight Filter Cells 9-Bit Coefficients Signal Data Power CMOS Operation ICCSB 500µA Maximum ICCOP 160µA Maximum 20MHz 26-Bit Accumulator Stage Filter Lengths 1032 Taps Expandable Coefficient Size, Data Size Filter Length Decimation
Applications
Filters Radar/Sonar Digital Video Adaptive Filters Echo Cancellation Complex Multiply-Add Sample Rate Converter
Ordering Information
PART NUMBER HSP43891GM-20/883 HSP43891GM-25/883 TEMP. RANGE (oC) PACKAGE PKG. G85.A G85.A
Block Diagram
DIENB CIENB DCM0 ERASE CIN0 RESET ADR0 RESET SHADD SENBL SENBH DIN0 DIN8
FILTER CELL
FILTER CELL
FILTER CELL
FILTER CELL
FILTER CELL
FILTER CELL
FILTER CELL
FILTER CELL
COUT0 COENB
ADR0, ADR1, ADR2 OUTPUT STAGE SUM0
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. http://www.intersil.com 407-727-9207 Copyright Intersil Corporation 1999
HSP43891/883 Pinouts
HSP43891/883 (PGA) VIEW, PINS DOWN
COENB COUT7 COUT8 ALIGN RESET ERASE DIN7 DIN6 DIN1 DIN3 DIN2 DIN0 CIENB TCCI CIN7 CIN6 CIN4
COUT5 COUT6
DIENB
DIN5
DIN4
CIN5
CIN3 SENBL
COUT3 COUT4
CIN2
COUT1
COUT2
CIN1
CIN0 SUM3
ADR2
COUT0 SHADD DCM0
SUM0 SUM1
SUM2
ADR1
ADR0 SUM25 SUM20 SUM17 SUM16
SUM5 SUM7
SUM4 SUM6
SENBH SUM24
SUM22
SUM21
SUM19
SUM14
SUM15
SUM12
SUM10
SUM8
DCM1
SUM23
SUM18
SUM13
SUM11
SUM9
HSP43891/883 Pinouts
(Continued) HSP43891/883, (PGA) PINS
DCM1 SENBH ADR1 ADR2 COUT1 COUT3 COUT5 COUT6 COENB RESET DIN7 DIN6 DIN3 DIN0 CIN8 COUT7 COUT8 ERASE DIN8 DIN1 DIN2 CIENB CIN7 CIN6 CIN4 ALIGN DIENB DIN5 DIN4 CIN5 CIN3 COUT4 CIN2 COUT2 CIN1 CIN0 SENBL COUT0 SHADD SUM0 DCM0 SUM1 SUM3 SUM2 ADR0 SUM5 SUM4 SUM25 SUM20 SUM17 SUM16 SUM7 SUM24 SUM19 SUM15 SUM12 SUM10 SUM8 SUM6 SUM23 SUM22 SUM21 SUM18 SUM14 SUM13 SUM11 SUM9
HSP43891/883
Absolute Maximum Ratings
Supply Voltage 8.0V Input/Output Voltage .GND -0.5V +0.5V Rating Class
Thermal Information
Thermal Resistance (Typical, Note (oC/W) (oC/W) Ceramic Package 36.0 Maximum Package Power Dissipation 125oC Ceramic Package .1.44W Maximum Junction Temperature .175oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) .300oC
Operating Conditions
Temperature Range -55oC 125oC Voltage Range +4.5V +5.5V
Characteristics
Number Gates 17,762
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: measured with component mounted evaluation board free air. TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS Devices Guaranteed 100% Tested PARAMETER Logical Input Voltage Logical Zero Input Voltage Output HIGH Voltage Output Voltage Input Leakage Current Output Leakage Current Clock Input High Clock Input Standby Power Supply Current Operating Power Supply Current Functional Test NOTES: Interchanging force sense conditions permitted. Operating Supply Current proportional frequency, typical rating 8mA/MHz. Tested follows: 1MHz, 2.6, 0.4, 1.5V, 1.5V, VIHC 3.4V, VILC 0.4V. SYMBOL VIHC VILC ICCSB CONDITIONS 5.5V 4.5V 400µA 4.5V (Note +2.0mA 4.5V (Note 5.5V VOUT 5.5V 5.5V 4.5V 5.5V, Outputs Open 20.0MHz 5.5V, (Note (Note GROUP SUBGROUPS TEMPERATURE (oC) UNITS
ICCOP
160.0
HSP43891/883
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS Device Guaranteed 100% Tested GROUP SUBGROUPS (20MHz) TEMP (oC) (25.6MHz) UNITS
PARAMETER Clock Period Clock Clock High Input Setup Input Hold Coefficient Output Delay Output Enable Delay Output Delay NOTE:
SYMBOL
NOTES Note Note Note Note Note Note Note Note
Testing: 4.5V 5.5V. Inputs driven 3.0V Logic"1" 0.0V Logic "0". Input output timing measurements made 1.5V both Logic "0". driven 4.0V measured 2.0V. TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS TEST CONDITIONS Open, 1MHz measurements referenced device (20MHz) NOTES TEMP (oC) 25oC 25oC (25.6MHz) UNITS
PARAMETER Input Capacitance Output Capacitance Output Disable Delay Output Rise Time Output Fall Time NOTES:
SYMBOL COUT tODD
parameters listed Table controlled design process parameters directly tested. These parameters characterized upon initial design after major process and/or design changes. Loading specified test load circuit, 40pF.
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test Interim Test Final Test Group Groups METHOD 100%/5004 100%/5004 100% 100% Samples/5005 SUBGROUPS
HSP43891/883 Burn-In Circuit
HSP43891/883 BOTTOM VIEW, PINS
DCM1 SENBH ADR1 ADR2 COUT1 COUT3 COUT5 COUT6 COENB RESET DIN7 DIN6 DIN3 DIN0 CIN8 COUT7 COUT8 ERASE DIN1 DIN2 CIENB CIN7 CIN6 CIN4 ALIGN DIENB DIN5 DIN4 CIN5 CIN3 COUT4 CIN2 COUT2 CIN1 CIN0 SENBL COUT0 SHADD SUM0 DCM0 SUM1 SUM3 SUM2 ADR0 SUM5 SUM4 SUM25 SUM20 SUM17 SUM16 SUM7 SUM24 SUM19 SUM15 SUM12 SUM10 SUM8 SUM6 SUM23 SUM22 SUM21 SUM18 SUM14 SUM13 SUM11 SUM9
HSP43891/883
BURN-IN SIGNALS COENB RESET DIN7 DIN6 DIN3 DIN0 CIN8/TCCI COUT7 COUT8/TCC0 ERASE DIN8/TCS DIN1 DIN2 CIENB CIN7 CIN6 CIN4 NAME BURN-IN SIGNAL VCC/2 VCC/2 NAME COUT5 COUT6 ALIGN DIENB DIN5 DIN4 CIN5 CIN3 COUT3 COUT4 CIN2 COUT1 COUT2 CIN1 CIN0 SENBL COUT0 SHADD SUM0 BURN-IN SIGNAL VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 NAME ADR2 DCM0 SUM1 SUM3 SUM2 ADR1 ADR0 SUM5 SUM4 SUM25 SUM20 SUM17 SUM16 SUM7 SENBH SUM24 BURN-IN SIGNAL VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 NAME SUM19 SUM15 SUM12 SUM10 SUM8 SUM6 DCM1 SUM23 SUM22 SUM21 SUM18 SUM14 SUM13 SUM11 SUM9 BURN-IN SIGNAL VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2
NOTES: VCC/2 (2.7 ±10%) used outputs only. (±20%) resistor connected pins except GND. 5.5V ±0.5V. 0.1µF (minimum) capacitor between position. 100kHz ±10%, F0/2, F1/2., F10/2, duty cycle. Input voltage limits: 0.8V maximum, 4.5V ±10%.
Metallization Topology
DIMENSIONS: mils mils METALLIZATION: Type: Si-AI-Cu Thickness: GLASSIVATION Type: Nitrox Silox Thickness: WORST CASE CURRENT DENSITY: 105A/cm2
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil semiconductor products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
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2451.4 Digital Filter HSP43891/883 video-speed Digital Filte

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