Ultralow Noise 20-Bit Audio AD1862* FUNCTIONAL BLOCK DIAGRAM

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Ultralow Noise 20-Bit Audio AD1862* FUNCTIONAL BLOCK DIAGRAM

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FEATURES Signal-to-Noise Ratio D-Range Performance Gain Linearity Output Current 16-Pin Package 0.0012% APPLICATIONS High Performance Compact Disc Players Digital Audio Amplifiers Synthesizer Keyboards Digital Mixing Consoles High Resolution Signal Processing
Ultralow Noise 20-Bit Audio AD1862*
FUNCTIONAL BLOCK DIAGRAM
VOLTAGE REFERENCE INPUT DIGITAL OFFSET AGND 20-BIT IOUT DGND
TRIM DATA
AD1862
PRODUCT DESCRIPTION
AD1862 monolithic 20-bit digital audio DAC. Each device provides 20-bit DAC, 20-bit serial-to-parallel input register voltage reference. digital portion AD1862 fabricated with CMOS logic elements that provided Analog Devices' BiMOS process. analog portion AD1862 fabricated with bipolar devices well thin-film resistors. design, layout packaging techniques combine produce extremely high performance audio playback. design AD1862 incorporates digital offset circuit which improves low-level distortion performance. stress packaging techniques used minimize stress-induced parametric shifts. Stress-sensitive circuit elements located areas which least affected packaging stress. Laser-trimming initial linearity error affords extremely total harmonic distortion. Output glitch also small, contributing overall high level performance. noise performance AD1862 excellent. When used with recommended external noise-reduction capacitors, achieves signal-to-noise ratio. serial input port consists clock, data latch enable pins. serial 20-bit, complement data word clocked into DAC, first, external data clock. latch-enable signal transfers input word from internal serial input
register input register. data clock function MHz, allowing operation. serial input port compatible with second-generation digital filter chips consumer audio products such SM5813 SM5818. AD1862 operates with supplies digital power supplies supplies analog supplies. digital analog supplies separated reduced digital crosstalk. Separate analog digital common pins also provided. AD1862 typically dissipates less than AD1862 packaged 16-pin plastic DIP. operating range guaranteed -25°C +70°C.
PRODUCT HIGHLIGHTS
signal-to-noise ratio. (typical) D-Range performance. (minimum) gain linearity amplitude. 20-bit resolution provides dynamic range. operation. 0.0016% THD+N signal amplitude. (typical) Space saving 16-pin package. output current.
*Protected U.S. Patent Numbers: 4,349,811; 4,857,862; 4,855,618; 3,961,326; 4,141,004; 4,902,959.
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD1862-SPECIFICATIONS
supplies, Figure test circuit schematic)
Units Bits
RESOLUTION DIGITAL INPUTS Maximum Clock Input Frequency ACCURACY Gain Error Midscale Output Error TOTAL HARMONIC DISTORTION NOISE (EIAJ)1 990.5 AD1862N-J AD1862N 990.5 AD1862N, 990.5 AD1862N, D-Range, A-Weight Filter SIGNAL-TO-NOISE RATIO2: (EIAJ)1 A-Weight Filter AD1862N-J AD1862N GAIN LINEARITY AD1862N-J AD1862N OUTPUT CURRENT Bipolar Range Tolerance Output Impedance 30%) Settling Time FEEDBACK RESISTOR Value Tolerance POWER SUPPLY Voltage Voltage Current Clock Clock
(0.0012) (0.0019) (0.0063) (0.56) 4.75 10.8 12.0 12.0
(0.0016) (0.0025) (0.01) (0.8)
13.2 13.2
POWER DISSIPATION Clock TEMPERATURE RANGE Specification Operation Storage
+100
NOTES Test Method complies with EIAJ Standard CP-307. signal-to-noise measurement includes noise contributed SE5534A used test fixture does include noise contributed pass filter used test fixture. Specifications boldface tested production units final electrical test. Specifications subject change without notice.
REV.
AD1862
-60dB
ANALOG OUTPUT ERROR
AD1862N-J GAIN LINEARITY
FREQUENCY
-20dB
DIGITAL INPUT
Figure THD+N Frequency
Figure Gain Linearity
-60dB
FULLSCALE MIDSCALE
-20dB TEMPERATURE
nV/Hz
-FULLSCALE
100k
Figure Noise Density
Figure THD+N Temperature kHz)
Figure Broadband Noise Bandwidth, Midscale)
Figure Midscale Differential Linearity
REV.
AD1862
ABSOLUTE MAXIMUM RATINGS*
DGND +13.2 DGND AGND +13.2 AGND -13.2 AGND DGND -0.3 +0.3 Digital Inputs DGND -0.3 Soldering +300°C, Storage Temperature -60°C +100°C
*Stresses greater than those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD1862 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
CONFIGURATION
DESIGNATIONS
TRIM DATA
Function TRIM DGND IOUT AGND
Description Bias Capacitor Analog Negative Supply Trim Connection Positive Logic Supply External Clock Input Latch Enable Input Data Input Negative Logic Supply Digital Ground Feedback Resistor Output Current Analog Ground Reference Capacitor Midscale Adjust Bias Capacitor Positive Analog Supply
AD1862
VIEW (Not Scale)
AGND IOUT DGND
ORDERING GUIDE
Model AD1862N AD1862N-J
Plastic DIP.
Operating Temperature Range -25°C +70°C -25°C +70°C
THD+N 0.0025% 0.0016%
Package Option* N-16 N-16
REV.
AD1862
TOTAL HARMONIC DISTORTION NOISE Total Harmonic Distortion plus Noise (THD+N) defined ratio square root squares values harmonics noise value fundamental input frequency. usually expressed percent decibels (dB).
D-RANGE DISTORTION
TRIM FEEDBACK REGISTER VREF AGND LATCH ENABLE DECODER DIGITAL OFFSET CLOCK 20-BIT CURRENT OUTPUT LATCH
D-Range Distortion ratio signal amplitude distortion plus noise this case, A-Weight filter used. value specified D-Range performance ratio measured plus
SETTLING TIME
DATA DGND
SERIAL INPUT REGISTER
Settling Time time required output reach remain within about final value, measured from digital input transition. primary measure dynamic performance usually expressed nanoseconds (ns).
SIGNAL-TO-NOISE RATIO
AD1862 Block Diagram
FUNCTIONAL DESCRIPTION
Signal-to-Noise Ratio defined ratio amplitude output with full-scale present amplitude output when signal present. expressed decibels (dB) measured using A-Weight filter.
GAIN LINEARITY
AD1862 high performance, monolithic 20-bit audio DAC. Each device includes voltage reference, 20-bit DAC, 20-bit input latch 20-bit serial-to-parallel input register. special digital offset circuit, combined with segmentation circuitry, produces excellent THD+N D-range performance. Extensive noise-reduction features utilized make noise performance AD1862 high possible. example, voltage reference circuit low-noise, volt bandgap cell. This cell supplies reference voltage bipolar offset circuit DAC. external noise-reduction capacitor connected form low-pass filter network. Additional noise-reduction techniques used control amplifier DAC. connecting external noise-reduction capacitor output noise contributions from control portion similarly reduced. noise-reduction efforts result signal-to-noise ratio design AD1862 uses combination segmented decoder, R-2R topology digital offset produce distortion signal amplitudes. digital offset technique shifts midscale output voltage away from transition device. Therefore, small amplitude signals affected change. extra cell included avoid clipping output full scale. supplies output current external I-to-V converter. on-board feedback resistor also supplied. Both output current feedback resistor laser-trimmed tolerance, simplifying selection external filter and/or deemphasis network components. input register serial-to-parallel converter fabricated with CMOS logic gates. These gates allow achievement fast switching speeds power consumption. Internal TTLto-CMOS converters used insure CMOS compatibility.
Gain Linearity measure deviation actual output amplitude from ideal output amplitude. determined measuring amplitude output signal amplitude that output signal digitally reduced level. perfect converter exhibits difference between ideal actual amplitudes. Gain linearity expressed decibels (dB).
MIDSCALE ERROR
Midscale Error, bipolar zero error, deviation actual analog output from ideal output when complement input code representing midscale loaded input register. AD1862 current output converter. Therefore, this error expressed
REV.
AD1862 Analog Circuit Considerations
GROUNDING RECOMMENDATIONS
AD1862 ground pins, designated analog ground (AGND) digital ground (DGND). analog ground "high-quality" ground reference device. analog ground should connected analog common point system. reference bypass capacitor, noninverting terminal current-to-voltage conversion amp, output loads should connected this point. digital ground returns ground current from digital logic portions AD1862 circuitry. This should connected digital common point system. illustrated Figure AGND DGND should connected together point system.
tributed voltage reference circuitry. proper choice this capacitor tantalum type with value more. This capacitor should connected package pins closely possible. This will minimize effects parasitic inductance leads connections circuit connections.
-12V ANALOG SUPPLY
AD1862
VIEW (Not Scale)
VIEW (Not Scale)
NOTE: "HIGH QUALITY" RETURN BIAS CAP.
AD1862
DGND AGND
Figure Noise Reduction Capacitors
Capacitor connected between labeled negative analog supply, -VS. This capacitor reduces portion output noise contributed control amplifier circuitry. should chosen tantalum capacitor with value about Again, connections between AD1862 should made short possible. recommended values respectively. ratio between should approximately Additional noise reduction gained choosing slightly higher values such Figure illustrates noise performance AD1862 with
EXTERNAL AMPLIFIER CONNECTIONS
Figure Grounding Bypassing Recommendations
AD1862 four power supply input pins. provide supply voltages which operate linear portions including voltage reference control amplifier. supplies designed operate with volts. supplies operate digital portions chip including input shift register, input latching circuitry TTL-to-CMOS level shifters. supplies designed operated from supplies subject only limitation that more negative than -VS. Decoupling capacitors should used power supply input pins. Good engineering practice suggests that these capacitors placed close possible package pins common points. logic supplies, should decoupled DGND analog supplies, should decoupled AGND.
EXTERNAL NOISE REDUCTION COMPONENTS
POWER SUPPLIES DECOUPLING
AD1862 current-output converter. Therefore, external amplifier, combination with on-board feedback resistor, required derive output voltage. Figure illustrates proper connections external operational amplifier. output AD1862 intended drive summing junction external current-to-voltage conversion amp. Therefore, voltage output current AD1862 should approximately same that AGND device. on-board feedback resistor output current typically have tolerance less. This makes choice external components very simple eliminates additional trimming. example, user wishes derive output voltage higher than swing offered output current feedback resistor combination, that required combine standard value resistor with feedback resistor achieve appropriate output voltage swing. This technique extended include choice elements deemphasis network, etc.
external capacitors required achieve low-noise operation. Their correct connection illustrated Figure Capacitor connected between labeled analog common. forms low-pass filter element which reduces noise con-
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Testing AD1862
TOTAL HARMONIC DISTORTION NOISE
figure audio represents amount undesirable signal produced during reconstruction playback audio waveform. specification, therefore, provides direct method classify choose audio desired level performance. combining noise measurement with measurement, THD+N specification realized. This specification indicates undesirable signal produced DAC, including harmonic products test tone well noise. Analog Devices tests AD1862s basis THD+N performance. this test procedure, digital data stream representing sine wave sent device under test. frequency waveform 990.5 Input data sent AD1862 rate (352.8 kHz). AD1862 under test produces output current which converted output voltage external amplifier. Figure illustrates recommended test circuit. Deglitchers trims used during this test procedure. automatic test equipment digitizes 4096 samples output test waveform, incorporating complete cycles sine wave. 4096 point performed test data.
VIEW (Not Scale)
AD1862
VOUT
Figure External Amplifier Connections
Based upon harmonics fundamental 990.5 test tone, noise components audio band, total harmonic distortion noise device calculated. AD1862 available performance grades. AD1862N produces maximum 0.0025% THD+N signal levels. higher performance AD1862N-J produces maximum 0.0016% THD+N signal levels.
SIGNAL-TO-NOISE RATIO
Signal-to-Noise Ratio (SNR) AD1862 tested following manner. amplitude signal measured. device under test then midscale output voltage volts). amplitude noise present measured. ratio these measurements. figure AD1862 includes output noise contributed NE5534 used test fixture does include noise contributed low-pass filter used test fixture. AD1862N minimum higher performance AD1862N-J minimum
0.1µF -12V 17MHz 352.8kHz 0.1µF 0.1µF -12V VIEW (Not Scale) 0.1µF
AD1862
10µF
SE5534A
ANALOG COMMON
360pF DIGITAL COMMON
3-POLE PASS FILTER
OUTPUT VOLTAGE
Figure Recommended Test Circuit
REV.
AD1862
OPTIONAL TRIM ADJUSTMENT
AD1862 includes external midscale adjust feature. Should application require improved distortion performance under small very small signal amplitudes (-60 lower), adjustment possible. resistors potentiometer form adjustment network. Figure illustrates correct configuration external components. Analog Devices recommends that this adjustment performed with signal amplitudes lower. Minor performance improvement achieved with larger signal amplitudes such Almost improvement possible when this adjustment performed with signal amplitudes.
VIEW (Not Scale) 470k
AD1862
100k
470k
Figure External Midscale Adjust
DIGITAL CIRCUIT CONSIDERATIONS
INPUT DATA
Data transmitted AD1862 stream composed 20-bit words with serial, complement, first format. Three signals must present achieve proper operation. They data, clock latch enable signals. Input data bits
clocked into input register rising edge clock signal (CLK). clocked 20th clock pulse. When data bits loaded, going latch enable (LE) pulse updates input. Figure illustrates general signal requirements data transfer AD1862.
WORD
DATA CLOCK LATCH ENABLE
WORD
Figure 12a. Input DatTIMING
Figure illustrates specific timing requirements that must order data transfer accomplished successfully. input pins AD1862 both CMOS compatible, independent power supplies used application. input requirements illustrated Figure
60ns >25ns >25ns
compatible with data outputs provided popular digital interpolation filter chips used digital audio playback systems. AD1862 input clock will allowing data transferred rate course, will also function slower rates such
>60ns >40ns LATCH ENABLE (LE) >40ns >15ns >15ns DATA INTERNAL INPUT REGISTER UPDATED WITH MOST RECENT BITS (20th BIT)
>15ns >40ns
WORD NEXT BITS CLOCKED SHIFT REGISTER
Figure 12b. Timing Requirements
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AD1862
AD1862 extremely high performance designed high-end consumer professional digital audio applications. Compact disc players, digital preamplifiers, digital musical instruments sound processors benefit from extended dynamic range, THD+Noise high signal-to-noise ratio. first time, converter longer basic limitation performance player. performance professional audio gear, such mixing consoles, digital tape recorders multivoice synthesizers utilize wide dynamic range signal-to-noise ratio achieve greater performance. And, AD1862's space saving 16-pin package contributes compact system design. This permits system designer incorporate more voices multivoice synthesizers, more tracks multitrack tape recorders more channels multichannel mixing consoles. Furthermore, high-resolution signal processing waveform generation applications equally well served AD1862.
HIGH PERFORMANCE PLAYER
Figure illustrates application AD1862s high performance player. AD1862s used, left channel right channel. CXD11XX chip decodes digital data coming from read electronics sends SM5813. Input data sent each AD1862 SM5813 digital interpolating filter. This device operates times oversampling. NE5534 amps chosen current-to-voltage converters their distortion noise. output filters 5-pole designs. purpose clarity, bypass capacitors have been omitted from schematic.
AGND NE5534 DIGITAL SUPPLY DATA DGND 10µF ANALOG SUPPLY
TRIM
PASS FILTER LEFT CHANNEL OUTPUT
AD1862
ANALOG SUPPLY DIGITAL SUPPLY 16.9344MHz TRIM SONY CXD1125 1130 1135 XTAI LRCK DATA LRCI SM5813 BCKI WCKO OW20 CKDV BCKO DATA AGND DGND NE5534 10µF ANALOG SUPPLY
PASS FILTER RIGHT CHANNEL OUTPUT
C210 PSSL SLOB
AD1862
Figure High Performance 20-Bit Oversampling Player Application
REV.
AD1862
HIGH-RESOLUTION SIGNAL PROCESSING
Figure illustrates AD1862 combined with DSP56000. high-resolution applications, combination 24-bit architecture DSP56000 noise high resolution AD1862 produce high-resolution, low-noise system. shown Figure clock signal supplied processor must inverted compatible with input AD1862. exact architecture output low-pass filter
ANALOG SUPPLY
depends sample rate output data. general, higher oversampling rate, fewer number filter poles required prevent aliasing. 20-bit resolution particularly suitable professional audio, mixing equalization equipment. resolution allows equalization performed 16-bit input words without signal truncation. Furthermore, sixteen 16-bit input words mixed output directly AD1862. this case, loss signal information would encountered.
ANALOG SUPPLY
DIGITAL SUPPLY
0.1µF AGND DGND 0.1µF
TRIM 0.1µF DSP56001 DIGITAL SUPPLY DIGITAL COMMON 0.1µF DATA
10µF
AD846
PASS FILTER OUTPUT VOLTAGE
AD1862
ANALOG COMMON
Figure DSP56001 AD1862 Produce High Resolution Signal Processing System
-10-
REV.
AD1862
OTHER DIGITAL AUDIO COMPONENTS AVAILABLE FROM ANALOG DEVICES
DGND DATA
16-BIT LATCH
16-BIT
TRIM
SERIAL INPUT REGISTER IOUT CONTROL LOGIC
AD1856 16-Bit Audio
AGND
Complete, External Components Required 0.0025% Cost 16-Pin SOIC Package Standard Pinout
AD1856
CONNECT
VOUT
DGND DATA
18-BIT LATCH
18-BIT
TRIM
SERIAL INPUT REGISTER IOUT CONTROL LOGIC
AGND
AD1860 18-Bit Audio
Complete, External Components Required 0.002% THD+N Signal-to-Noise Ratio 16-Pin SOIC Package
AD1860
CONNECT
VOUT
TRIM IOUT AGND VOUT
18-BIT
AD1864
REFERENCE REFERENCE
TRIM IOUT AGND VOUT
AD1864 Dual 18-Bit Audio
Complete, External Components 0.002% THD+N Channel Separation 24-Pin
18-BIT LATCH
18-BIT
18-BIT LATCH
DGND
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-11-
AD1862
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
Plastic (N-16)
C1445-7-9/90
-12-
REV.
PRINTED U.S.A.

Ultralow Noise 20-Bit Audio AD1862* FUNCTIONAL BLOCK DIAGRAM

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