Complete 8-Bit A-to-D Converter AD570* PRODUCT DESCRIPTION A

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Complete 8-Bit A-to-D Converter AD570* PRODUCT DESCRIPTION A

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FEATURES Complete Converter with Reference Clock Fast Successive Approximation Conversion: Missing Codes Over Temperature AD570J +125 AD570S Digital Multiplexing: Three-State Outputs 18-Pin Ceramic Cost Monolithic Construction
Complete 8-Bit A-to-D Converter AD570*
PRODUCT DESCRIPTION
AD570 8-bit successive approximation converter consisting DAC, voltage reference, clock, comparator, successive approximation register output buffers-all fabricated single chip. external components required perform full accuracy 8-bit conversion AD570 incorporates most advanced integrated circuit design processing technology available today. (integrated injection logic) processing fabrication function along with laser trimming high stability SiCr thin-film resistor ladder network wafer stage (LWT) temperature compensated, subsurface Zener reference insures full 8-bit accuracy cost. Operating supplies AD570 accepts analog inputs unipolar bipolar, externally selectable. BLANK CONVERT input driven low, three-state outputs into high impedance state conversion commences. Upon completion conversion, DATA READY line goes data appears output. Pulling BLANK CONVERT input high three states outputs readies device next conversion. AD570 executes true 8-bit conversion with missing codes approximately AD570 available version; AD570J specified +70°C temperature range, AD570S -55°C +125°C. Both guarantee full 8-bit accuracy missing codes over their respective temperature ranges.
*U.S. Patents Numbered: 3,940,760; 4,213,806 4,136,349.
PRODUCT HIGHLIGHTS
AD570 complete 8-bit converter. external components required perform conversion. Full-scale calibration accuracy 0.8% bits) achieved without external trims. AD570 single chip device employing most advanced processing techniques. Thus, user disposal truly precision component with reliability cost inherent monolithic construction, AD570 accepts either unipolar bipolar analog inputs grounding opening single pin. device offers true 8-bit accuracy exhibits missing codes over entire operating temperature range. Operation guaranteed with supplies. device will also operate with supply. AD570S also available processed MIL-STD-883C, Class military data sheet AD570SD/883B included Analog Devices Military Products Databook.
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Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD570-SPECIFICATIONS digital common, unless otherwise noted)
Model RESOLUTION1 RELATIVE ACCURACY TMIN TMAX FULL-SCALE CALIBRATION UNIPOLAR OFFSET BIPOLAR OFFSET DIFFERENTIAL NONLINEAIRTY TMIN TMAX TEMPERATURE RANGE TEMPERATURE COEFFICIENTS Unipolar Offset Bipolar Offset Full-Scale Calibration POWER SUPPLY REJECTION Positive Supply +4.5 +5.5 Negative Supply -16.0 -13.5 ANALOG INPUT IMPEDANCE ANALOG INPUT RANGES Unipolar Bipolar OUTPUT CODING Unipolar Bipolar LOGIC OUTPUT Output Sink Current (VOUT max, TMIN TMAX) Output Source Current (VOUT max, TMIN TMAX) Output Leakage LOGIC INPUTS Input Current Logic Logic CONVERSION TIME POWER SUPPLY OPERATING CURRENT PACKAGE OPTION2 Ceramic (D-18) AD570J
voltages measured with respect
AD570S
Units Bits Bits
+125
Positive True Binary Positive True Offset Binary
Positive True Binary Positive True Offset Binary
+4.5 -12.0 +5.0 +7.0 -16.5
+4.5 -12.0 +5.0 +7.0 -16.5
AD570JD
AD570SD
NOTES AD570 selected version AD571 10-bit A-to-D converter. Only logic inputs should connected Pins connection made) damage result. details grade package offerings SD-grade accorance with MIL-STD-883, refer Analog Devices' Military Products databook current /883 data sheet. Specifications subject change without notice. Specifications shown boldface tested production units final electrical test. Results from those tests used calculate outgoing quality levels. specifications guaranteed, although only those shown boldface tested production units.
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AD570
ABSOLUTE MAXIMUM RATINGS
Digital Common Digital Common -16.5 Analog Common Digital Common Analog Input Analog Common Control Inputs Digital Outputs (Blank Mode) Power Dissipation.
CIRCUIT DESCRIPTION
signal, input current will generated which exactly matches output with bits (The input resistor trimmed slightly facilitate user trimming, discussed next page.)
POWER SUPPLY SELECTION
AD570 complete 8-bit converter which requires external components provide complete successiveapproximation analog-to-digital conversion function. block diagram AD570 shown last page. Upon receipt CONVERT command, internal 8-bit current output sequenced successive-approximation register (SAR) from most-significant (MSB) least-significant (LSB) provide output current which accurately balances input signal current through input resistor. comparator determines whether addition each successively-weighted current causes current greater less than input current; less left more, turned off. After testing bits, contains 8-bit binary code which accurately represents input signal within (0.20%). Upon completion sequence, DATA READY signal goes low, output lines become active high depending code SAR. When BLANK CONVERT line brought high, output buffers again "open", prepared another conversion cycle. temperature compensated buried Zener reference provides primary voltage reference guarantees excellent stability with both time temperature. bipolar offset input controls switch which allows positive bipolar offset current (exactly equal value less LSB)
AD570 designed specified optimum performance using supply. supply current drawn device function operating mode (BLANK CONVERT), given specification page. supply currents change only moderately over temperature shown Figure change significantly with changes from -10.8 volts volts.
Figure AD570 Power Supply Current Temperature
CONNECTING AD570 STANDARD OPERATION
BLANK CONV 0.120
AD570 contains active components required perform complete conversion. Thus, most situations, that necessary connect power supply analog input, conversion start signal. But, there some features special connections which should considered achieving optimum performance. functional pinout shown Figure
DATA READY
DIGITAL COMMON
ANALOG COMMON ANALOG 0.151 AD570 ALSO AVAILABLE LASER-TRIMMED PASSIVATED CHIP FORM. CONSULT CHIP CATALOG APPLICATION PARTICULARS. FIGURE SHOWS CHIP METALLIZATION LAYOUT BONDING PADS.
BIPOLAR OFFSET CONTROL
Figure Chip Bonding Diagram
injected into summing node comparator offset output. Thus nominal unipolar input range becomes range. thinfilm input resistor trimmed that with full-scale input REV.
Figure AD570 Connections
AD570
FULL-SCALE CALIBRATION
thin-film input resistor laser trimmed produce current which matches full-scale current internal DAC-plus about 0.3%-when full-scale analog input voltage 9.961 volts volts-1 LSB) applied input. input resistor trimmed this that fine trimming potentiometer inserted series with input signal, input current full-scale input voltage trimmed down match full-scale current precisely desired. However, many applications nominal 9.961 volt full scale achieved sufficient accuracy simply inserting resistor series with analog input Typical full-scale calibration error will then about 0.8%. more precise calibration desired, trimmer should used instead. analog input 9.961 volts, trimmer that output code just transition between 11111110 11111111. Each will then have weight 39.06 nominal full scale 10.24 volts desired (which makes have value exactly 40.00 mV), resistor series with trimmer trimmer with good resolution) should used. course, larger fullscale ranges arranged using larger input resistor, linearity full-scale temperature coefficient compromised external resistor becomes sizable percentage
BIPOLAR OPERATION
Figure Bipolar Offset Controlled Logic Gate Gate Output Unipolar V-10 Input Range Gate Output Bipolar Input Range
COMMON-MODE RANGE
AD570 provides separate analog digital common connections. circuit will operate properly with much common-mode range between commons. This permits more flexible control system common bussing digital analog returns. normal operation analog common terminal generate transient currents during conversion. addition, static current about will flow into analog common unipolar mode after conversion complete. additional will flow during blank interval with zero analog input. analog common current will modulated variations input signal. absolute maximum differential voltage rating between commons volt. recommend that parallel pair back-to-back protection diodes connected shown Figure they connected locally.
standard unipolar range obtained shorting bipolar offset control digital common. left open, bipolar offset current will switched into comparator summing node, giving range with
Figure Standard AD570 Connections
offset binary output code. (-5.00 volts will give 8-bit code 00000000; input 0.00 volts results output code 10000000 4.96 volts input yields 11111111 code.) bipolar offset control input directly compatible, interface logic control constructed shown Figure
Figure Differential Common Voltage Protection
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AD570
ZERO OFFSET
apparent zero point AD570 adjusted inserting offset voltage between analog common device actual signal return signal common. Figure illustrates methods providing this offset. Figure shows converter zero offset bits correct device initial offset and/or input signal offsets. shown, circuit gives approximately symmetrical adjustment unipolar mode. bipolar mode should omitted obtain symmetrical range.
Figure
Figure AD570 Transfer Curve-Unipolar Operation (Approximate Weights Shown Illustration, Nominal Weights 36.1
Figure
NOTE: During conversion transient currents from analog common terminal will disturb offset voltage. Capacitive decoupling should used around offset network. These transients will settle appropriate during conversion. Capacitive decoupling will "pump fail settle resulting conversion errors. Power supply decoupling which returns analog signal common should signal input side resistive offset network.
CONTROL TIMING AD570
Figure shows nominal transfer curve near zero AD570 unipolar mode. code transitions edges nominal weights. some applications will preferable offset code transitions that they fall between nominal weights, shown offset characteristics. This offset easily accomplished shown Figure balance (after conversion) approximately flows into analog common terminal. resistor series with this terminal will result approximately desired offset transfer characteristics. nominal analog common current closely controlled manufacture. high accuracy required, potentiometer (connected rheostat) used Additional negative offset range obtained using larger values course, zero transition point changed, full-scale transition point will also move. Thus, offset introduced, full-scale trimming described previous page should done with analog input 9.941 volts.
There several important timing control features AD570 which must understood precisely allow optimal interfacing microprocessor other types control systems. these features shown timing diagram Figure normal standby situation shown left drawing. BLANK CONVERT line held high, output lines will "open", DATA READY (DR) line will high. This mode lowest power state device (typically mW). When line brought low, conversion cycle initiated; data lines change state. When conversion cycle complete (typically µs), line goes low, within data lines become active with data. About after line again brought high, line will high data lines will open. When line again brought low, conversion will begin. minimum pulse width line blank previous data start conversion line brought high during conversion, conversion will stop,
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AD570
data lines will change. longer pulse applied line during conversion, converter will clear start conversion cycle.
Figure Multiplex Mode
SAMPLE-HOLD AMPLIFIER CONNECTION AD570
Figure AD570 Timing Control Sequence
CONTROL MODES WITH BLANK CONVERT
Many situations high-speed acquisition systems digitizing rapidly changing signals require sample-hold amplifier (SHA) front converter. acquire hold signal faster than converter perform conversion. also used accurately define exact point time which signal sampled. AD570, also serve high input impedance buffer. Figure shows AD570 connected AD582 monolithic high speed signal acquisition. this configuration, AD582 will acquire volt signal less than with droop rate less than µV/ms. control signals arranged that when control line goes low, AD582 into "hold" mode, AD570 will begin conversion cycle. (The AD582 settles final value well advance
timing sequence AD570 discussed above allows device easily operated variety systems with differing control modes. most common control modes, Convert Pulse Mode, Multiplex Mode, illustrated here. Convert Pulse Mode-In this mode, data present output converter times except when conversion taking place. Figure illustrates timing this mode. BLANK CONVERT line normally conversions triggered positive pulse. typical application this timing mode shown Figure which interfacing easily accomplished with three-state buffers. Multiplex Mode-In this mode outputs blanked except when device selected conversion readout; this timing shown Figure typical AD570 multiplexing application shown Figure This operating mode allows multiple AD570 devices drive common data lines. BLANK CONVERT lines held high keep outputs blanked. single AD570 selected, BLANK CONVERT line driven conversion, which indicated DATA READY going low, conversion result will present outputs. When this data been read from 8-bit bus, BLANK CONVERT restored blank mode clear data other converters. When several AD570s multiplexed sequence, conversion started AD570 while data being read from another. long data read first AD570 cleared within after start conversion second AD570, data overlap will occur.
Figure Sample-Hold Interface AD570 first comparator decision inside AD570). DATA READY line back other side differential input control gate that AD582 cannot come "hold" mode during conversion cycle. conversion cycle, DATA READY line goes low, automatically placing AD582 back into sample mode. This feature allows simple control both converter with single line. Observe carefully ground, supply, bypass capacitor connections between devices. arrangement minimizes ground noise interference during conversion cycle give most accurate measurements.
Figure Convert Pulse Mode
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AD570
INTERFACING AD570 MICROPROCESSOR
AD570 easily arranged driven from standard microprocessor control lines present data standard microprocessor (4-, 16-bit) with minimum additional control components. configuration shown Figure designed operate with 8-bit standard 8080 control signals. input control circuitry shown required ensure that AD570 receives sufficiently long input pulse. When converter ready start conversion, line low, low. command conversion, start address decode line goes low, followed line will high, followed about later This resets external flip-flop brings back low, which initiates conversion cycle. conversion cycle, line goes low, data outputs will become active with data control lines will return standby state. data will remain active until conversion commanded. self-pulsing nature this circuit guarantees sufficient convert pulse width. This data presented data enabling three-state buffers when desired. 8-bit data word loaded onto when decoded address goes line goes low. Polling converter determine conversion complete done addressing
improved technique interfacing involves special peripheral interfacing circuits devices), such MC6821 Peripheral Interface Adapter (PIA). Shown Figure straightforward application multiplex AD570 circuits. AD570 3-state outputs, hence data outputs paralleled, provided that only converter time permitted active state. DATA READY output AD570 open collector with resistor pull-up, thus several lines wire-ORed allow indication status selected device. 8-bit ports programmed 8-bit input port. 8-bits second port programmed outputs, along with control bits (which outputs), used control AD570s. When control line high state, will automatically blanked. That outputs will inactive open state. single control line switched low, will convert outputs will automatically active when conversion complete. result then read from port When next conversion desired, different control line switched zero, blanking previously active port same time. Subsequently, this second device read microprocessor, soforth. status lines wire-ORed groups connected remaining control pins. This allows conversion status check made after convert command, necessary. ADCs divided into groups minimize loading effect internal pull-up resistors DATA READY buffers. MC6821 data sheet more application detail.
INTERFACING WITH PERIPHERAL INTERFACE CIRCUIT
Figure Interfacing AD570 8-Bit (8080 Control Structure)
gate (shown dotted) which buffers line, desired. this configuration, there need additional buffer register storage. data stored indefinitely the, since line continually held low.
Figure Multiplexing AD570s Using Single Interface. Other Logic Required (6800 Control Structure)
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AD570
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
18-Lead Ceramic Dual-In-Line Package
0.005 (0.13)
0.098 (2.49)
0.310 (7.87)
0.960 (24.38) 0.200 (5.08) 0.200 (5.08) 0.125 (3.18)
0.220 (5.59)
0.060 (1.52) 0.015 (0.38)
0.320 (8.13) 0.290 (7.37)
0.150 (3.81)
0.015 (0.38) 0.008 (0.20)
0.023 (0.58) 0.014 (0.36)
0.100 (2.54)
0.070 (1.78) 0.030 (0.76)
SEATING PLANE
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PRINTED U.S.A.
C498b-5-3/86

Complete 8-Bit A-to-D Converter AD570* PRODUCT DESCRIPTION A

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