AD9071 10-Bit, MSPS Converter AD9071 FUNCTIONAL BLOCK DIAGRA

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

AD9071 10-Bit, MSPS Converter AD9071 FUNCTIONAL BLOCK DIAGRA

Datasheet Thumbnail

Top Searches for this datasheet

FEATURES 10-Bit, MSPS Power: MSPS On-Chip Track/Hold Analog Bandwidth SINAD On-Chip Reference Analog Input Range Single Supply Operation V/3.3 Outputs APPLICATIONS Digital Communications Signal Intelligence Digital Oscilloscopes Spectrum Analyzers Medical Imaging Sonar HDTV GENERAL DESCRIPTION
AD9071
10-Bit, MSPS Converter AD9071
FUNCTIONAL BLOCK DIAGRAM
VREF VREF
2.5V ENCODE LOGIC
D0-D9
ENCODE
TIMING
AD9071 monolithic sampling analog-to-digital converter with on-chip track-and-hold circuit TTL/CMOS digital interfaces. product operates MSPS conversion rate with outstanding dynamic performance over full operating range. requires only single supply encode clock full performance operation. digital outputs compatible. Separate output power supply pins support
interfacing with logic. out-of-range output (OR) available that indicates conversion result outside operating range. output data held saturation levels during out-of-range condition. input amplifier supports differential single-ended interfaces. internal reference included. Fabricated advanced BiCMOS process, AD9071 available plastic SOIC package specified over industrial temperature range (-40°C +85°C).
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. license granted implication otherwise under patent patent rights Analog Devices. Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 2001
AD9071-SPECIFICATIONS otherwise noted.)
Parameter RESOLUTION ACCURACY Differential Nonlinearity1 Integral Nonlinearity1 Missing Codes1 Gain Error2 Gain Tempco2 ANALOG INPUT Input Voltage Range (With Respect AIN) Common-Mode Voltage Input Offset Voltage Input Resistance Input Capacitance Input Bias Current Analog Bandwidth, Full Power REFERENCE OUTPUT Output Voltage Temperature Coefficient SWITCHING PERFORMANCE Maximum Conversion Rate Minimum Conversion Rate Encode Pulsewidth High (tEH) Encode Pulsewidth (tEL) Aperture Delay (tA) Aperture Uncertainty (Jitter) Output Valid Time (tV)3 Output Propagation Delay (tPD)3 Output Rise Time (tR) Output Fall Time (tF) DIGITAL INPUT Logic Voltage Logic Voltage Logic Current Logic Current Input Capacitance DIGITAL OUTPUTS Logic Voltage Logic Voltage Output Coding POWER SUPPLY Supply Current (VCC Supply Current (VDD Power Dissipation4 Power Supply Sensitivity5 25°C Full 25°C Full 25°C 25°C Full Full Temp
(VCC Differential Analog Input, ENCODE MSPS unless
Test Level
AD9071BR 1.25 Guaranteed
Unit Bits
+1.5/-1.0 +1.75/-1.0 1.75
ppm/°C
Full Full 25°C Full Full 25°C 25°C Full 25°C Full Full Full Full 25°C 25°C 25°C 25°C Full Full Full Full Full Full Full Full 25°C Full Full
-2.5
ppm/°C MSPS MSPS
-500 0.05 Offset Binary
Full Full Full 25°C
0.002
0.010
REV.
AD9071
Parameter DYNAMIC PERFORMANCE Transient Response Overvoltage Recovery Time Signal-to-Noise Ratio (SNR) (Without Harmonics) 10.3 Signal-to-Noise Ratio (SINAD) (With Harmonics) 10.3 Effective Number Bits 10.3 Harmonic Distortion 10.3 Harmonic Distortion 10.3 Two-Tone Intermodulation (IMD) 10.3
Temp 25°C 25°C
Test Level
AD9071BR
Unit
25°C Full 25°C Full
25°C Full 25°C Full 25°C 25°C 25°C 25°C 25°C 25°C 25°C 25°C
Bits Bits
NOTES Differential integral nonlinearity based MSPS. Gain error gain temperature coefficient based only (with fixed external reference). measured from threshold crossing ENCODE input levels digital outputs. output load during test Power dissipation measured under following conditions: MSPS, analog input dBFS 10.3 MHz. change input offset voltage with respect change SNR/harmonics based analog input voltage -1.0 dBFS referenced 1.024 full-scale input range. Typical thermal impedance style (SOIC) 28-lead package: 23°C/W, 48°C/W, 71°C/W. Specifications subject change without notice.
ABSOLUTE MAXIMUM RATINGS*
Analog Inputs Digital Inputs VREF VREF Digital Output Current Operating Temperature -40°C +85°C Storage Temperature -65°C +150°C Maximum Junction Temperature 150°C Maximum Case Temperature 150°C
*Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum ratings extended periods effect device reliability.
EXPLANATION TEST LEVELS Test Level
100% production tested.
100% production tested 25°C sample tested specified temperatures. III. Sample tested only. Parameter guaranteed design characterization testing. Parameter typical value only. 100% production tested 25°C; guaranteed design characterization testing industrial temperature range.
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD9071 features proprietary protection circuitry, permanent damage occur devices subjected high-energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
REV.
AD9071
ORDERING GUIDE
Model AD9071BR AD9071/PCB
Temperature Range -40°C +85°C 25°C
Package Description 28-Lead Wide Body (SOIC) Evaluation Board
Package Option R-28
FUNCTION DESCRIPTIONS
15-19, 24-28
Mnemonic VREF VREF ENCODE D9-D0
Function Ground Analog Power Supply. Nominally (Tie together prevent possible latch-up condition.) Internal Reference Output (VCC typical); Bypass with VCC. Reference Input (VCC typical). Connect Analog Input Complementary Analog Input True Encode clock ADC. (ADC Samples Rising Edge ENCODE.) Out-of-Range Output. Goes HIGH when converted sample more positive than 3FFH more negative than 000H (offset binary coding). Digital outputs ADC. MSB. Data offset binary. Digital Output Power Supply. User selectable range from
CONFIGURATION
Table Output Coding
VREF VREF
Code 1023 1023 1022
AIN-AIN 0.512 0.511 0.510 0.001 0.000 -0.001 -0.511 -0.512 -0.513
Offset Binary 1111 1111 1111 1111 1111 1110 0000 0001 0000 0000 1111 1111 0000 0001 0000 0000 0000 0000
AD9071BR
VIEW (Not Scale) (MSB)
ENCODE
CONNECT
REV.
AD9071
SAMPLE SAMPLE SAMPLE SAMPLE
ENCODE
SAMPLE
SAMPLE
D9-D0 DATA DATA DATA DATA DATA
DATA
Figure Timing Diagram
D9-0,
Figure Equivalent Analog Input Circuit
Figure Equivalent Digital Output Circuit
VREF
VREF
Figure Equivalent Reference Input Circuit
Figure Equivalent Reference Output Circuit
ENCODE
Figure Equivalent Encode Input Circuit
REV.
AD9071-Typical Performance Characteristics
FUNDAMENTAL -1.0dBFS 56.75dB SINAD 56.56dB HARMONIC -71.88dB HARMONIC -77.28dB
41.1MHz 42.1MHz -7.0dBFS
-100
-100
Spectrum: MSPS, 10.3
Two-Tone Intermodulation Distortion
FUNDAMENTAL -1.0dBFS 55.23dB SINAD 54.35dB HARMONIC -68.28dB HARMONIC -62.83dB
-100
SINAD
Spectrum: MSPS,
SINAD/SNR fIN: MSPS
9.63MHz 10.63MHz -7.0dBFS MSPS SINAD
-100
Two-Tone Intermodulation Distortion
SINAD/SNR 10.3
REV.
AD9071
SINAD
SINAD
ENCODE PULSEWIDTH
Differential 10.3
Clock Pulsewidth (tEH): 10.3
SINAD
-3dB ROLLOFF POINT
Single-Ended 10.3
Frequency Response
DIFFERENTIAL INPUT
SINGLE-ENDED
Second Harmonic Performance: SingleEnded Differential Input
REV.
AD9071
APPLICATION NOTES
THEORY OPERATION
AD9071 employs two-step subranging architecture with digital error correction. sampling conversion process initiated rising edge ENCODE input. analog input signal buffered high speed differential amplifier applied track-and-hold (T/H) circuit, which captures value input sampling instant maintains duration conversion. coarse quantizer (ADC) produces 5-bit estimate input value. digital output reconverted analog form reconstruction subtracted from input signal AMP. second stage quantizer generates 6-bit representation difference signal. eleven bits presented ENCODE LOGIC, which corrects range overlap errors produces accurate 10-bit result. Data strobed output rising edge ENCODE input, with data from sample appearing output following ENCODE rising edge N+3.
USING AD9071 ENCODE Input
comparators detect when analog input signal this range, output signal HIGH. digital outputs locked plus minus full scale (3FFH 200H) voltages that range, between Input voltages outside this range result invalid codes ADC's output.
VREF (+2.5V)
AD9071
Figure Single-Ended Analog Input Configuration
When analog input signal returns nominal range, out-of-range comparators return active mode device recovers overvoltage recovery time.
Voltage Reference
high-speed converter extremely sensitive quality sampling clock provided user. track/hold circuit essentially mixer, noise, distortion, timing jitter clock will combined with desired signal output. that reason, considerable care been taken design ENCODE input AD9071, user advised give commensurate thought clock source. lowest jitter clock source crystal oscillator producing pure sine wave. ENCODE input fully TTL/CMOS compatible.
Digital Outputs
stable accurate voltage reference (VCC built into AD9071 (VREF OUT). normal operation, internal reference used strapping Pins AD9071 together. internal reference provide extra drive current that used other circuits. Some applications require greater accuracy, improved temperature performance, adjustment gain AD9071, which cannot obtained using internal reference. these applications, external reference connected VREF which requires drive current (see Figure
digital outputs CMOS compatible lower power consumption. series resistors recommended between AD9071 receiving logic reduce transients improve SNR.
Analog Input
AD780
TRIM +VIN VOUT
AD9071
VREF
analog input been optimized differential signal input.
VREF (+2.5V)
SELECT CONNECT
Figure Using AD780 Voltage Reference
AD9071
input range adjusted varying reference voltage applied AD9071. appreciable degradation performance occurs when reference adjusted fullscale range tracks reference voltage changes linearly.
Timing
Figure Differential Analog Input Configuration
driven single-endedly, should connected clean reference bypassed ground. best dynamic performance, impedances should match. Special care taken design analog input section AD9071 prevent damage corruption data when input overdriven. nominal input range 1.988 3.012 (1.024 centered Out-of-range
performance AD9071 insensitive duty cycle clock over wide range operating conditions (see AD9071 provides latched data outputs, with three pipeline delays. Data outputs available propagation delay (tPD) after rising edge encode command (see Figure length output data lines, loads placed them, should minimized reduce transients within AD9071; these transients detract from converter's dynamic performance.
REV.
AD9071
minimum guaranteed conversion rate AD9071 MSPS. clock rates below MSPS, dynamic performance degrade. AD9070 will operate bursts, user must flush internal pipeline each time clock restarts. Valid data will produced fourth rising edge ENCODE signal after clock restarted.
EVALUATION BOARD
resistor Data Ready (R33), normally ohms, provided support various user output impedance configurations. AD9760 supports viewing reconstructed data
Voltage Reference
AD9071 evaluation board convenient easy evaluate performance AD9071 SOIC package. board consists internal voltage reference optional external reference, 74LCX574 latches capturing data from converter, AD9760 viewing reconstructed data. AD9071 output logic driven levels. latches tolerant. Test points provided Encode, DB9, DB0, Data Ready, Data Clock. clearly labeled.
Analog Input
AD9071 operated using internal voltage reference (connect optional external reference (connect E2). board shipped utilizing internal voltage reference.
Layout
AD9071 layout sensitive some important guidelines met. evaluation board layout provides example where these guidelines have been followed optimize performance. Provide good ground plane connecting analog digital sections. Excellent bypassing essential. Chip capacitors with values 0803 dimensions placed flush against pins. Placing capacitors bottom board degrade performance. These techniques reduce amount parasitic inductance that impact bypassing ability caps. Separate power planes supplies analog digital sections recommended. AD9071 evaluation board provided design example customers Analog Devices. makes warranties express, statutory, implied regarding merchantability fitness particular purpose.
evaluation board driven single-ended differentially. Differential input requires using transformer. single-ended operation (J2), Jumper connected connected differential input operation (J3), connected connected board shipped differential configuration.
Encode
AD9071 encode inputs driven single-ended into logic levels.
Data
data delivered AD9071 offset binary format levels. Data Ready signal inverted opening connections. optional series termination
Figure Printed Circuit Board Side Silkscreen
Figure Printed Circuit Board Bottom Side Silkscreen
REV.
AD9071
Figure Printed Circuit Board Side Copper
Figure Printed Circuit Board "Split" Power Layer
Figure Printed Circuit Board Ground Layer
Figure Printed Circuit Board Bottom Side Copper
-10-
REV.
REV.
74LCX574 VREF
DATABIT C37DPPF DATABIT
VREF
VREF
VREF VREF
DATABIT
DATABIT
ANALOG
DATABIT
CLOCK 74LCX574
ANALOG
AD9071
DATABIT
DATABIT
Figure Printed Circuit Board Schematic
ENCODE
DATABIT DATABIT
ENCODE
74LCX86 ENCODE
DATABIT
OVERRANGE
-11-
DATA
CLOCK
DATA READY
4.99k
DATA READY
IOUTA
VREF
DATA READY DATABIT DATABIT DATABIT DATABIT DATABIT DATABIT DATABIT DATABIT DATABIT DATABIT OVERRANGE
AD9760
IOUTB
DVDD AVDD COMP2 COMP1 FSADJ REFIO REFLO SLEEP
AD9071
AD9071
Table Printed Circuit Board Bill Materials
Item
Quantity
Reference C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R10, R11, R12, R13, R14, R15, R16, R17, R34, R35, R36, S10, S11, S12, TP1, TP2, TP3, TP4,
Description Ceramic Chip Capacitor, 0603, Tantalum Chip Capacitor, Jumpers SMB-P Connector 20-Pin Male Header 37-Pin Connector (Amp 747462-4) Surface Mount Resistor, 1206, Surface Mount Resistor, 1206, 2000 Surface Mount Resistor, 1206, Surface Mount Resistor, 1206, Surface Mount Resistor, 1206, 5000 Surface Mount Resistor, 1206, Surface Mount Resistor, 1206, Surface Mount Resistor, 1206, Jumpers Surface Mount Transformer Mini-Circuit T1-T1, Ratio 6-Pin Wieland Connector (P/N 25,602, 2653.0; 25.530 3625.0) Test Points 74LCX574 Octal Latch AD9071BR, 10-Bit, MSPS, AD9760AR, 10-Bit, MSPS, 74LCX86,
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
28-Lead Wide Body SOIC (R-28)
0.7125 (18.10) 0.6969 (17.70)
0.2992 (7.60) 0.2914 (7.40)
0.4193 (10.65) 0.3937 (10.00)
0.0118 (0.30) 0.0040 (0.10)
0.0500 (1.27)
0.0192 (0.49) SEATING 0.0138 (0.35) PLANE
0.0125 (0.32) 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
AD9071-Revision History
Location Data Sheet changed from REV. REV. Page
Edits ABSOLUTE MAXIMUM RATINGS -12- REV.
PRINTED U.S.A.
0.1043 (2.65) 0.0926 (2.35)
0.0291 (0.74) 0.0098 (0.25)
C00567b-0-8/01(C)

AD9071 10-Bit, MSPS Converter AD9071 FUNCTIONAL BLOCK DIAGRA

Top Searches for this datasheet

Other recent searches