AD9070 10-Bit, MSPS Converter AD9070 FUNCTIONAL BLOCK DIAGRA
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FEATURES 10-Bit, MSPS Power: Typical MSPS On-Chip Track/Hold Analog Bandwidth SINAD On-Chip Reference Analog Input Range Single Supply Operation: Differential Clock Input Available Standard Military Drawing Version APPLICATIONS Digital Communications Signal Intelligence Digital Oscilloscopes Spectrum Analyzers Medical Imaging Radar HDTV GENERAL DESCRIPTION
AD9070
10-Bit, MSPS Converter AD9070
FUNCTIONAL BLOCK DIAGRAM
VREF VREF COMP BYPASS -2.5V SOIC (BR) PACKAGE ONLY
ENCODE LOGIC
ENCODE ENCODE TIMING
PACKAGE ONLY
AD9070 monolithic sampling analog-to-digital converter with on-chip track-and-hold circuit digital interfaces. product operates MSPS conversion rate with outstanding dynamic performance over full operating range. requires only single supply encode clock full performance operation. digital outputs compatible, while differential clock input accommodates wide range logic levels. AD9070 operated Positive (PECL) environment with single supply. Out-of-Range output (OR) available version indicate that conversion result outside operating range. both package styles, output data held saturation levels during out-of-range condition.
input amplifier supports single-ended interfaces. internal -2.5 reference included SOIC packaged device external voltage reference required version). Fabricated advanced bipolar process, AD9070 available plastic SOIC package specified over industrial temperature range (-40°C +85°C), full MIL-PRF-38534 version (-55°C +125°C) ceramic Dual-in-Line Package (DIP).
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. license granted implication otherwise under patent patent rights Analog Devices. Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 2001
AD9070-SPECIFICATIONS
Parameter RESOLUTION ACCURACY Differential Nonlinearity Integral Nonlinearity Missing Codes Gain Error1 Gain Tempco1 ANALOG INPUT Input Voltage Range (with Respect AIN) Common-Mode Voltage Input Offset Voltage Input Resistance Input Capacitance Input Bias Current Analog Bandwidth, Full Power REFERENCE OUTPUT Output Voltage Temperature Coefficient SWITCHING PERFORMANCE Maximum Conversion Rate Minimum Conversion Rate Encode Pulsewidth High Encode Pulsewidth Aperture Delay (tA) Aperture Uncertainty (Jitter) Output Valid Time (tV)2 Output Propagation Delay PD)2 Output Rise Time (tR) Output Fall Time (tF) DIGITAL INPUTS Logic Voltage Logic Voltage Logic Current Logic Current Input Capacitance DIGITAL OUTPUTS Logic Voltage Logic Voltage Output Coding POWER SUPPLY Supply Current (VEE Power Dissipation3 Power Supply Sensitivity 25°C Full 25°C Full Full 25°C Full Full Full Full 25°C Full 25°C Full 25°C 25°C Full 25°C Full Full Full Full 25°C 25°C 25°C 25°C Full Full Full Full Full Full Full Full 25°C Full Full Temp
(VEE ENCODE MSPS, outputs loaded with otherwise noted.)
Test Level AD9070BR Guaranteed -2.5 -2.5 -2.6 +1.25/-1.0 +1.5/-1.0
unless
5962-9756301HXC Guaranteed +1.25/-1.0 +2.00/-1.0 2.25
Unit ppm/°C ppm/°C MSPS MSPS
-2.5
-2.4
0.85
0.85
-0.4 -1.5
-1.1
-0.4 -1.5
-1.1
-1.15 -1.60 Two's Complement
-1.1 -1.65 Two's Complement
Full Full
25°C
0.005
0.012
0.005
0.012
REV.
AD9070
Parameter DYNAMIC PERFORMANCE Transient Response Overvoltage Recovery Time Signal-to-Noise Ratio (SNR) (Without Harmonics) 10.3 Signal-to-Noise Ratio (SINAD) (With Harmonics) 10.3 Effective Number 10.3 Harmonic Distortion 10.3 Harmonic Distortion 10.3 Two-Tone Intermod Distortion (IMD) 10.3 Temp 25°C 25°C Test Level AD9070BR 5962-9756301HXC Unit
25°C Full 25°C Full
25°C Full 25°C Full 25°C 25°C 25°C 25°C 25°C 25°C 25°C 25°C
Bits Bits
NOTES Gain error gain temperature coefficient based only (with fixed -2.5 external reference). measured from threshold crossing ENCODE input levels digital outputs. output load during test Power dissipation measured under following conditions: MSPS, analog input dBFS 10.3 MHz. Power dissipation does include current external pull-down resistors that current output followers. change input offset voltage with respect change SNR/harmonics based analog input voltage -1.0 dBFS referenced 1.024 full-scale input range. Typical thermal impedance style (SOIC) 28-lead package: 23°C/W, 48°C/W, 71°C/W. Typical thermal impedance style (Ceramic DIP) 28-lead package: 8°C/W, 43°C/W, 51°C/W. Contact DSCC obtain latest revision 5962-9756301 drawing. Specifications subject change without notice.
SAMPLE
SAMPLE
SAMPLE
SAMPLE
ENCODE ENCODE
SAMPLE
SAMPLE
1/fs
D9-D0 DATA DATA DATA DATA DATA
DATA
Figure Timing Diagram
REV.
AD9070
ABSOLUTE MAXIMUM RATINGS* Table Output Coding
Analog Inputs +1.0 Digital Inputs VREF VREF Digital Output Current Operating Temperature -55°C +125°C Storage Temperature -65°C +150°C Maximum Junction Temperature 150°C Maximum Case Temperature 150°C
*Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions outside those indicated operation sections this specification implied. Exposure absolute maximum ratings extended periods affect device reliability.
Step 1024 1023 1022
AIN-AIN 0.512 0.511 0.510 0.001 0.000 -0.001 -0.511 -0.512 -0.513
Code >511 -511 -512 <512
Two's Complement 1111 1111 1111 1111 1111 1110 0000 0001 0000 0000 1111 1111 0000 0001 0000 0000 0000 0000
EXPLANATION TEST LEVELS Test Level
100% production tested.
100% production tested 25°C sample tested specified temperatures. Sample tested only. Parameter guaranteed design characterization testing. Parameter typical value only. 100% production tested 25°C; guaranteed design characterization testing industrial temperature range; 100% production tested temperature extremes military devices.
ORDERING GUIDE
Model AD9070BR AD9070/PCB 5962-9756301HXC
Temperature Range -40°C +85°C 25°C -55°C +125°C
Package Description Small Outline (SOIC) Evaluation Board Ceramic
Package Option R-28 DH-28
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD9070 features proprietary protection circuitry, permanent damage occur devices subjected high-energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
REV.
AD9070
FUNCTION DESCRIPTIONS Numbers AD9070BR AD9070DIP Package Package 28-24, 19-15 27-23, 20-16
Mnemonic VREF VREF COMP BYPASS ENCODE ENCODE D9-D0
Function Negative Power Supply. Nominally -5.0 Ground Internal Reference Output (-2.5 typical); Bypass with Ground Reference Input (-2.5 typical) Internal Amplifier Compensation, Reference Bypass Node, Analog Input Complement Analog Input True Encode Clock (ADC Samples Rising Edge ENCODE). Encode Clock Complement (ADC Samples Falling Edge ENCODE). Digital Outputs ADC. MSB. Data two's complement. Out-of-Range Output. Goes HIGH when converted sample more positive than 1FFh more negative than 200h (Two's Complement Coding).
CONFIGURATIONS SOIC
VREF VREF COMP BYPASS (MSB)
Ceramic
VREF (MSB)
AD9070BR
AD9070DIP
VIEW (Not Scale) ENCODE ENCODE (LSB)
VIEW (Not Scale) ENCODE ENCODE (LSB)
REV.
AD9070-Typical Circuit Applications
Figure Equivalent Analog Input Circuit
Figure Equivalent Digital Output Circuit
VREF
VREF
Figure Equivalent Reference Input Circuit
Figure Equivalent Reference Output Circuit
ENCODE
ENCODE
Figure Equivalent Encode Input Circuit
REV.
Typical Performance Characteristics-AD9070
FUNDAMENTAL -1.0dBFS 58.5dB SINAD 58.0dB HARMONIC -76.8dB HARMONIC -68.1dB
40.1MHz 41.0MHz -7.0dBFS
-100
-100
Spectrum: MSPS,
Tone Intermodulation Distortion
FUNDAMENTAL -1.0dBFS 56.8dB SINAD 55.0dB HARMONIC -66.6dB HARMONIC -60.8dB
SINAD NYQUIST FREQUENCY MHz)
-100
Spectrum: MSPS,
fIN; MSPS
9.57MHz 10.3MHz -7.0dBFS
SINAD
-100
MSPS
Tone Intermodulation Distortion
10.3
REV.
AD9070
SINAD
100MSPS 10.1MHz
100MSPS 10.1MHz
ENCODE PULSEWIDTH
Package (SOIC)
SINAD
Clock Pulsewidth (tEH)
NYQUIST FREQUENCY 50MHz
100MSPS 10.1MHz
Package
Frequency Response
REV.
AD9070
APPLICATION NOTES
Theory Operation
AD9070 employs two-step subranging architecture with digital error correction. sampling conversion process initiated rising edge ENCODE input. analog input signal buffered high speed differential amplifier applied trackand-hold (T/H) circuit that captures value input sampling instant maintains duration conversion. coarse quantizer (ADC) produces five-bit estimate input value. digital output reconverted analog form reconstruction subtracted from input signal AMP. second stage quantizer generates six-bit representation difference signal. eleven bits presented ENCODE LOGIC, which corrects range overlap errors produces accurate ten-bit result. Data strobed output rising edge ENCODE input, with data from sample appearing output following ENCODE rising edge N+3.
USING AD9070 ENCODE Input
recommended. better approach develop required voltage from internal external converter voltage reference (VREF OUT). Very small timing errors reduce performance dramatically. Total jitter only will limit performance sampling full-scale signal nine effective bits. AD9070's specified aperture jitter leaves only jitter budget clock source calculation). cleanest clock source only crystal oscillator producing pure sine wave. this configuration, with roughly symmetrical clock input, input coupled biased reference voltage that also provides ENCODE input (Figure This ensures that reference voltage centered ENCODE signal.
Digital Outputs
digital outputs compatible with logic. suggested pull-down However, reduce power consumption, higher value pull-down resistors used when driving very capacitance loads reduced encode rates. falling edge slew rate output bits will degraded with higher value pull-down resistors.
Analog Input
high speed converter extremely sensitive quality sampling clock provided user. Track/Hold circuit essentially mixer, noise, distortion timing jitter clock will combined with desired signal output. that reason, considerable care been taken design ENCODE input AD9070 user advised give commensurate thought clock source. ENCODE input fully differential operated differential single-ended mode. common-mode range easily driven differential driver. Proper termination important.
analog input AD9070 differential amplifier, design been optimized single-ended input. input should connected bypassed ground reference input signal. best dynamic performance, impedances should match. circuit Figure illustrates simple ac-coupled interface. midscale input voltage levels both provided internal reference (VREF OUT).
1Vp-p
VREF VREF ENCODE ENCODE COMP
AD9070
(MSB) (LSB) BYPASS -2V) -2V)
CLKIN (1Vp-p)
AD9070
ENCODE ENCODE ENCODE ENCODE
Figure Single-Ended ENCODE: AC-Coupled
single-ended mode, ENCODE input must tied appropriate reference voltage, generally midway between high levels incoming logic signal. Many circuits provide reference voltage intended this purpose. reference voltage produced dividing power supply voltage, noise supply used will couple clock input then output data. This
Figure AD9070 (ECL) Environment
REV.
AD9070
Figure shows typical connections analog inputs when using AD9070 dc-coupled system with single-ended signals. AD820 used offset ground referenced input signal level required AD9070. very high performance amplifier, such AD9631, required avoid degrading analog signal presented ADC. buffered interface easily implemented, with even fewer components (Figure 10).
0.5V
input protected volt outside power supply rails. nominal power ground), analog input will damaged with signals ranging from -6.0 +1.0
Voltage Reference
stable accurate -2.5 voltage reference built into AD9070 (VREF OUT) SOIC (BR) package. normal operation, internal reference used strapping Pins AD9070 together. internal reference provide extra drive current that used other circuits. Some applications require greater accuracy, improved temperature performance adjustment gain AD9070, which cannot obtained using internal reference. these applications, external -2.5 reference connected VREF which requires drive current (Figure 11).
AD9631
AD9070
AD820
VREF VREF
+VIN
VREF
AD780
VOUT 1.25k
1Vp-p
AD9070
VREF
Figure DC-Coupled Input Figure Using AD780 Voltage Reference
AD9631
AD9070
input range adjusted varying reference voltage applied AD9070. appreciable degradation performance occurs when reference adjusted fullscale range tracks reference voltage changes linearly.
Timing
VREF VREF
performance AD9070 insensitive duty cycle clock over wide range operating conditions: pulsewidth variations much will cause degradation performance (see AD9070 provides latched data outputs, with three pipeline delays. Data outputs available propagation delay (tPD) after rising edge encode command (Figure length output data lines loads placed them should minimized reduce transients within AD9070; these transients detract from converter's dynamic performance. minimum guaranteed conversion rate AD9070 MSPS. clock rates below MSPS, dynamic performance degrade. AD9070 will operate bursts, user must flush internal pipeline each time clock restarts. Valid data will produced fourth rising edge ENCODE signal after clock restarted.
Figure AC-Coupled Input
Special care taken design analog input section AD9070 prevent damage corruption data when input overdriven. nominal input range -1.988 -3.012 (1.024 centered -2.5 Out-of-range comparators detect when analog input signal this range output signal HIGH. digital outputs locked plus minus full scale (1FFh 200h) voltages that range between Input voltages outside this range result invalid codes ADCs output. When analog input signal returns nominal range, out-of-range comparators return active mode device recovers approximately
-10-
REV.
AD9070
Operation Package Options
AD9070 operated above ground, with single power supply. power supply ground pins connected pins connected ground (Figure 12). Care must taken connecting signals determining bypass rails. reference voltage (REF OUT) still generated with respect positive rail, which nominally voltage with respect ground will vary directly with changes power supply voltage (for example, power supply goes reference becomes reference input likewise processed with respect This dictates that these pins bypassed well. However, COMP BYPASS pins must continue bypassed most negative supply, which ground. input must still connected bypassed ground reference input signal.
VREF ENCODE ENCODE ENCODE ENCODE COMP BYPASS (LSB) +3V) VREF (MSB) +3V)
AD9070 available packages. package standard 28-lead Small Outline (SOIC). package ceramic Dual-in-Line Hybrid. SOIC offered commercial grade, specified over industrial (-40°C +85°C) temperature range. full MIL-PRF-38534 version that operates from (-55°C +125°C). SOIC version includes on-chip voltage reference, whereas does not. DIP, however, provides Overrange (OR) output, includes reference power supply bypassing, along with internal compensation capacitor. Equivalent performance obtained with either part though, internal bypassing, sensitive board layout parasitics.
1Vp-p
AD9070
Figure AD9070 (PECL) Environment
REV.
-11-
AD9070
AD9070BR EVALUATION BOARD Encode
AD780 REFERENCE VREF VREF COMP BYPASS 10H176 CARD CONNECT
AD9070
10H116
AD9070 encode inputs driven single-ended (connect drive with signal) differentially (connect drive with differential signals). board shipped single ended configuration. differential encode signal leaving board connector inverted interchanging (connect E5). This ensures that user will able capture data coming from evaluation board.
Data
10H176 RECVR CLKB BUFFERED LATCHED ON-CARD ENCODE CARD CONNECTOR
Data goes single-ended into 10H116 flip flops comes differentially. data coming AD9070 two's complement format, changed straight binary inverting connector schematic swapped).
Voltage Reference
AD9070 operated using internal bandgap reference (connect board AD780 external reference (connect E3). board shipped utilizing internal voltage reference.
Layout
Figure
AD9070 evaluation board convenient easy evaluate performance AD9070 SOIC package. board consists AD780 voltage reference (configured -2.5 10H176 (hex flip flop) capturing data from converter five 10H116 triple line receivers buffering encode signal driving data edge connector. Termination resistors (RP11, RP12, RP14) provided data leaving board connector; (they removed termination resistors already provided user).
Analog Input
AD9070 layout-sensitive some important guidelines met. evaluation board layout provides example where these guidelines have been followed optimize performance.
Provide good ground plane connecting analog digital sections. Excellent bypassing essential. Chip caps with values 0603 dimensions placed flush against pins. Placing caps bottom board degrade performance. These techniques reduce amount parasitic inductance which impact bypassing ability caps. Separate power planes supplies analog digital sections recommended.
evaluation board requires peak-to-peak signal centered ground (J1). This signal ac-coupled then shifted -2.5 before input converter.
AD9070 evaluation board provided design example customers Analog Devices. makes warranties express, statutory, implied regarding merchantability fitness particular purpose.
-12-
REV.
REV.
10PT RP11 10PT RP12 C37DRPF CON1
ADRB
10PT RP14 10PT RP15 10PB RP17
10H116
AD780N
VOUT TRIM
1.25k
+VIN TEMP
ADRB BIT1 BIT1B BIT2B BIT2 BIT3B BIT3 BIT4B BIT4 BIT5B BIT5 BIT6B BIT6 BIT7B BIT7
BIT1 BIT2B BIT1 BIT2B
BIT8B BIT8 BIT9B BIT9 BIT10B BIT10
10H176 AD9070BR
LCLK BIT5 BIT5B BIT3 BIT3B BIT4 BIT4B
-5.2V 10H116
10H176
1.0k
ENCB
10H116
Figure Evaluation Board Schematic
LCLK
-13-
-5.2 LCLK ENCB LCLK -5.2V
10H116
VREFOUT VREFIN COMP (MSB) BYPASS ENCODE ENCODE (LSB)
BIT8 BIT8B BIT6 BIT6B BIT7 BIT7B
CLKB
ADRB BIT1B BIT2B BIT3B BIT4B BIT5B BIT6B BIT7B BIT8B BIT9B BIT10B BIT1B BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 BIT8 BIT9 BIT10
10H116 CLKB
10H116
10H116
10H116 CLKB
BIT10 BIT10B BIT9 BIT9B
AD9070
AD9070
Figure Component Side
Figure Bottom Side Trace Components
Figure Component Side Signal Traces
Figure Analog/Digital Split Power Plane
-14-
REV.
AD9070
Table Evaluation Board Bill Materials
Item
Refd U7-U11 RP11, RP12, RP14, RP15 TB1, RP1, RP2, C32, C34, C35, C37, C11, C12, C14-C18, C20, C22-C26, C28, C38-C44 C29, CON1 E1-E9,
Description 10H116 TRIPLE DIFFERENTIAL LINE RECEIVER 10H176 10KH HIGH SPEED 10PT-5.2 NTWK 6PB-5.2 BUSED NTWK 8291Z2 2-PIN TERMINAL BLOCK 8PB-5.2 BUSED NTWK AD780N HIGH PREC VOLT AD9070R AD9070 SOIC BCAP0603 CHIP 0603, BCAP0805 CHIP 0805, BCAPTAJD CHIP TANT CAP, COAX CONN PCMT BRES1206 SURF 1206, 1.25 BRES1206 SURF 1206, BRES1206 SURF 1206, BRES1206 SURF 1206, BRES1206 SURF 1206, C37DRPF CONN PLASTIC PCMT FEMALE T330A TANT CAP, W-HOLE WIRE HOLE
REV.
-15-
AD9070
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
28-Lead SOIC (R-28)
C00565a-0-7/01(C)
0.0291 (0.74) 0.0098 (0.25) 0.7125 (18.10) 0.6969 (17.70)
0.1043 (2.65) 0.0926 (2.35)
0.0118 (0.30) 0.0040 (0.10)
0.0500 (1.27)
0.0500 (1.27) 0.0192 (0.49) 0.0157 (0.40) SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
28-Lead Hermetic Ceramic (DH-28)
IDENTIFIERS 0.225 (5.72)
1.400 0.014 (35.56 0.35)
0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00)
0.595 0.010 (15.11 0.25)
0.050 0.010 (1.27 0.25) 0.150 (3.81)
0.010 0.002 (0.25 0.05) 0.600 (15.24)
0.018 0.002 (0.46 0.05)
0.100 (2.54) 0.05 (1.27)
SEATING PLANE
AD9070-Revision History
Location Page
Data Sheet changed from REV. REV. Edit ABSOLUTE MAXIMUM RATINGS
-16-
REV.
PRINTED U.S.A.
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