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Quad Single Supply Comparator AD8564 CONFIGURATIONS 16-Lead Narro


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FEATURES Single-Supply Operation Propagation Delay Power Separate Input Output Sections CMOS Logic Compatible Outputs Wide Output Swing TSSOP, SOIC PDIP Packages APPLICATIONS High Speed Timing Line Receivers Data Communications High Speed V-to-F Converters Battery Operated Instrumentation High Speed Sampling Systems Window Comparators Read Channel Detection PCMCIA Cards Upgrade MAX901 Designs
Quad Single Supply Comparator AD8564
CONFIGURATIONS 16-Lead Narrow Body Suffix) R-16A
V-ANA V+ANA V+DIG
16-Lead Epoxy Suffix) N-16
V+ANA
V-ANA
AD8564
V+DIG
AD8564
16-Lead TSSOP (RU-Suffix) RU-16
V-ANA V+ANA V+DIG
GENERAL DESCRIPTION
AD8564
AD8564 quad comparator with separate input output supplies, thus enabling input stage operated from dual supplies single supply while maintaining CMOS/TTL-compatible output. Fast propagation delay makes AD8564 good choice timing circuits line receivers. Independent analog digital supplies provide excellent protection from supply interaction. AD8564 compatible with MAX901, lower supply currents. four comparators have similar propagation delays. propagation delay rising falling signals similar, tracks over temperature voltage. These characteristics make AD8564 good choice high speed timing data communications circuits. similar dual comparator with latch function, please AD8598 data sheet. similar single comparator with latch function, please AD8561 data sheet. AD8564 specified over industrial (-40°C +85°C) temperature range. quad AD8564 available 16lead plastic DIP, narrow SO-16 surface mount, 16-lead TSSOP packages.
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices. Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 1999
AD8564-SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Input Offset Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance DIGITAL OUTPUTS Logic Voltage Logic Voltage DYNAMIC PERFORMANCE Propagation Delay Propagation Delay Differential Propagation Delay (Rising Propagation Delay Falling Propagation Delay) Rise Time Fall Time POWER SUPPLY Power Supply Rejection Ratio Analog Supply Current Digital Supply Current Analog Supply Current
NOTES Guaranteed design. Specifications subject change without notice.
+ANA
V+DIG +5.0 V-ANA unless otherwise noted)
Conditions -40°C +85°C -40°C +85°C +3.0 3000 6.75 +2.75 Units µV/°C
Symbol VOS/T CMRR
-3.2 Step with Overdrive -40°C +85°C1 Step with Overdrive1 Step with Overdrive1 +4.5 V+ANA V+DIG +5.5 -40°C +85°C -40°C +85°C -40°C +85°C
10.5 -7.0
PSRR I+ANA IDIG I-ANA
14.0 15.6 14.0 15.6
ELECTRICAL SPECIFICATIONS
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Input Offset Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance DIGITAL OUTPUTS Logic Voltage Logic Voltage
+ANA
V+DIG +5.0 V-ANA unless otherwise noted)
Conditions -40°C +85°C -40°C +85°C +3.0 -4.9 3000 +3.5 Units µV/°C
Symbol
VOS/T CMRR
-3.2
REV.
AD8564
Parameter DYNAMIC PERFORMANCE Propagation Delay Propagation Delay Differential Propagation Delay (Rising Propagation Delay Falling Propagation Delay) Rise Time Fall Time POWER SUPPLY Power Supply Rejection Ratio Analog Supply Current Digital Supply Current Analog Supply Current
NOTES Guaranteed design. Specifications subject change without notice.
Symbol
Conditions Step with Overdrive -40°C +85°C1 Step with Overdrive1 Step with Overdrive1 +4.5 V+ANA V+DIG +5.5 -40°C +85°C -40°C +85°C -40°C +85°C
6.75
Units
10.8 -8.2
PSRR I+ANA IDIG I-ANA
14.0 15.6 14.0 15.6
ABSOLUTE MAXIMUM RATINGS
Total Analog Supply Voltage Digital Supply Voltage Analog Positive Supply-Digital Positive Supply -600 Input Voltage1 Differential Input Voltage Output Short-Circuit Duration Indefinite Storage Temperature Range Package -65°C +150°C Operating Temperature Range -40°C +85°C Junction Temperature Range Package -65°C +150°C Lead Temperature Range (Soldering, sec) +300°C
Package Type 16-Lead Plastic 16-Lead Narrow Body 16-Lead TSSOP (RU)
Units °C/W °C/W °C/W
NOTES analog input voltage equal analog supply voltage, whichever less. specified worst case conditions, i.e., specified device socket for, P-DIP, specified device soldered circuit board SOIC TSSOP packages.
ORDERING GUIDE
Model AD8564AN AD8564AR AD8564ARU
Temperature Range -40°C +85°C -40°C +85°C -40°C +85°C
Package Description 16-Lead Plastic 16-Lead Narrow Body SOIC 16-Lead Thin Shrink Small Outline (TSSOP)
Package Options N-16 R-16A RU-16
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although AD8564 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
REV.
AD8564 -Typical Performance Characteristics
1.000 0.000
V+DIG unless otherwise noted)
V+ANA V+DIG V-ANA INPUT BIAS CURRENT
INPUT OFFSET VOLTAGE
INPUT BIAS CURRENT
0.800
-1.000
0.600
-2.000
0.400
-3.000
0.200
-4.000
0.000 TEMPERATURE
-5.000 TEMPERATURE
-7.5
-2.5 INPUT COMMON-MODE VOLTAGE
Figure Input Offset Voltage Temperature
Figure Input Bias Current Temperature
Figure Input Bias Current Input Common-Mode Voltage
STEPSIZE 100mV OVERDRIVE
5.000
NUMBER AMPLIFIERS
OUTPUT HIGH VOLTAGE
PROPAGATION DELAY
4.400 3.800
tPDHL
tPDLH
3.200 2.600
INPUT OFFSET VOLTAGE
TEMPERATURE
2.000
SOURCE CURRENT
Figure Input Offset Voltage
Figure Propagation Delay, tPDHL/ tPDLH Temperature
Figure Output High Voltage, Source Current
0.500 I+ANA, SUPPLY CURRENT
5.000
I-ANA, SUPPLY CURRENT
0.000
OUTPUT VOLTAGE
0.400 0.300
4.000 3.000 2.000 1.000
-1.000
-2.000 -3.000
0.200
0.100
-4.000
0.00
SINK CURRENT
0.000
V+ANA SUPPLY VOLTAGE
-5.000
V-ANA SUPPLY VOLTAGE
Figure Output Voltage, Sink Current
Figure I+ANA: Analog Supply Current/Comparator Supply Voltage
Figure I-ANA: Analog Supply Current/Comparator Supply Voltage
REV.
AD8564
3.000
I+DIG, SUPPLY CURRENT
5.000
I+ANA, SUPPLY CURRENT
0.000
I-ANA, SUPPLY CURRENT
2.500
4.000 V+ANA 3.000 V+ANA 2.000
-1.000 V+ANA -2.000 V+ANA
2.000 1.500
-3.000
1.000
0.500
1.000
-4.000
0.000
V+DIG SUPPLY VOLTAGE
TEMPERATURE
-5.000
TEMPERATURE
Figure I+DIG: Digital Supply Current/Comparator Supply Voltage
Figure I+ANA Analog Supply Current/Comparator Temperature
Figure I-ANA: Analog Supply Current/Comparator Temperature
2.000
I+DIG, SUPPLY CURRENT
1.500
1.000
0.500
0.000 TEMPERATURE
Figure I+DIG: Digital Supply Current/ Comparator Temperature
APPLICATIONS
OPTIMIZING HIGH SPEED PERFORMANCE
power supply pins ground. These capacitors charge reservoir device during high frequency switching. ground plane recommended proper high speed performance. This created using continuous conductive plane over surface circuit board, only allowing breaks plane necessary current paths. ground plane provides inductance ground, eliminating potential differences different ground points throughout circuit board caused from "ground bounce." proper ground plane also minimizes effects stray capacitance circuit board.
OUTPUT LOADING CONSIDERATIONS
with high speed comparator amplifier, proper design layout techniques should used ensure optimal performance from AD8564. performance limits high speed circuitry easily result stray capacitance, improper ground impedance other layout issues. Minimizing resistance from source input important consideration maximizing high speed operation AD8564. Source resistance combination with equivalent input capacitance could cause lagged response input, thus delaying output. input capacitance AD8564 combination with stray capacitance from input ground could result several picofarads equivalent capacitance. combination source resistance input capacitance yields time constant which slower than capability AD8564. Source impedances should less than best performance. also important provide bypass capacitors power supply high speed application. electrolytic bypass capacitor should placed within inches each power supply ground. These capacitors will reduce potential voltage ripples from power supply. addition, ceramic capacitor should placed close possible from REV.
AD8564 output deliver output current without significant increase propagation delay. output device should connected more than twenty (20) input logic gates, drive load resistance less than ensure best performance from AD8564 important minimize capacitive loading output device. Capacitive loads greater than will cause ringing output waveform will reduce operating bandwidth comparator. Propagation delay will also increase with capacitive loads above
AD8564
INPUT STAGE BIAS CURRENTS
AD8564 uses differential input stage which enables input common-mode range extend from negative supply rail within positive supply rail. input common-mode voltage found average voltage inputs device. ensure fastest response time, care should taken allow input common-mode voltage exceed this voltage. input bias current AD8564 with differential input stage, this bias current will zero input that high will double input that low. Care should taken choosing resistor values connected inputs large resistors could cause significant voltage drops input bias current. input capacitance AD8564 typically This measured inserting source resistance input measuring change propagation delay.
USING HYSTERESIS
input signal connected directly inverting input comparator. output back noninverting input through ratio establishes width hysteresis window with VREF setting center window, average switching voltage. output will switch high when input voltage greater than will switch again until input voltage less than given Equation
-1-V
Where positive supply voltage.
Hysteresis easily added comparator through addition positive feedback. Adding hysteresis comparator offers advantage noisy environments where desirable output toggle between states when input signal near switching threshold. Figure shows method configuring AD8564 with hysteresis.
COMPARATOR SIGNAL
capacitor also added introduce pole into feedback network. This effect increasing amount hysteresis high frequencies. This useful when comparing relatively slow signal high frequency noise environment. frequencies greater than
hysteresis window approaches frequencies less than threshold voltages remain Equation
VREF
Figure Configuring AD8564 with Hysteresis
REV.
AD8564
Spice Model AD8564 SPICE Macro-Model Typical Values 8/98, Ver. ADSC Node assignments noninverting input inverting input positive supply .SUBCKT AD8564 INPUT STAGE IBIAS 800E-6 2.5E-12 3E-12 (4,6) 1E-3 Reference Voltage EREF POLY(2) (99,0) (50,0) RDUM 100E3 POLY(1) (99,50) 8E-3 -2.6E-3 Gain Stage Av=250 fp=100MHz (4.6) 0.25 16E-13 0.71 0.71 Output Stage POLY(1) (20,98) POLY(1) (20,98) MODELS .MODEL PNP(BF=100,VAF=130,IS=1E-14) .MODEL NPN(BF=100,VAF=130,IS=1E-14) .MODEL D(IS=1E-14,CJO=1E-15)
negative supply
Output
.ENDS AD8564 REV.
AD8564
OUTLINE DIMENSIONS
Dimensions shown inches (mm).
16-Lead Epoxy (N-16)
16-Lead Narrow Body SOIC (R-16A)
0.3937 (10.00) 0.3859 (9.80)
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
0.0500 SEATING (1.27) PLANE
0.0192 (0.49) 0.0138 (0.35)
0.0099 (0.25) 0.0075 (0.19)
0.0500 (1.27) 0.0160 (0.41)
16-Lead Thin Shrink Small Outline (TSSOP) (RU-16)
REV.
PRINTED U.S.A.
C3219a-2-6/99

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