Application Note March 1998 AN1116 Variable Pulse Width Variable

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Application Note March 1998 AN1116 Variable Pulse Width Variable

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CMOS Applications Information
Application Note March 1998 AN1116
Variable Pulse Width Variable Frequency Pulse Generator
This application uses driver EL7972 oscillator drive driver. frequency using pulse width adjusting Capacitors decoupling capacitors. fixed pulse width output available while variable pulse width signal available these particular component values maximum pulse width available frequency approximated relation:
f(Hz) (1.5) VDD(R1) (C1)
100V Stable High Switch
This application uses EL7761 drive gate NMOS above FET's source drain voltage. This circuit would useful applications where load must energized continuously automobile headlight circuit high side switch distributed power application. side driver self oscillates frequency determined input hysteresis conjunction with output oscillator (pins drive charge pump which powers high side drive section EL7761. voltage shuts drive external well shutting down charge pump oscillator putting chip into supply current mode. Capacitors used decouple supplies. must least diode drop higher than desired enhancement external FET. reverse breakdown zener diode should less than order avoid overvoltage high side driver. Depending exact nature circuit zener diode always necessary.
pulse width approximated relation:
Twidth (4.5 10-6) R2500KVDD -100ns
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2004. Rights Reserved. Elantec registered trademark Elantec Semiconductor, Inc. other trademarks mentioned property their respective owners.
Application Note 1116 Synchronous Buck Regulator Driver
this application driver EL7981 used drive main switch buck regulator while other driver drives synchronous switch. transformer used obtain high side switching voltage sets dead time delay between times adjustable delay perfect devices with long turn times such IGBT's.
Buck Regulator High Side Drive Using EL7501
These circuits show ways using EL7501 drive high side switch buck converter application. first method uses resistors bias middle drive voltage swing This allows single sided drive. high side voltage pumped from supply. second method uses complementary drive signal pins EL7501. derives high side supply voltage charging capacitor through resistor then using external pump that voltage above high side supply.
dead time with IGBT's.
FIGURE SYNCHRONOUS BUCK REGULATOR
FIGURE EL7501 BUCK REGULATOR WITH HIGH SIDE DRIVE FIRST METHOD
FIGURE EL7501 BUCK REGULATOR WITH HIGH SIDE DRIVE (ALTERNATE BIASING SCHEME) SECOND METHOD
Application Note 1116 Self Powered Stable 100V Half Bridge Driver
This circuit uses driver EL7972 provide side drive other driver charge pump oscillator. output charge pump oscillator drives capacitor diode network provide high side supply voltage EL7501. EL7501 drives high side external N-FET. addition charge pump this circuit will work driving frequency from >1MHz. driver. value chosen that IGBT's never conduct same time. IGBT's have different turn characteristics then EL7982 could used instead EL7981. EL7982 independent control each driver's rising edge delay.
Self Oscillating IGBT Driver
This circuit self oscillates approximately 25kHz. times each driver depend values order ensure equal times accurate component values need used. resistor, controls dead time between times both drivers.
IGBT Half Bridge Driver
This circuit shows EL7981 being used drive IGBT half bridge. high side IGBT transformer coupled
EL7961 substituted enable feature desired.
FIGURE FUNCTIONAL HALF BRIDGE DRIVER
FIGURE IGBT HALF BRIDGE DRIVER
Diodes 1N4148 sets dead time Approximately 25kHz oscillation
FIGURE SELF OSCILLATING IGBT DRIVER, DC-DC STEP DOWN)
Application Note 1116 Watt-12V Step Down Regulator Using Synchronous Switch
This circuit shows EL7761 could used half bridge driver step down converter. circuit switches 250kHz. zener voltage rises above ground. When reaches Vton chip enabled. lowered such that voltage falls below Vtoff, chip disabled. threshold tolerances follows:
1.0V Vton 1.6V 0.3V Vton Vtoff 1.0V Vturn-on Vton Vturn-off Vtoff
Simple Undervoltage Lockout Circuit
using zener diode pull down resistor user implement simple UVLO circuit. increases above
FIGURE STEP DOWN SYNCHRONOUS SWITCHES
Vturn-on Vton Vturn-off Vtoff FIGURE SIMPLE UVLO CIRCUIT EL7761 FIGURE SIMPLE UVLO CIRCUIT EL79X1
Application Note 1116 Video Sync Pulse Generator
EL7501 inputs function outside power supply rails, allowing ground referenced signal control ground output swing. output resistors adjusted tailor rise fall times circuit.
Principle Operation
When input drops below 2.4V, pulls high, allowing current flow from thru thus charging Initially full voltage appears across inductor, current starts flow, begins charge. When reaches supply voltage, current continues flow inductor reverses direction continues charge capacitor beyond supply voltage. When reaches it's peak, "ring" diode disconnects, holding that potential across peak voltage controlled adjusting circuit "Q". Typically this accomplished varying size inductor since "on" resistance driver limit circuit "Q". This governed expression:
Synchronous Switch Increases Boost Efficiency
EL7501 plus N-FET replaces catch diode boost regulator. When higher than pin, turned effectively shorting parasitic diode FET. small resistor added series with order "tune" turn-on delay FET.
where: Thus, higher "Q", higher voltage swing maintained making large compared typ. EL7501.) Similarly, when pin-6 pulls low, output resonates below ground provide good turn-off. Since charge transferred mostly thru inductor, rather than resistor efficiency much higher. circuit performance summarized below.
TABLE CONDITIONS: 5VFC 220kHz INDUCTANCE Case Case 47µH VOUT VOUT -2.1V -12V TR/TF 60ns 300ns
Resonant Gate Driver
Resonant gate driver used boost gate voltage swing while increasing driver efficiency. Figure EL7501 configured with external "ring" diodes resonating inductor tutorial purposes, power MOSFET load replaced 1000pF capacitor (CL). "ring" diodes fast switching diodes capable withstanding peak current, such 1N914. Standard de-coupling techniques applied with applied VDD, circuit delivers +10V output. only" systems, sufficient output swing available eliminate need costly "logic level" power FETs, provides below ground swing superior turn-off.
power consumption measured Case 40mW. Using "resistive" charging power dissipation/consumption 200mW anticipated, thus resulting fold improvement efficiency.
(1.5) R2R1
Application Note 1116
FIGURE RESONANT GATE DRIVER
0.6RSENSE Recovery Time FIGURE DRIVER WITH UNDER-VOLTAGE LOCK-OUT FIGURE OVER-CURRENT PROTECTED DRIVER
(1.5) FIGURE DRIVER WITH SIMULTANEOUS CONDUCTION LOCK-OUT FIGURE DRIVER WITH OVER-VOLTAGE PROTECTION
TABLE TRUTH TABLE
Application Note 1116 MOSFET Driver Generates +12V Supply
When want drive power MOSFET, from 3.3V system, generating extra +12V supply involve quite large number both active passive components. Here solution that uses spare second MOSFET Driver channel derive +12V supply. using driver with drains brought separated pins, connect inductor between N-channel drain logic supply, without having P-channel device connected. operation, works standard flyback style switched mode circuit. When output N-channel device current starts flowing inductor, storing energy. When N-channel device turned off, current continue flowing, flows through diode charge capacitors cycle repeats, voltage rises until zener diode prevents further voltage rise. This needed prevent drivers' derived supply from exceeding parts' maximum voltage rating. Since objective minimize number external components cost, additional components which would allow circuit self oscillate regulate were omitted. logic system able supply drive pulse waveform supply generator. With system, using 1.5µs pulse every 9µs. This gave very solid +12.4V, system supply current went about 11mA. 3.3V system used 300kHz square wave, similar derived supply, with nearly 40mA extra supply current. both systems, when MOSFET Driver being used, could "powered down" simply stopping pulses switching channel. dual MOSFET Driver used, drains output stage separated, there some protection other parasitic devices that prevent satisfactory operation. these cases external used drive inductor, provided threshold device used. altering inductor value controlling pulses, enough power derived further MOSFET Drivers other peripheral devices requiring +12V.
FIGURE SELF CHARGE PUMPING MOSFET DRIVER
Application Note 1116 Super Inverters
CMOS often equated with power, however dynamic losses significant, particularly frequency operation increases. Losses attributed parasitic capacitance internal nodes which toggle (described CV2f), from simultaneous conduction through CMOS gates during switching. Parasitic capacitance reduced shrinking feature sizes using overlap, self aligned silicon-gate process technology. Simultaneous conduction (shoot-thru) controlled eliminated completely with "super-inverter" technology. standard CMOS inverter shown Figure 15A. Here, with every transition, there interval during which both NMOS PMOS transistors conducting dissipating energy.
FIGURE 16A. SUPER INVERTER
FIGURE 16B. SUPER INVERTER SWITCHING LOSSES
Input Source Follower
FIGURE 15A. STANDARD CMOS INVERTER
accommodate moderately high source inpedances, source follower input stage similar circuit shown Figure used. This eliminates both "Miller" gate capacitance, gate source capacitance seen typical designs. "boot-strapping" effect eliminates gate-drain capacitance. This feature allows direct drive from current logic, without degradation performance.
FIGURE 15B. CMOS INVERTER SWITCHING LOSSES
Thus integral instantaneous shoot-thru current, multiplied supply voltage clock frequency describes power loss.
2fVtoIS(t)dt FIGURE INPUT CAPACITANCE SOURCE FOLLOWER
These losses significant, illustrated Figure 15B. super-inverter shown Figure overcomes "shoot-thru" problem with "break before make" asymmetric drive, thereby controlling eliminating simultaneous conduction. designer trade-off shootthru current added propagation delay. results demonstrated Figure represent about improvement. added benefit reduced power supply bounce resulting from di/dt stray inductance.
Precision Level Shifting
Generating rail rail drive from logic level input accomplished with Class push-pull amplifier internal 1.2V reference. This produces well controlled threshold with minimal propagation delay. known switch point used generate under-voltage lock-out protection. Hysterisis also introduced boost noise immunity.
Application Note 1116 3-State Gated Inputs
Additional logic functions also provided insure greater flexibility. 3-State control often useful "Bridge" "Bus" applications. Gated inputs used chip enable/shutdown, latching, various other functions.
Overall Performance
resulting CMOS Drivers offer both functionality performance. Figure shows switching characteristics into 1000pF load. Rise time, fall time, delay matched minimize pulse distortion, less than 20ns. Figure illustrates waveform integrity 5MHz, into 1000pF.
2.000V/div 4.000V/div Timebase 100ns/div
FIGURE STEP RESPONSE INTO 1000pF LOAD
1.000V/div 5.000V/div Timebase 20.0ns/div
FIGURE 5MHz OUTPUT INTO 1000pF LOAD
Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that Application Note Technical Brief current before proceeding.
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Application Note March 1998 AN1116 Variable Pulse Width Variable

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