Mapping Controller PATENTED 099352 Technical Document

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Mapping Controller PATENTED 099352 Technical Document

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HT1623
Mapping Controller
PATENTED
099352
Technical Document
Application Note
Features
Operating voltage: 2.7V~5.2V Built-in oscillator External 32.768kHz crystal 32kHz frequency Built-in display address auto increment selection buzzer frequencies (2kHz 4kHz) Power down command reduces power consumption Software configuration feature Data mode Command mode instructions Three data accessing modes VLCD adjust operating voltage HT1623: 100-pin package
source input
bias, duty, frame frequency 64Hz Max. patterns, commons, segments Built-in internal resistor type bias generator 3-wire serial interface kinds time base selection Time base overflow output
HT1623G: Gold bumped chip
General Description
HT1623 peripheral device specially designed type used expand display capability. max. display segment device patterns also supports serial interface, buzzer sound, watchdog timer time base timer functions. HT1623 memory mapping multi-function controller. software configuration feature HT1623 make suitable multiple applications including modules display subsystems. Only three lines required interface between host controller HT1623. HT162X series have many kinds products that match various applications.
Selection Table
HT162X Built-in Osc. Crystal Osc. HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626
Rev. 1.50
June 2009
PATENTED
Block Diagram
HT1623
Assignment
Rev. 1.50
June 2009
PATENTED
Assignment
HT1623
Chip size: (mil)2 Bump height: 18mm Min. Bump spacing: 23.102mm Bump size: 76mm2 substrate should connected layout artwork.
Rev. 1.50
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PATENTED
Coordinates
-1328.790 -1328.790 -1328.785 -1337.200 -1337.162 -1337.925 -1337.925 -1337.887 -1337.925 -1343.075 -1337.925 -1337.925 -1337.925 -1337.925 -1337.925 -1337.925 -1337.925 -1337.887 -1076.690 -977.669 -878.570 -779.549 -680.449 -488.720 -389.620 -197.889 -98.790 92.941 192.040 383.771 482.871 674.600 773.701 965.431 1064.531 1256.260 1200.109 1008.378 909.341 696.447 475.635 376.661 277.639 178.570 79.595 -79.689 -260.141 -444.992 -625.740 -724.760 -823.859 -922.880 -1021.979 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 -1228.075 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 1322.060 451.081 352.060 252.960 153.939 54.840 -44.181 -143.279 -242.301 -341.399 -440.420 -539.520 -638.541 -737.640 -836.661 -935.760 -1034.781
HT1623
Unit: -779.760 -522.546 -423.524 -324.425 -225.404 -126.305 -27.285 71.814 170.835 269.935 368.956 468.055 567.076 666.174 765.195 864.294 963.315 1062.415 1161.436 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600 1226.600
Rev. 1.50
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PATENTED
Description
Name Description
HT1623
Chip selection input with pull-high resistor. When logic high, data command read from written HT1623 disabled. serial interface circuit also reset logic level input pad, data command transmission between host controller HT1623 enabled. READ clock input with pull-high resistor. Data HT1623 clocked falling edge signal. clocked data will appear data line. host controller next rising edge latch clocked data. WRITE clock input with pull-high resistor. Data DATA line latched into HT1623 rising edge signal. Serial data input output with pull-high resistor Negative power supply, ground OSCI OSCO pads connected 32.768kHz crystal order generate system clock. system clock comes from external clock source, external clock source should connected OSCI pad. on-chip oscillator selected instead, OSCI OSCO pads left open. Positive power supply operating voltage input pad. Time base watchdog timer overflow flag, NMOS open drain output 2kHz 4kHz tone frequency output pair connected common outputs segment outputs
DATA OSCI
OSCO
13~15 16~23 24~71
VLCD T1~T3 COM0~COM7 SEG0~SEG47
Absolute Maximum Ratings
Supply Voltage .-0.3V 5.5V Input Voltage.VSS-0.3V VDD+0.3V Storage Temperature .-50°C 125°C Operating Temperature.-25°C 75°C
Note: These stress ratings only. Stresses exceeding range specified under Maximum cause substantial damage device. Functional operation this device other conditions beyond those listed specification implied prolonged exposure extreme conditions affect device reliability.
Rev. 1.50
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PATENTED
D.C. Characteristics
Symbol IDD1 Parameter Operating Voltage Operating Current IDD2 Operating Current IDD11 Operating Current IDD22 Operating Current ISTB Standby Current Input Voltage Input High Voltage IOL1 IOH1 IOL1 DATA IOH1 DATA IOL2 Common Sink Current IOH2 Common Source Current IOL3 Segment Sink Current IOH3 Segment Source Current Pull-high Resistor DATA, VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V DATA, -0.9 -1.7 -0.9 -1.7 DATA, load, Power down mode Test Conditions Conditions load On-chip oscillator load Crystal oscillator load On-chip oscillator load Crystal oscillator Min. Typ. -1.8 -1.8 -180 -140
HT1623
Ta=25°C Max. Unit
Rev. 1.50
June 2009
PATENTED
A.C. Characteristics
Symbol fSYS1 fSYS2 fLCD1 fLCD2 tCOM fCLK1 System Clock System Clock Frame Frequency Frame Frequency Common Period Serial Data Clock Pin) fCLK2 Serial Data Clock Pin) Serial Interface Reset Pulse Width (Figure tCLK Read mode Input Pulse Width (Figure Write mode Read mode tsu1 fTONE tOFF Note: Rise/Fall Time Serial Data Clock Width (Figure Setup Time DATA Clock Width (Figure Hold Time DATA Clock Width (Figure Setup Time Clock Width (Figure Hold Time Clock Width (Figure Tone Frequency (2kHz) Tone Frequency (4kHz) Times (Figure Rising Slew Rate (Figure drop down On-chip oscillator 0.05 3.34 1000 1.67 6.67 Write mode Duty cycle Parameter Test Conditions Duty cycle 3.34 Conditions On-chip oscillator External clock source On-chip oscillator External clock source Number Min. Typ. n/fLCD 1200
HT1623
Ta=25°C Max. Unit
V/ms
conditions Power-on Reset timing satisfied power On/Off sequence, internal Power-on Reset (POR) circuit will operate normally. drops below minimum voltage operating voltage spec. during operating, conditions Power-on Reset timing must satisfied also. That must drop keep 20ms (min.) before rising normal operating voltage.
Rev. 1.50
June 2009
PATENTED
HT1623
Figure
Figure
Figure
Figure Power-on Reset Timing
Functional Description
Display Memory Structure static display organized into bits stores display data. contents directly mapped contents driver. Data accessed theREAD, WRITE READ-MODIFY-WRITE commands. following mapping from patterns. Time Base Watchdog Timer time base generator share same divided (/256) counter. TIMER DIS/EN/CLR, DIS/EN/CLR EN/DIS independent from each other. Once time-out occurs, will remain logic level until command issued. external clock selected source system frequency, command turns invalid power down mode fails carried until external clock source removed. Buzzer Tone Output simple tone generator implemented HT1623. tone generator output pair differential driving signals which used generate single tone. Command Format HT1623 configured software setting. There mode commands configure HT1623 resource transfer display data.
Mapping
Rev. 1.50
June 2009
PATENTED
HT1623
Timer Configurations
following data mode command mode Operation READ WRITE READ-MODIFY-WRITE COMMAND Mode Data Data Data Command
successive commands have been issued, command mode omitted. While system operating non-successive command non-successive address data mode, should previous operation mode will reset also. returns operation mode should issued first.
Name TONE TONE TONE
Command Code 0000-1000-X 010X-XXXX-X 0110-XXXX-X Turn-off tone output
Function
Turn-on tone output, tone frequency 4kHz Turn-on tone output, tone frequency 2kHz
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June 2009
PATENTED
Timing Diagrams
READ Mode (Command Code
HT1623
READ Mode (Successive Address Reading)
WRITE Mode (Command Code
WRITE Mode (Successive Address Writing)
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June 2009
PATENTED
READ-MODIFY-WRITE Mode (Command Code
HT1623
READ-MODIFY-WRITE Mode (Successive Address Accessing)
Command Mode (Command Code
Mode (Data Command Mode)
Rev. 1.50
June 2009
PATENTED
Application Circuits
HT1623
Note:
connection selected depending requirement MCU. voltage applied VLCD must lower than VDD. Adjust display, VDD=5V, VLCD=4V, VR=15kW±20%. Adjust (external pull-high resistance) time base clock.
Command Summary
Name READ WRITE Command Code Function Read data from Write data Read Write data Turn both system oscillator bias generator Turn system oscillator Turn display Turn display Disable time base output Disable time-out flag output Enable time base output Enable time-out flag output Turn tone outputs Clear contents time base generator Clear contents stage System clock source, on-chip oscillator System clock source, external 32kHz clock source crystal oscillator 32.768kHz Tone frequency output: 4kHz Def. A6A5A4A3A2A1A0D0D1D2D3 A6A5A4A3A2A1A0D0D1D2D3
READ-MODIFY1 A6A5A4A3A2A1A0D0D1D2D3 WRITE TIMER TIMER TONE TIMER 0000-0000-X 0000-0001-X 0000-0010-X 0000-0011-X 0000-0100-X 0000-0101-X 0000-0110-X 0000-0111-X 0000-1000-X 0000-1101-X 0000-1111-X 0001-10XX-X
(XTAL) 0001-11XX-X TONE 010X-XXXX-X
Rev. 1.50
June 2009
PATENTED
Name TONE F128 TEST NORMAL Note: Command Code Function Tone frequency output: 2kHz Disable output Enable output Time base clock output: time-out flag after: Time base clock output: time-out flag after: Time base clock output: time-out flag after: Time base clock output: time-out flag after: 1/2s Time base clock output: 16Hz time-out flag after: 1/4s Time base clock output: 32Hz time-out flag after: 1/8s Time base clock output: 64Hz time-out flag after: 1/16s Time base clock output: 128Hz time-out flag after: 1/32s Test mode, user use. Normal mode 0110-XXXX-X 100X-0XXX-X 100X-1XXX-X 101X-0000-X 101X-0001-X 101X-0010-X 101X-0011-X 101X-0100-X 101X-0101-X 101X-0110-X 101X-0111-X 1110-0000-X 1110-0011-X
HT1623
Def.
care A6~A0 address D3~D0 data Data/Command mode Def. Power reset default bold forms, namely mode commands. these, indicates command mode successive commands have been issued, command mode except first command will omitted. source tone frequency time base clock frequency derived from on-chip 32kHz oscillator, 32.768kHz crystal oscillator, external 32kHz clock. Calculation frequency based system frequency sources stated above. recommended that host controller should initialize HT1623 after power reset, power reset fail, which turn leads malfunctioning HT1623.
Rev. 1.50
June 2009
PATENTED
Package Information
100-pin Outline Dimensions
HT1623
Symbol
Dimensions Min. 18.50 13.90 24.50 19.90 2.50 0.10 Nom. 0.65 0.30 0.10 Max. 19.20 14.10 25.20 20.10 3.10 3.40 1.40 0.20
Rev. 1.50
June 2009
PATENTED
HT1623
Holtek Semiconductor Inc. (Headquarters) No.3, Creation Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc. (Shanghai Sales Office) Room, Floor, No.1 Building, No.2016 Yi-Shan Road, Minhang District, Shanghai, China 201103 Tel: 86-21-5422-4590 Fax: 86-21-5422-4705 http://www.holtek.com.cn Holtek Semiconductor Inc. (Shenzhen Sales Office) Unit Productivity Building, No.5 Gaoxin Road, Nanshan District, Shenzhen, China 518057 Tel: 86-755-8616-9908, 86-755-8616-9308 Fax: 86-755-8616-9722 Holtek Semiconductor Inc. (Beijing Sales Office) Suite 1721, Jinyu Tower, A129 West Xuan Street, Xicheng District, Beijing, China 100031 Tel: 86-10-6641-0030, 86-10-6641-7751, 86-10-6641-7752 Fax: 86-10-6641-0125 Holtek Semiconductor (USA), Inc. (North America Sales Office) 46729 Fremont Blvd., Fremont, 94538 Tel: 1-510-252-9880 Fax: 1-510-252-9885 http://www.holtek.com
Copyright 2009 HOLTEK SEMICONDUCTOR INC. information appearing this Data Sheet believed accurate time publication. However, Holtek assumes responsibility arising from specifications described. applications mentioned herein used solely purpose illustration Holtek makes warranty representation that such applications will suitable without further modification, recommends products application that present risk human life malfunction otherwise. products authorized critical components life support devices systems. Holtek reserves right alter products without prior notification. most up-to-date information, please visit site http://www.holtek.com.tw.
Rev. 1.50
June 2009

Mapping Controller PATENTED 099352 Technical Document

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