HT48RAx/HT48CAx Software Application Note D/N: HA0076E CALL
|
|
|
Top Searches for this datasheet
HT48RAx/HT48CAx Software Application Note
HT48RAx/HT48CAx Software Application Note
D/N: HA0076E
CALL JUMP will load program counter. Interrupt will store contents program counter into stack. RETI/RET will load contents stack into program counter.
Jump Between Different Banks
locate code section bank (definition) ROMBANK directive: ROMBANK codesec; Load bank number destination address into BANK directive: BANK label Jump destination address
Example
ROMBANK codesec0; definition ROMBANK codesec1; definition ROMBANK codesec2; definition codesec0 .section 000h BANK 0000h strt
HT48RAx/HT48CAx Software Application Note
strt: a,BANK label1 bp,a label1 label0: codesec1 .section 000h BANK label1: a,BANK label2 bp,a label2 codesec2 .section 000h BANK label2: a,BANK label0 bp,a label0 label0 located BANK load bank number label0 jump label0 label2 located BANK load bank number label2 jump label2 label0 located BANK label1 located BANK load bank number label1 jump label1
HT48RAx/HT48CAx Software Application Note Interrupt Service Routines
Accumulator backup Move accumulator Clear Jump label located bank backup Other registers backup
Example
include ht48ca3.inc accbuf0 statusbuf0 bpbuf0 accbuf1 statusbuf1 bpbuf1 accbuf2 statusbuf2 bpbuf2 ROMBANK codesec0; definition ROMBANK codesec1; definition ROMBANK codesec2; definition codesec0 .section 000h BANK 0004h accbuf0,a a,bp labelbank00 0008h accbuf1,a a,bp labelbank00 should located BANK HT48CA3 body
HT48RAx/HT48CAx Software Application Note
labelbank01 000ch accbuf2,a a,bp labelbank02 labelbank00: bpbuf0,a a,status statusbuf0,a a,statusbuf0 status,a a,bpbuf0 bp,a a,accbuf0 reti labelbank01: bpbuf1,a a,status statusbuf1,a a,statusbuf1 status,a a,bpbuf1 bp,a a,accbuf1 reti restore registers call/jump different banks labels should managed located BANK backup restore registers call/jump different banks labels should managed located BANK backup labelbank02 should located BANK labelbank01 should located BANK
HT48RAx/HT48CAx Software Application Note
labelbank02: bpbuf2,a a,status statusbuf2,a a,statusbuf2 status,a a,bpbuf2 bp,a a,accbuf2 reti codesec1 .section 000h BANK labelbank10: codesec2 .section 000h BANK labelbank20: restore registers call/jump different banks labels should managed located BANK backup
Call Between Different Banks Subroutines
locate code section bank (definition) ROMBANK directive: ROMBANK codesec Backup Load bank number destination address into BANK directive: BANK label Call destination address
HT48RAx/HT48CAx Software Application Note
Load current bank number Nesting: from Restore
Example
include ht48ca3.inc accbuf0 statusbuf0 bpbuf0 accbuf1 statusbuf1 bpbuf1 accbuf2 statusbuf2 bpbuf2 ROMBANK codesec0; definition ROMBANK codesec1; definition ROMBANK codesec2; definition codesec0 .section 000h BANK 0000h strt strt: a,bp bpbuf0,a a,BANK label1 label1 located BANK backup HT48CA3 body
HT48RAx/HT48CAx Software Application Note
bp,a call label1 a,bpbuf0 bp,a label0: a,bank label0 bp,a codesec1 .section 000h BANK label1: a,bank label1 bp,a a,bp bpbuf1,a a,BANK label2 bp,a call label2 a,bpbuf1 bp,a codesec2 .section 000h BANK label2: a,bank label2 bp,a label2 located BANK load bank number label2 jump label2 backup label0 located BANK load bank number label1 jump label1 restore
HT48RAx/HT48CAx Software Application Note
a,bp bpbuf2,a a,BANK label0 bp,a call label0 a,bpbuf2 bp,a label0 located BANK load bank number label0 jump label0 backup
Generate PFD/Carrier Signal (Not Synchronized) Remote Output
selects output (mask option). Timer/event counter used generate PFD/carrier signal Disable timer/event counter Disable timer/event counter overflow interrupt. Load preload value TMR0, fPFD prescaler stage (1~8), 0~255. Enable timer/event counter counting. Clear PBC.0 enable PB.0 output function PB.0 (PB.0 enable output. (PB0 carrier output) Clear PB.0 (PB.0 disable output. (PB0 Timer/event counter used control timing streams time interval between successive stream frame suggested that programs located bank data located bank backup/restore ignored)
HT48RAx/HT48CAx Software Application Note
Example Pulse Synchronized (All Programs Located Bank
fCARRIER=38kHz, fSYS=4MHz, preload Timer/Event Counter prescaler stage n=1, fPFD=38.46kHz Transmission sequence: first lead frame: carrier=2.4ms low=600ms, carrier=1200ms low=600ms, carrier=600ms stream frame=50ms Timer/Event Counter overflow period=600ms 50ms/600ms@83 unit (per unit=600ms) 2.4ms/600ms=4 unit (per unit=600ms) include ht48ca3.inc accbuf2 statusbuf2 bitcount bitno frame leadframe bith1 byte1 question byte0 question txflag dbit 0000h strt 0008h reti 000ch accbuf2,a a,status statusbuf2,a label2 strt: data high byte data byte HT48CA3 body
HT48RAx/HT48CAx Software Application Note
leadframe frame bith1 tmr0c a,17 bitno,a a,230 tmr0,a a,098h tmr0c,a tmr1c a,168 tmr1l,a a,253 tmr1h,a a,098h tmr1c,a a,09h intc,a a,datal byte0,a ,datah byte1,a txflag bitcount label2: a,bitcount a,bitno status.2 txflag txflag stoptx bitcount txing enable data transmission reset data bit-count datah read from table (TABRDC) disable TMR0 interrupt enable TMR1 interrupt datal read from table (TABRDC) Timer/Event Counter overflow time unit number=16 bits+1(leadframe) scan read table datah decode transmission format
HT48RAx/HT48CAx Software Application Note
txstart: pbc.0 pb.0 leadframe leadframe.2 endtxbit bitcount leadframe endtxbit txing: bith1 a,bithl a,01h status.2 chk23 pbc.0 pb.0 endtxbit chk23: a,bithl a,02h status.2 chk3 pbc.0 pb.0 byte1.7 endtxbit bitcount chk230: byte0 byte1 bith1 endtxbit chk3: pbc.0 pb.0 chk230 chk3: pbc.0 bits transmitted third high pulse=600ms second: high pulse=600ms third high pulse=none first: pulse=600ms transmit data clear leadframe timer leadframe=2.4ms generate leadframe
HT48RAx/HT48CAx Software Application Note
pb.0 endtxbit: frame a,frame a,83 status.0 endframe txflag bitcount a,datal byte0,a a,datah byte1,a bith1 frame endframe: a,statusbuf2 status,a a,accbuf2 reti clear frame timer frame time-out re-send code reload data related registers frame timer
Example Pulses Synchronized (All Programs Located Bank
fCARRIER=38kHz, fSYS=4MHz, preload Timer/Event Counter prescaler stage n=1, fPFD=38.46kHz Transmission sequence: first lead frame: carrier=2.4ms=88 pulses (counted INT) low=600ms, carrier=44 pulses (counted INT) low=600ms, carrier=22 pulses (counted INT) stream frame=50ms Timer/Event Counter overflow period=600ms 50ms/600ms@83 unit (per unit=600ms) 2.4ms/600ms=4 unit (per unit=600ms)
HT48RAx/HT48CAx Software Application Note
include ht48ca3.inc accbuf1 statusbuf1 bitcount bitno frame leadframe bith1 byte1 byte0 intcntcom txflag dbit pulsetxing dbit enpulse dbit bittxing dbit 0000h strt 0004h intcntcom reti pb.0 reti 0008h reti 000ch accbuf2,a a,status statusbuf2,a label2 strt: scan read table data1 datah decode transmission format PB0/PFD connected PF0/INT transmitting data high byte data byte HT48CA3 body
HT48RAx/HT48CAx Software Application Note
leadframe frame bith1 intcntcom tmr0c a,17 bitno,a a,230 tmr0,a a,088h tmr0c,a tmr1c a,168 tmr1l,a a,253 tmr1h,a a,098h tmr1c,a a,09h intc,a a,datal byte0,a a,datah byte1,a txflag pulsetxing bitcount enpulse bittxing pbc.0 label2: a,bitcount a,bitno status.2 txflag txflag stoptx bitcount datah read from table (TABRDC) enable TMR1 interrupt datal read from table (TABRDC) Timer/Event Counter overflow time unit ms=600ms number=16 bits+1 (leadframe)
HT48RAx/HT48CAx Software Application Note
txing txstart: a,88 intcntcom,a intc.1 intc.4 intc.3 intc.0 tmr0c a,230 tmr0,a a,098h tmr0c,a pb.0 pbc.0 txstart0: pb.0 txstart1 txstart1: intc.6 txstart2 intc.6 leadframe frame txstart2: leadframe.2 txstart0 bitcount leadframe endtxbit txing: bith1 a,bithl a,01h status.2 chk23 pbc.0 pb.0 endtxbit first: pulse=600ms transmit data reset leadframe timer leadframe=2.4ms pulses leadframe pulses transmitted check leadframe pulses transmitted enable carrier output Timer/Event Counter synchronized enable external interrupt clear external interrupt request flag disable Timer/Event Counter interrupt enable global interrupt leadframe interrupt number
HT48RAx/HT48CAx Software Application Note
chk23: a,bithl a,02h status.2 chk3 a,22 byte1.7 a,22 intcntcom,a tmr0c a,230 tmr0,a a,098h tmr0c,a pb.0 pbc.0 txbit0: Pb.0 txbit1 intc.1 txbit1: intc.6 txbit0 intc.6 frame pb.0 txbit0 txbit2: bitcount byte0 byte1 bith1 label2 stoptx: pb.0 pbc.0 bits transmitted leadframe pulses transmitted check leadframe pulses transmitted enable carrier output Timer/Event Counter synchronized enable external interrupt clear external interrupt request flag disable Timer/Event Counter interrupt enable global interrupt bit=0 pulses bit=1 pulses
HT48RAx/HT48CAx Software Application Note
endtxbit: a,frame a,83 status.0 endframe txflag bitcount a,datal byte0,a a,datah byte1,a bith1 frame endframe: intc.3 a,statusbuf2 status,a a,accbuf2 reti clear frame timer frame time-out re-send code reload data related registers
Synchronize Pulse (Generate Desired Number Pulses)
Method Synchronization Using Timer/Event Counter
Generate using Timer/Event Counter Timer/Event Counter interrupt period will generate pulse Timer/Event Counter interrupt should enabled Timer/Event Counter start counting from desired preload value synchronize with output then enable Timer/Event Counter counting Count desired pulse Timer/Event Counter interrupt service routine then disable output clearing PB.0
HT48RAx/HT48CAx Software Application Note
Method Synchronization Using External Interrupt
Generate using Timer/Event Counter Connect external PF0/INT pulse will generate external interrupt Timer/Event Counter counting should enabled External interrupt should enabled detect count pulse number Count desired pulse external interrupt service routine then disable output clearing PB.0 external interrupt
Method Generate Pulses Using Software Instructions
Generate pulses using software instructions Pulse number controlled using software counting Carrier output period controlled timer/event counters
Read Table from Program
locate code section bank (definition) ROMBANK directive: ROMBANK codesec n=0~4 Load bank number destination address into BANK directive: BANK label Load high-order byte (with BANK) table address bank TBHP A,HIGH table TBHP,A Load lower-order byte table address TBLP A,LOW table TBLP,A TABRDC read table contents
HT48RAx/HT48CAx Software Application Note
Example
include ht48ca3.inc tablowbyte table byte buffer HT48CA3 body
ROMBANK codesec0; definition ROMBANK codesec1; definition ROMBANK codesec2; definition codesec0 .section 000h BANK 0000h strt strt: a,high table0 tbhp,a a,low table0 tblp,a tabrdc tablowbyte a,high table1 tbhp,a a,low table1 tblp,a tabrdc tablowbyte a,high table2 tbhp,a a,low table2 tblp,a tabrdc tablowbyte talbe0: 0a55ah, 05aa5h table0 located BANK bank table table read instruction table byte address bank high byte address table read instruction table byte address bank high byte address table read instruction table byte address bank high byte address
HT48RAx/HT48CAx Software Application Note
codesec1 .section 000h BANK table1: 09669h, 06996h codesec2 .section 000h BANK table2: 02dd2h,0d22dh table located BANK bank table table located BANK bank table
Carrier Frequency (fCARRIER) Calculation
HT48RAx/HT48CAx Software Application Note Crystal Oscillator Configuration
tINTD: internal delay time oscillator setting time tWU: crystal/resonator warm-up time (500ms~5ms), dependent crystal/resonator quality/ capacitor tSST: system start-up time, fOSC/1024
fOSC 393kHz 400kHz 455kHz 480kHz 600kHz 1MHz 2MHz 3.58MHz 3.82MHz 4MHz 4.2MHz
Ceramic Resonator 300pF 300pF 300pF 300pF 300pF 120pF 300pF 300pF 300pF 300pF 300pF 120pF
Quartz Crystal
Note
Crystal/resonator oscillator bias resistor built-in OSC1 OSC2 capacitors (25pF 30pF) built-in
Other recent searches
PRC202 - PRC202 PRC202 Datasheet
M27C516 - M27C516 M27C516 Datasheet
ENA1664 - ENA1664 ENA1664 Datasheet
APT8056BVR - APT8056BVR APT8056BVR Datasheet
AD826 - AD826 AD826 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
