Supersedes IPC/JEDEC J-STD-020B July 2002 JOINT INDUSTRY STANDARD

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IPC/JEDEC J-STD-020C
Supersedes IPC/JEDEC J-STD-020B July 2002
JOINT INDUSTRY STANDARD
Moisture/Reflow Sensitivity Classification Nonhermetic Solid State Surface Mount Devices
Notice
JEDEC Standards Publications designed serve public interest through eliminating misunderstandings between manufacturers purchasers, facilitating interchangeability improvement products, assisting purchaser selecting obtaining with minimum delay proper product particular need. Existence such Standards Publications shall respect preclude member nonmember JEDEC from manufacturing selling products conforming such Standards Publications, shall existence such Standards Publications preclude their voluntary those other than JEDEC members, whether standard used either domestically internationally. Recommended Standards Publications adopted JEDEC without regard whether their adoption involve patents articles, materials, processes. such action, JEDEC assume liability patent owner, they assume obligation whatever parties adopting Recommended Standard Publication. Users also wholly responsible protecting themselves against claims liabilities patent infringement. material this joint standard developed Plastic Chip Carrier Cracking Task Group (B-10a) JEDEC JC-14.1 Committee Reliability Test Methods Packaged Devices
Technical Information Contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, 22201-3834 Phone (703) 907-7560 (703) 907-7501 2215 Sanders Road Northbrook, 60062-6135 Phone (847) 509-9700 (847) 509-9798
Please Standard Improvement Form shown this document.
©Copyright 2004. JEDEC, Arlington, Virginia, IPC, Northbrook, Illinois. rights reserved under both international Pan-American copyright conventions. copying, scanning other reproduction these materials without prior written consent copyright holder strictly prohibited constitutes infringement under Copyright United States.
IPC/JEDEC J-STD-020C
ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES
Moisture/Reflow Sensitivity Classification Nonhermetic Solid State Surface Mount Devices
joint standard developed Plastic Chip Carrier Cracking Task Group (B-10a) JEDEC JC-14.1 Committee Reliability Test Methods Packaged Devices
Supersedes: IPC/JEDEC J-STD-020B July 2002 IPC/JEDEC J-STD-020A April 1999 J-STD-020 October 1996 JEDEC JESD22-A112 IPC-SM-786A January 1995 IPC-SM-786 December 1990
Users this standard encouraged participate development future revisions. Contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, 22201-3834 Phone (703) 907-7500 (703) 907-7501 2215 Sanders Road Northbrook, 60062-6135 Phone (847) 509-9700 (847) 509-9798
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IPC/JEDEC J-STD-020C
Acknowledgment
Members Association Connecting Electronics Industries® Plastic Chip Carrier Cracking Task Group (B-10a) JEDEC Solid State Technology Association JEDEC JC-14.1 Committee Reliability Test Methods Packaged Devices have worked together develop this document. would like thank them their dedication this effort. Standard involving complex technology draws material from vast number sources. While principal members Joint Moisture Classification Working Group shown below, possible include those assisted evolution this Standard. each them, members JEDEC extend their gratitude.
Plastic Chip Carrier Cracking Task Group JEDEC 14.1 Committee JEDEC
Chairman Steven Martell Sonoscan, Inc.
Chairman Jack McCullen Intel Corporation
Chairman Nick Lycoudes Freescale Semiconductor
Joint Moisture Classification Working Group Members
Brent Beamer, Static Control Components, Inc. James Mark Bird, Amkor Technology Inc. Michael Blazier, Delphi Electronics Safety Richard Boerdner, Research Maurice Brodeur, Analog Devices Inc. Victor Brzozowski, Northrop Grumman Corporation Ralph Carbone, Hewlett-Packard Company Srinivas Chada, Ph.D, Jabil Circuit, Inc. Chaudhry, ASAT, Inc. Vicki Chin, Cisco Systems Inc. Quyen Chu, Jabil Circuit, Inc. Chao-Wen Chung, Logic Corp. Andre Clement, Thomson Microelectronics Jeffrey Colish, Northrop Grumman Corporation Samuel Croce, Northrop Grumman Derek D'Andrade, SMTC Corporation Gordon Davy, Northrop Grumman Corporation Glenn Dearing, Endicott Interconnect Technologies Robert DiMaggio, Sud-Chemie Performance Package Vincent Dubois, Cogiscan Inc. Bernard Ecker, Northrop Grumman Jesper Erland, Terma Elektronik Feinstein, Feinstein Associates
Barry Fernelius, Agilent Technologies Finch, Boeing Phantom Works Rupert Fischer, Infineon Technologies Bill Full, Philips Semiconductors Alelie Funcell, Xilinx, Inc. Ranjit Gannamani, AMD, Inc. Jerry Gleason, Hewlett-Packard Company Frank Grano, Sanmina-SCI Corporation Curtis Grosskopf, Corporation Fred Hashemi, Standard Microsystems Corp. George Hawkins, Freescale Semiconductor Brad Hawthorne, Elantec Semiconductor Mario Interrante, Corporation Terence Kern, Ambitech International Arshad Khan, Celestica International Inc. Amol Kirtikar, Chemie Performance Glenn Koscal, Carsem Mark Kwoka, Intersil Corporation Xavier Lambert, Schneider Electric Industries Nick Lycoudes, Freescale Semiconductor James Maguire, Intel Corporation Steven Martell, Sonoscan Inc. Michelle Martin, Sud-Chemie Performance Package Jack McCullen, Intel Corporation Sean McDermott, Celestica Paul Melville, Philips Semiconductor
James Moffitt, Moffitt Consulting Services Julio Moral, Jr., Actel Corporation Robert Mulligan, Motorola Inc. Keith Newman, Microsystems Inc. John Northrup, Systems Platform Solutions Larry Nye, Texas Instruments Kerry Oren, Industries Deepak Pai, C.I.D.+, General Dynamics-Advanced Information Ramon Reglos, Xilinx, Inc. Charles Reynolds, Corporation Heidi Reynolds, Microsystems Inc. Marty Rodriguez, Jabil Circuit, Inc. Michael Sandor, Propulsion Laboratory Valeska Schroeder, Ph.D., Hewlett-Packard Company William Sepp, Technic Inc. Dongkai Shangguan, Ph.D., Flextronics International Richard Shook, Agere Systems Inc. Michael Sienicki, ESPEC Corp. Smetana, Alcatel Bradley Smith, Allegro MicroSystems Inc. Ralph Taylor, Lockheed Martin Maritime Systems Nick Virmani, Naval Research Randall Walberg, National Semiconductor Corp. Michael Westlake, Semiconductor James Whitehouse, Plexus Corp.
IPC/JEDEC J-STD-020C
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IPC/JEDEC J-STD-020C
Table Contents
PURPOSE CRITERIA
Scope Background
APPLICABLE DOCUMENTS
6.2.1
Failure Criteria Criteria Requiring Further Evaluation Delamination Failure Verification
JEDEC Solid State Technology Associaton Joint Industry Standards
APPARATUS
MOISTURE/REFLOW SENSITIVITY CLASSIFICATION OPTIONAL WEIGHT GAIN/LOSS ANALYSIS
3.2.1 3.2.2 3.4.1 3.4.2
Temperature Humidity Chambers Solder Reflow Equipment Full Convection (Preferred) Infrared Ovens Microscopes Optical Microscope Scanning Acoustic Microscope
8.2.1 8.2.2 8.2.3 8.2.4 8.3.1 8.3.2 8.3.3
Weight Gain Absorption Curve Read Points Weight Moisture Soak Readouts Desorption Curve Read Points
Cross-Sectioning Electrical Test Weighing Apparatus (Optional)
CLASSIFICATION/RECLASSIFICATION
Baking Readouts
ADDITIONS EXCEPTIONS
Annex
Compatibility with Pb-Free Rework Reclassification
PROCEDURE Figures
Figure Classification Reflow Profile
5.1.1 5.1.2
Sample Requirements Reclassification (Qualified Package Without Additional Reliability Testing) Classification/Reclassification Rework Initial Electrical Test Initial Inspection Bake Moisture Soak Reflow
Tables
Table Table Table Table SnPb Eutectic Process Package Peak Reflow Temperatures Pb-free Process Package Classification Reflow Temperatures Moisture Sensitivity Levels Classification Reflow Profiles
Final External Visual Final Electrical Test Final Acoustic Microscopy
IPC/JEDEC J-STD-020C
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IPC/JEDEC J-STD-020C
Moisture/Reflow Sensitivity Classification Nonhermetic Solid State Surface Mount Devices
PURPOSE
purpose this standard identify classification level nonhermetic solid state surface mount devices (SMDs) that sensitive moisture-induced stress that they properly packaged, stored, handled avoid damage during assembly solder reflow attachment and/or repair operations. This standard used determine what classification/preconditioning level should used package qualification. Passing criteria this test method sufficient itself provide assurance long-term reliability.
Scope
This classification procedure applies nonhermetic solid state Surface Mount Devices (SMDs) packages, which, because absorbed moisture, could sensitive damage during solder reflow. term used this document means plastic encapsulated surface mount packages other packages made with moisture-permeable materials. categories intended used producers inform users (board assembly operations) level moisture sensitivity their product devices, board assembly operations ensure that proper handling precautions applied moisture/reflow sensitive devices. major changes have been made previously qualified package, this method used reclassification according 4.2. This standard cannot address possible component, board assembly product design combinations. However, standard does provide test method criteria commonly used technologies. Where uncommon specialized components technologies necessary, development should include customer/manufacturer involvement criteria should include agreed definition product acceptance. packages classified given moisture sensitivity level using Procedures Criteria defined within previous version J-STD-020, JESD22-A112 (rescinded), IPC-SM-786 (superseded) need reclassified current revision unless change classification level higher peak reflow temperature desired. Note: procedures this document used packaged devices that included this specification's scope, failure criteria such packages must agreed upon device supplier their user.
Background vapor pressure moisture inside nonhermetic package increases greatly when package exposed high temperature solder reflow. Under certain conditions, this pressure cause internal delamination packaging materials from and/or leadframe/substrate, internal cracks that extend outside package, bond damage, wire necking, bond lifting, lifting, thin film cracking, cratering beneath bonds. most severe case, stress result external package cracks. This commonly referred ``popcorn'' phenomenon because internal stress causes package bulge then crack with audible ``pop.'' SMDs more susceptible this problem than through-hole parts because they exposed higher temperatures during reflow soldering. reason this that soldering operation must occur same side board device. through-hole devices, soldering operation occurs under board that shields devices from solder. APPLICABLE DOCUMENTS JEDEC Solid State Technology AssociatIon1 JESD22-A120 Test Method Measurement Moisture Diffusivity Water Solubility Organic Materials Used Integrated Circuits JESD22-A113
Preconditioning Procedures Plastic Surface Mount Devices Prior Reliability Testing
JESD Stress Test Driven Qualification Specification JESD-625
Requirements Handling Electrostatic Discharge Sensitive (ESD) Devices
www.jedec.org
IPC/JEDEC J-STD-020C IPC2 IPC-TM-650
Test Methods Manual3
2.1.1
Microsectioning 2.1.1.2 Microsectioning Semi Automatic Technique Microsection Equipment
Joint Industry Standards4 J-STD-033 J-STD-035
Standard Handling, Packing, Shipping Moisture/Reflow Sensitive Surface Mount Devices Acoustic Microscopy Nonhermetic Encapsulated Electronic Components
APPARATUS Temperature Humidity Chambers Moisture chamber(s), capable operating °C/85% °C/60% °C/60% Within chamber working area, temperature tolerance must tolerance must Solder Reflow Equipment 3.2.1 Full Convection (Preferred)
Full convection reflow system capable maintaining reflow profiles required
this standard.
3.2.2 Infrared Infrared (IR)/convection solder reflow equipment capable maintaining reflow profiles required this standard. required that this equipment heat only directly impinge upon Packages/ devices under test.
Note: moisture sensitivity classification test results dependent upon package body temperature (rather than mounting substrate and/or package terminal temperature).
Ovens
Bake oven capable operating +5/-0
Microscopes 3.4.1 Optical Microscope
Optical Microscope (40X external 100X cross-section exam).
3.4.2 Scanning Acoustic Microscope Scanning acoustic microscope with C-Mode Through Transmission capability capable measuring minimum delamination area being evaluated.
Note scanning acoustic microscope used detect cracking delamination. However, presence delamination does necessarily indicate pending reliability problem. reliability impact delamination must established particular die/package system. Note Refer IPC/JEDEC J-STD-035 operation scanning acoustic microscope.
Cross-Sectioning
Microsectioning equipment recommended IPC-TM-650, Methods 2.1.1, 2.1.1.2 other
applicable document.
Electrical Test
Electrical test equipment with capabilities perform appropriate testing devices.
Weighing Apparatus (Optional) Weighing apparatus capable weighing package resolution microgram. This apparatus must maintained draft-free environment, such cabinet. used obtain absorption desorption data devices under test (see
www.ipc.org Current revised Test Methods available through IPC-TM-650 subscription website www.ipc.org
July 2004 CLASSIFICATION/RECLASSIFICATION
IPC/JEDEC J-STD-020C
Refer guidance reclassification previously qualified/classified SMDs. Engineering studies have shown that thin, small volume packages reach higher body temperatures during reflow soldering boards that have been profiled larger packages. Therefore, technical and/or business issues normally require thin, small volume packages (reference Table 4-1, 4-2) classified higher reflow temperatures. Note Previously classified SMDs should only reclassified manufacturer. Users should refer ``Moisture Sensitivity'' label determine which reflow temperature packages were classified. Note Level packages should considered have maximum reflow temperature unless labeled capable reflow other temperatures. Note supplier user agree, components classified temperatures other than those Table 4-2.
Table
Package Thickness
SnPb Eutectic Process Package Peak Reflow Temperatures
Volume <350 Volume
<2.5 Table
Package Thickness
+0/-5 +0/-5°C
+0/-5°C +0/-5°C
Pb-free Process Package Classification Reflow Temperatures
Volume <350 Volume 2000 Volume >2000
<1.6
Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature example °C+0°C) rated level.
Note profiling tolerance (based machine variation capability) whatever required control profile process time will exceed producer assures process compatibility peak reflow profile temperatures defined Table 4.2. Note Package volume excludes external terminals (balls, bumps, lands, leads) and/or nonintegral heat sinks. Note maximum component temperature reached during reflow depends package thickness volume. convection reflow processes reduces thermal gradients between packages. However, thermal gradients differences thermal mass packages still exist. Note Components intended ``lead-free'' assembly process shall evaluated using ``lead free'' classification temperatures profiles defined Tables 4-1, whether lead free.
Compatibility with Pb-Free Rework Unless otherwise specified device manufacturer, Pb-free component (classified Table 4.2), shall capable being reworked within eight hours removal from storage bake, J-STD-033. verify this capability component classified temperature below sample size 5.1.2 shall soaked Level conditions (see Table 5-1) using Time Label (TOL) eight hours, reflowed classification temperature devices sample shall pass electrical test have damage response greater than that observed same package rated level. component rated does require this rework compatibility verification.
Reclassification packages previously classified moisture sensitivity level reflow peak/classification temperature reclassified damage response (delamination/cracking) more severe condition items listed less than, equal damage response original classification condition.
major changes have been made previously qualified package, this method used reclassification improved level (longer floor life) same reflow temperature. reclassification level cannot improved more than level without additional reliability testing. Reclassification Level requires additional reliability testing. major changes have been made previously qualified package, this method used reclassification higher reflow temperature providing moisture level remains same degrades more sensitive level.
IPC/JEDEC J-STD-020C
packages classified moisture sensitive previous version J-STD-020, JESD22-A112 (rescinded), IPCSM-786 (superseded) reclassified nonmoisture sensitive (Level without additional reliability stress testing, e.g., JESD22-A113 JESD47 semiconductor manufacturer's in-house procedures. minimize testing, results from given package generically accepted cover other devices which manufactured same package, using same packaging materials (die attach, mold compound coating, etc.), with using same wafer fabrication technology, with dimensions greater than those qualified. following attributes could affect moisture sensitivity device require reclassification: attach material/process. Number pins. Encapsulation (mold compound glob top) material/process. area shape. Body size. Passivation/die coating. Leadframe, substrate, and/or heat spreader design/material/finish. size/thickness. Wafer fabrication technology/process. Interconnect. Lead lock taping size/location well material.
PROCEDURE
recommended procedure start testing lowest moisture sensitivity level evaluation package reasonably expected pass (based knowledge other similar evaluation packages). case equipment malfunction, operator error electrical power loss, engineering judgment shall used ensure that minimum intent/requirements this specification met.
Sample Requirements
5.1.1 Reclassification (Qualified Package Without Additional Reliability Testing) qualified package being reclassified without additional reliability testing select minimum sample units each moisture sensitivity level tested. minimum nonconsecutive assembly lots must included sample with each having approximately same representation. Sample units shall have completed manufacturing processing required prior shipment. Sample groups concurrently more moisture sensitivity levels.
5.1.2 Classification/Reclassification Rework Select minimum sample units each moisture sensitivity level tested. minimum nonconsecutive assembly lots must included sample with each having approximately same representation. Sample units shall have completed manufacturing processes required prior shipment. Sample groups concurrently more moisture sensitivity levels. Testing must continued until passing level found.
packages should reclassified user unless approved supplier.
Initial Electrical Test Test appropriate electrical parameters, e.g., data sheet values, in-house specifications, etc. Replace components, while maintaining sample requirements 5.1.2, which fail meet tested parameters.
Initial Inspection Perform external visual acoustic microscope examination, components, establish baseline cracking/delamination criteria 6.2.1.
Note: This standard does consider establish accept/reject criteria delamination initial/time zero inspection.
IPC/JEDEC J-STD-020C
Bake Bake sample hours minimum +5/-0 This step intended remove moisture from package that will ``dry.''
Note: This time/temperature modified desorption data particular device under test shows that different condition required obtain ``dry'' package when starting condition °C/85% (see 8.3).
Moisture Soak Place devices clean, dry, shallow container that package bodies touch overlap
each other. Submit each sample appropriate soak requirements shown Table 5-1. times parts should handled using proper procedures accordance with JESD 625.
Table Moisture Sensitivity Levels
SOAK REQUIREMENTS LEVEL TIME FLOOR LIFE CONDITIONS Standard TIME (hours) CONDITIONS Accelerated Equivalent1 TIME (hours) CONDITIONS
Unlimited year weeks hours hours hours hours Time Label (TOL)
°C/85% °C/60% °C/60% °C/60% °C/60% °C/60% °C/60% °C/60%
+5/-0 +5/-0 6962 +5/-0 1922 +5/-0 +2/-0 +2/-0 +2/-0
°C/85% °C/60% °C/60% °C/60% °C/60% °C/60% °C/60% °C/60% +1/-0 +1/-0 +0.5/-0 +0.5/-0 +0.5/-0 °C/60% °C/60% °C/60% °C/60% °C/60%
Note CAUTION ``accelerated equivalent'' soak requirements shall used until correlation damage response, including electrical, after soak reflow established with ``standard'' soak requirements known activation energy diffusion 0.48 Accelerated soak times vary material properties, e.g., mold compound, encapsulant, etc. JEDEC document JESD22-A120 provides method determining diffusion coefficient. Note standard soak time includes default value hours semiconductor manufacturer's exposure time (MET) between bake includes maximum time allowed distributor's facility. actual less than hours soak time reduced. soak conditions °C/60% soak time reduced hour each hour less than hours. soak conditions °C/60% soak time reduced hour each five hours less than hours. actual greater than hours soak time must increased. soak conditions °C/60% soak time increased hour each hour that actual exceeds hours. soak conditions °C/60% soak time increased hour each five hours that actual exceeds hours. Note Supplier extend soak times their risk.
Reflow sooner than minutes longer than four hours after removal from temperature/humidity chamber, subject sample three cycles appropriate reflow conditions defined Table Figure 5-1. timing between removal from temperature/humidity chamber initial reflow cannot then parts must rebaked resoaked according 5.5. time between reflows shall five minutes minimum minutes maximum. Final External Visual Final Electrical Test
Examine devices using optical microscope (40X) look external cracks. Perform appropriate electrical testing devices, e.g., data sheet values, in-house specifica-
tions, etc.
Final Acoustic Microscopy
Perform scanning acoustic microscope analysis devices.
IPC/JEDEC J-STD-020C Table
Profile Feature
July 2004 Classification Reflow Profiles
Pb-Free Assembly
Sn-Pb Eutectic Assembly
Average Ramp-Up Rate (Tsmax Preheat Temperature (Tsmin) Temperature (Tsmax) Time (tsmin tsmax) Time maintained above: Temperature (TL) Time (tL) Peak/Classification Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-Down Rate Time Peak Temperature
°C/second max. 60-120 seconds 60-150 seconds Table 10-30 seconds °C/second max. minutes max.
C/second max. 60-180 seconds 60-150 seconds Table 20-40 seconds °C/second max. minutes max.
Note temperatures refer topside package, measured package body surface.
Ramp-up
Critical Zone
Temperature
Tsmax
Tsmin
Preheat
Ramp-down
25oC Peak
Time
IPC-020c-5-1
Figure
Classification Reflow Profile
CRITERIA
Failure Criteria
more devices test sample fail, package shall considered have failed tested
level. device considered failure exhibits following: External crack visible using optical microscope. Electrical test failure. Internal crack that intersects bond wire, ball bond, wedge bond. Internal crack extending from lead finger other internal feature (lead finger, chip, attach paddle). Internal crack extending more than two-thirds (2/3) distance from internal feature outside package.
IPC/JEDEC J-STD-020C
Changes package body flatness caused warpage, swelling bulging visible naked eye. parts still meet co-planarity standoff dimensions they shall considered passing. Note internal cracks indicated acoustic microscopy, they must considered failure verified good using polished cross sections through identified site. Note packages known sensitive vertical cracks recommended that polished cross sections used confirm nonexistence near vertical cracks within mold compound encapsulant. Note Failing packages must evaluated higher numeric level moisture sensitivity using samples. Note components pass requirements 6.1, there evidence delamination cracks observed acoustic microscopy other means, component considered pass that level moisture sensitivity.
Criteria Requiring Further Evaluation evaluate impact delamination device reliability, semiconductor manufacturer either meet delamination requirements shown 6.2.1 perform reliability assessment using JESD22-A113 JESD47 semiconductor manufacturer's in-house procedures. reliability assessment consist stress testing, historical generic data analysis, etc. Annex shows logic flow diagram implementation these criteria.
Packages pass electrical tests there delamination back side paddle, heat spreader, back side (lead chip only) there evidence cracking, other delamination, they still meet specified dimensional criteria, Packages considered pass that level moisture sensitivity.
6.2.1 Delamination following delamination changes measured from pre-moisture soak post reflow. delamination change change between pre- post-reflow. percent delamination change calculated relation total area being evaluated. 6.2.1.1 Metal Leadframe Packages:
delamination active side die. delamination change >10% wire bonding surface paddle (downbond area) leadframe (Lead Chip) devices. delamination change >10% along polymeric film bridging metallic features that designed isolated (verifiable through transmission acoustic microscopy). delamination/cracking change >10% through attach region thermally enhanced packages devices that require electrical contact backside die. surface-breaking feature delaminated over entire length. surface-breaking feature includes: lead fingers, bars, heat spreader alignment features, heat slugs, etc.
6.2.1.2 Substrate Based Packages (e.g., BGA, LGA, etc.):
delamination active side die. delamination change >10% wire bonding surface laminate. delamination change >10% along polymer potting molding compound/laminate interface cavity overmolded packages. delamination change >10% along solder mask/laminate resin interface. delamination change >10% within laminate. delamination/cracking change >10% through attach region. delamination/cracking between underfill resin chip underfill resin substrate/solder mask. surface-breaking feature delaminated over entire length. surface-breaking feature includes lead fingers, laminate, laminate metallization, PTH, heat slugs, etc. Note: substrate based packages, C-mode acoustic image easy interpret. Through transmission acoustic imaging recommended because easier interpret more reliable. necessary verify results determine what level package cracking/delamination occurring, cross-sectional analysis should used.
IPC/JEDEC J-STD-020C
Failure Verification failures should analyzed confirm that failure mechanism associated with moisture sensitivity. there reflow moisture-sensitive-induced failures level selected, component meets tested level moisture sensitivity.
acoustic microscope scans show failure criteria listed 6.2.1, Packages shall tested higher numeric level moisture sensitivity subjected reliability assessment using JESD22-A113 JESD47 semiconductor manufacturer's in-house procedures.
MOISTURE/REFLOW SENSITIVITY CLASSIFICATION
device passes Level classified moisture sensitive does require pack. device fails Level passes higher numerical level, classified moisture sensitive must packed accordance with J-STD-033. device will only pass Level classified extremely moisture sensitive pack will provide adequate protection. this product shipped, customer must advised classification. supplier must also include warning label with device indicating that either socket mounted, baked within time label before reflow soldering. minimum bake time temperature should determined from desorption studies device under test (see 8.3).
OPTIONAL WEIGHT GAIN/LOSS ANALYSIS Weight Gain Weight gain analysis (absorption) very valuable determining estimated floor life (the time from removal device from pack until absorbs sufficient moisture risk during reflow soldering). Weight loss analysis (desorption) valuable determining bake time required remove excess moisture from device that will longer risk during reflow soldering. Weight gain/loss calculated using average entire sample. recommended that (10) devices used sample.
Final weight gain (wet weight weight)/dry weight. Final weight loss (wet weight weight)/wet weight. Interim weight gain (present weight weight)/dry weight. Interim weight loss (wet weight present weight)/wet weight. ``Wet'' relative means package exposed moisture under specific temperature humidity conditions. ``Dry'' specific means additional moisture removed from package
Absorption Curve 8.2.1 Read Points X-axis (time) read points should selected plotting absorption curve. early readings, points should relatively short hours less) because curve will have steep initial slope. Later readings spread further days more) curve becomes asymptotic. Y-axis (weight gain) should start with ``0'' increase saturated weight gain. Most devices will reach saturation between 0.3% 0.4% when stored formula 8.1. Devices shall kept room ambient between removal from oven chamber weighing subsequent reinsertion into oven chamber. 8.2.2 Weight weight sample should determined first. Bake sample hours minimum +5/-0 ensure that devices dry. Within hour after removal from oven, weigh devices using optional equipment determine average weight 8.1. small SMDs (less than total height), devices should weighed within thirty (30) minutes after removal from oven. 8.2.3 Moisture Soak
Within hour after weighing, place devices clean, dry, shallow container that package bodies touch each other. Place devices desired temperature/humidity condition desired length time.
8.2.4 Readouts Upon removal devices from temperature/humidity chamber, allow devices cool least minutes. Within hour after removal from chamber, weigh devices. small SMDs (less than total height), devices should weighed within thirty (30) minutes after removal from chamber. After devices
IPC/JEDEC J-STD-020C
weighed, follow procedure 8.2.3 placing devices back temperature/humidity chamber. more than hours total time should elapse between removal devices from temperature/humidity chamber their return chamber. Continue alternating between 8.2.3 8.2.4 until devices reach saturation indicated additional increase moisture absorption until soaked maximum time interest.
Desorption Curve
desorption curve plotted using devices that have reached saturation determined 8.2.
8.3.1 Read Points suggested read points X-axis hour intervals. Y-axis should from ``0'' weight gain saturated value determined 8.2. 8.3.2 Baking
Within hour (but sooner than fifteen (15) minutes) after removal saturated devices from temperature/humidity chamber, place devices clean, dry, shallow container that package bodies touch each other. Place devices bake oven desired temperature desired time.
desired read point; remove devices from bake oven. Within hour after removal devices from bake oven, remove devices from container determine their average weight using optional equipment formula 8.1.
8.3.3 Readouts
Within hour after weighing devices, place them clean, dry, shallow container that package bodies touch each other. Return devices bake oven desired time. Continue until devices have lost their moisture determined weight 8.2.2.
ADDITIONS EXCEPTIONS
following details shall specified applicable procurement document: Device selection criteria different from 5.1. Test procedure sample size different from 5.1. Package types evaluated. reject criteria (including Scanning Acoustic Microscope criterion) addition those shown Clause preconditioning requirements beyond those shown Clause Conditions frequency under which retest required.
IPC/JEDEC J-STD-020C
Annex Classification Flow
Perform Initial Visual, Electrical Acoustic Microscopy Moisture Loading, Reflow Simulation
Pass Electrical Test?
External Visual Inspection
External Cracks?
Evaluate/Obtain Internal Damage Information Acoustic Microscopy Images, Cross-sections, etc.
Crack Delamination?
Crack Delamination Change (Other Than Heat Spreader Backside Paddle)?
Assess Crack X-section Other Means
FAIL
Crack Criteria?
PASS
Reliability Assessment Planned
PASS
Delamination Criteria
FAIL
Reliability Assessment
Pass Reliability? PASS Classification Level Tested
FAIL Classification Level Tested
IPC-J-STD-020c-a
ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES
Standard Improvement Form
purpose this form provide Technical Committee with input from industry regarding usage subject standard. Individuals companies invited submit comments IPC. comments will collected dispersed appropriate committee(s).
IPC/JEDEC J-STD-020C
provide input, please complete this form return 2215 Sanders Road Northbrook, 60062-6135 509.9798
recommend changes following: Requirement, paragraph number Test Method number paragraph number
referenced paragraph number proven Unclear Other Rigid Error
Recommendations correction:
Other suggestions document improvement:
Submitted Name Company Address City/State/Zip Date Telephone E-mail
ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES
ISBN #1-580987-46-X
2215 Sanders Road, Northbrook, 60062-6135 Tel. 847.509.9700 847.509.9798 www.ipc.org

Supersedes IPC/JEDEC J-STD-020B July 2002 JOINT INDUSTRY STANDARD

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