Author: INTRODUCTION This application note describes Power-Save featur

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Author: INTRODUCTION This application note describes Power-Save featur

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POWER-SAVE FEATURE: SLEEP CURRENT DOWN 15µA
Author: INTRODUCTION This application note describes Power-Save feature Exar's single channel XR16L580 (L580) UART channel XR16L2551 (L2551) XR16L2751 (L2751) UARTs. These three devices will collectively referred Power UART this application note. Please refer individual device datasheets specific information. SLEEP MODE Power UART includes sleep mode that reduces power consumption when device actively used. Power UART stops clock oscillator conserve power sleep mode. However, address lines, databus control lines (chipselect, read write strobes) still active during sleep mode that internal registers device accessed. These signals (except chipselect) typically shared among many devices system. activity these signals will translate into increased power drain from Power UART thereby defeating purpose sleep mode. Power UART's Power-Save feature resolves this problem. POWER-SAVE FEATURE Power UART Power-Save mode which further reduces power consumption sleep mode isolating device from databus interface. this mode, power consumption steady range 50µA 3.3V) affected activity databus, address control lines. However, internal registers device cannot accessed while Power-Save mode. Figure below shows block diagram Power UART. L2551 L2751 very similar L580, difference being extra lines second UART channel. following section describes Power device programmed Sleep Power-Save states. FIGURE BLOCK DIAGRAM SHOWING POWER-SAVE FEATURE Power UART
PwrSave
A2:A0 D7:D0 IOR# IOW# (R/W#) (IRQ#) RESET (RESET#)
Tolerant Inputs
(2.25 CTS# DSR# RTS# DTR# XTAL1 XTAL2
GNugget_BLK
UART BLOCK UART BLOCK
Intel Motorola Data Interface
Crystal Osc/Buffer
16/68#
EXAR Corporation 48720 Kato Road, Fremont 94538 (510) 668-7000 (510) 668-7017 www.exar.com uarttechsupport@exar.com
POWER STATES Sleep, Power-Save well Normal operating states Power UART shown Figure figure also shows conditons under which transitions between these power states take place. Since internal registers device cannot accessed while Power-Save mode, system design engineer must caution he/she planning this feature. device will emerge from Power-Save mode only external event, namely activity other modem input pins, namely CTS#, DSR#, RI#. highly recommended that PwrSave device controlled available system which controlled software. This will provide mechanism access Power UART, case external event does occur wake UART. Figure shows application example when PwrSave device controlled system. FIGURE VARIOUS POWER STATES POWER UART
PwrSave HIGH
Normal Operating State with PwrSave
PwrSave
Normal Operating State with PwrSave HIGH
(IER bit-4 Condition
bit-4 Condition
bit-4 Condition
CPU/FPGA control PwrSave general-purpose
PwrSave
Sleep State
Power-Save State
PwrSave HIGH
Condition goes delta bits register Condition Condition Transmitter empty Condition Condition been serviced
Condition
DATA LOSS DURING SLEEP/POWER-SAVE When Power UART entered Sleep Power-Save mode, oscillator shut conserve power. takes tens milliseconds re-start oscillator when crystal used provide UART clock. Therefore, incoming character that used wake UART assembled correctly because this delay. other hand, oscillator/buffer starts immediately (within nanoseconds) when external clock used provide UART clock shut during Sleep/Power-Save mode. applications where incoming character will used wake UART, recommended external clock keep running during Sleep/Power-Save mode that first character received will assembled correctly. This will prevent data loss without compromising power consumption during Power-Save mode. FIGURE APPLICATION EXAMPLE USING POWER-SAVE FEATURE
Address A2:A0
Databus D7:D0
CPU/FPGA IOR# IOW#
XR16L580IL XR16L2551IL XR16L2751IM
RS-232, RS-485, Infrared
Applications: Handheld, Portable Mobile Devices such PDA's, Tablet PC's, Scanners etc.
PwrSave XTAL1
XTAL2 N.C.
Typical Clock Frequency 1.8432MHz 14.7456MHz External Crystal Oscillator
PROGRAMMING UART ENTER POWER-SAVE MODE following pseudo-code snippets list steps that required place Power UART sleep mode Power-Save mode: function Enter_Sleep_mode (channel) places `channel' sleep mode. channel XR16L2551/ 2751 devices, this function must called twice, once channel.
Enter_Sleep_Mode (channel) unsigned char read (LCR); write (LCR, 0xBF); write (EFR, read(EFR) 0x10); write (LCR, lcr); write (IER, read(IER) 0x10); store value register access enhanced registers Enable special function bits this case, bit-4) restore value this places device sleep mode Condiiton Figure satisfied.
function Toggle_Power_Save (state) toggles PwrSave Power UART HIGH through CPU/FPGA, depending value parameter `state'.
Toggle_Power_Save (state) (state) PwrSave; else Reset PwrSave; state Toggle PwrSave HIGH CPU/FPGA Toggle PwrSave CPU/FPGA
Finally, function Enter_Power_Save_Mode calls these functions places Power UART Power-Save mode.
Enter_Power_Save_Mode Enter_Sleep_Mode (1); Enter_Sleep_Mode (2); Toggle_Power_Save (1);
this places channel sleep mode this places channel sleep mode skip this line single channel XR16L580 Power-Save HIGH
following pseudo-code shows typical initialization routine places Power UART PowerSave mode this routine.
Initialization Routine write (LCR, 0x80); write (DLL, 0x01); write (DLM, 0x00); write (LCR, 0xBF); write (EFR, 0xD0); write (LCR, 0x03);
Access Baud Rate registers user-desired: here highest baud rate chosen Access Enhanced Registers such Enable AutoRTS, AutoCTS enhanced functions control Select Line parameters word length-8, parity stop This also provides access general registers like FCR, etc. Enable reset FIFO's Assert RTS# output once required when using AutoRTS Place device Power-Save mode
write (FCR, 0x07); write (MCR, 0x02); Enter_Power_Save_Mode
case event that wakes Power UART does take place, CPU/FPGA claim control situation getting device Power-Save mode:
Toggle_Power_Save (0); Exit Power-Save mode. internal registers Power UART accessed.
NOTICE EXAR Corporation reserves right make changes products contained this publication order improve design, performance reliability. EXAR Corporation assumes responsibility circuits described herein, conveys license under patent other right, makes representation that circuits free patent infringement. Charts schedules contained here only illustration purposes vary depending upon user's specific application. While information this publication been carefully checked; responsibility, however, assumed inaccuracies. EXAR Corporation does recommend products life support applications where failure malfunction product reasonably expected cause failure life support system significantly affect safety effectiveness. Products authorized such applications unless EXAR Corporation receives, writing, assurances satisfaction that: risk injury damage been minimized; user assumes such risks; potential liability EXAR Corporation adequately protected under circumstances. Copyright 2004 EXAR Corporation August 2004 Send your UART technical inquiry with technical details hotline: uarttechsupport@exar.com Reproduction, part whole, without prior written consent EXAR Corporation prohibited.

Author: INTRODUCTION This application note describes Power-Save featur

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