Author: INTRODUCTION This application note describes hardware firmware

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Author: INTRODUCTION This application note describes hardware firmware

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UPGRADING FROM XR68C681 XR68C92/192
Author: INTRODUCTION This application note describes hardware firmware differences between XR68C681 XR68C92/192 well steps involved upgrading XR68C681 newer XR68C92/192. this note, XR68C681 will referred C681 device XR68C92, XR68C192 family devices will referred C92/192. Also, this application note must used along with datasheets these devices complete understanding differences. HARDWARE DIFFERENCES PACKAGE C681 C92/192 fully pin-to-pin compatible 44-PLCC package footprint only. C681 also available 40-PDIP 40-CDIP packages. C92/192 also available 44-TQFP package. (only) also available 40-PDIP package, recommended designs this package therefore covered this application note. OPERATING VOLTAGE C681 device only. C92/192 operate from 2.97 5.5V also tolerant inputs. CRYSTAL OSCILLATOR frequency input clock only 7.372MHz C681, whereas 24MHz C92/192 VCC. FIFO DEPTH C681 3-byte FIFOs whereas 8-byte FIFOs C192 16-byte FIFOs. FIRMWARE DIFFERENCES following discussion, firmware differences briefly explained. Please refer datasheets XR68C681 XR68C92/192 more details. internal registers very similar C681 C92/192. Table below shows differences: TABLE INTERNAL REGISTERS XR68C681 XR68C92/192
ADDRESS A3:A0 0000 0010 1000 1100 MODE XR68C681 REGISTER Mode Registers (MR1, MR2) Masked Interrupt Status (MISR) Mode Registers (MR1, MR2) Interrupt Vector Register (IVR) XR68C92/192 REGISTER COMMENTS
Mode Registers (MR0, MR1, MR2) Extra register C92/192 Reserved Mode Registers (MR0, MR1, MR2) Extra register C92/192 General Purpose Register (GPR)
MODE REGISTERS MR0A, MR0B: registers following functionality C92/192: Bit-7: Watchdog Timer (See datasheet details) Bit-6: Trigger Level page details) Bits 5,4: Trigger Level page details) 3,1: Reserved (Bit-1 used factory test mode) Bits MR0A: Extended baud rate tables (See datasheet details); bits MR0B reserved
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MASKED INTERRUPT STATUS REGISTER MISR: This register ANDs values write-only Interrupt Mask Register (IMR) Interrupt Status Register (ISR) together. MISR value [ISR value] [IMR value] C92/192, user needs store value written into ANDing operation software. COMMAND REGISTER (CRA, CRB) DIFFERENCES: upper nibble Command Register both C681 C92/192 used issue various commands. While many commands same, some different shown Table below: TABLE COMMANDS DESCRIPTION DIFFERENCES BETWEEN XR68C681 XR68C92/192
COMMAND REGISTER BITS 1000 1001 1010 1011 1100 1101 1110 1111 XR68C681 Select Extend Clear Select Extend Select Extend Clear Select Extend Standby Mode (Channel only) Active Mode (Channel only) used used XR68C92/192 -RTS output (Assertion) -RTS output HIGH (Negation) Enable Time-out Mode Mode Register Pointer Disable Time-out Mode used Enable Power Down Mode (Channel only) Disable Power Down Mode (Channel only)
RECEIVE TRIGGER LEVELS: C681 provides choice generating Receive Ready interrupt either each character received when FIFO full (via bit-6). C92/192 combines this bit-6 provide four trigger levels follows:
TRIGGER LEVELS BIT-6 BIT-6 XR68C92 (8-BYTE FIFO) byte FIFO bytes FIFO bytes FIFO bytes FIFO XR68C192 (16-BYTE FIFO) byte FIFO bytes FIFO bytes FIFO bytes FIFO
TRANSMIT TRIGGER LEVELS: C681 generates Transmit Ready interrupt only when transmit FIFO empty. C92/192 register bits provides four trigger levels shown table below:
TRIGGER LEVELS BIT-5 BIT-4 XR68C92 (8-BYTE FIFO) FIFO Fully Empty FIFO locations empty FIFO locations empty FIFO location empty XR68C192 (16-BYTE FIFO) FIFO Fully Empty FIFO locations empty FIFO locations empty FIFO location empty
BAUD RATE TABLES There four baud rate tables available C681 baud rate tables available C92/192. parameters that select baud rate table decide baud rate C681 are:
bits clock bits clock bit-7 Select Extend clock Select Extend clock
parameters that select baud rate table decide baud rate C92/192 are:
bits clock bits clock bit-7 MR0A bit-0 Extended Baud Rate Table MR0A bit-2 Extended Baud Rate Table
first parameters identical C681 C92/192. remaining parameters result different baud rates. Please refer datasheets complete listing baud rates. SUMMARY direct drop-in replacement XR68C681 XR68C92 XR68C192, following conditions must satisfied: 44-PLCC package used used MISR used Extended baud rate selection used Stand-by mode used Otherwise, hardware and/or software changes required.
NOTICE EXAR Corporation reserves right make changes products contained this publication order improve design, performance reliability. EXAR Corporation assumes responsibility circuits described herein, conveys license under patent other right, makes representation that circuits free patent infringement. Charts schedules contained here only illustration purposes vary depending upon user's specific application. While information this publication been carefully checked; responsibility, however, assumed inaccuracies. EXAR Corporation does recommend products life support applications where failure malfunction product reasonably expected cause failure life support system significantly affect safety effectiveness. Products authorized such applications unless EXAR Corporation receives, writing, assurances satisfaction that: risk injury damage been minimized; user assumes such risks; potential liability EXAR Corporation adequately protected under circumstances. Copyright 2004 EXAR Corporation January 2004 Send your UART technical inquiry with technical details hotline: uarttechsupport@exar.com Reproduction, part whole, without prior written consent EXAR Corporation prohibited.

Author: INTRODUCTION This application note describes hardware firmware

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