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switching frequency Adjustable soft start timer Watchdog input Power-o
Top Searches for this datasheetA4402 Constant On-Time Buck Converter with Integrated Linear Regulator switching frequency Adjustable soft start timer Watchdog input Power-on reset output Adjustable buck regulator Adjustable linear regulator Enable input supply voltage range Overcurrent protection Undervoltage lockout (UVLO) Thermal shutdown protection A4402 power management that combines constant on-time buck regulator linear regulator. Ideal applications that require regulated voltages. buck regulator output supplies adjustable linear regulator reduce power dissipation increase overall efficiency. switching regulator capable operating above MHz. greater than switching frequency enables customer select value inductors capacitors while avoiding EMI. Protection features include undervoltage lockout thermal shutdown. case shorted load, each regulator features overcurrent protection. A4402 also features power-on reset with adjustable delay microprocessor output. A4402 provided 16-pin, 1.20 nominal overall height TSSOP, with exposed enhanced thermal dissipation. lead (Pb) free, with 100% matte leadframe plating. Applications: Photo inkjet printers Industrial controls Distributed power systems Network applications Package: 16-pin TSSOP with exposed thermal (suffix scale Typical Application VIN1 CTSET TSET 0.15 CPOR 0.33 Switching Regulator Output Rton VBAT BOOT 0.01 ISEN RSENSE 31.6 9.76 4402 NPOR VIN2 5.62 Linear Regulator Output VLIN 4402-DS, Rev. A4402 Selection Guide Part Number A4402ELPTR-T Constant On-Time Buck Converter with Integrated Linear Regulator Packing 4000 pieces 13-in. reel Package 16-pin TSSOP with exposed thermal Absolute Maximum Ratings Characteristic VIN1 VIN2 ISEN Pins NPOR Ambient Operating Temperature Junction Temperature Storage Temperature Range Symbol VIN1 VIN2 VISEN VENB VWDI VTON VFBx VNPOR Tj(max) Tstg Range Notes Rating -0.3 -0.3 -0.5 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 Units Thermal Characteristics Characteristic Package Thermal Resistance Symbol Test Conditions* 4-layer based JEDEC standard Value Units *Additional thermal information available Allegro website. Terminal List Table Number Name VIN2 TSET NPOR ISEN BOOT VIN1 Function time setting terminal Ground Feedback VLIN Input voltage Regulator output Watchdog input Soft start watchdog timing capacitor terminal Fault output Feedback delay Current sense, limit setting switching regulator, connect through series resistor Boot node Switching regulator output Ground Input voltage Enable input Exposed thermal Pin-out Diagram VIN2 TSET NPOR VIN1 BOOT ISEN Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Functional Block Diagram BOOT VREF CTSET TSET 0.15 CPOR 0.33 Soft Start Ramp Generator Watchdog Timer 0.01 VIN1 Rton VBAT Boot Charge ISEN RSENSE Switch Control VFB2 NPOR FAULT Switch Disable 9.76 31.6 VIN2 Internal Regulator VREG VREF VREG VREF 5.62 VIN1 VLIN Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator ELECTRICAL CHARACTERISTICS1,2 valid 25°C, 13.5 (unless otherwise noted) Characteristics Input Voltage Supply Input Voltage Supply Supply Quiescent Current Logic Input Voltage Hysteresis Logic Input Current Linear Regulator Output Voltage Range Feedback Voltage Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis Feedback Input Bias Current Current Limit Dropout Voltage Switching Regulator Output Voltage Range Feedback Voltage Feedback Input Bias Current Switcher Time Voltage Threshold High Voltage Threshold Changeover Hysteresis On-time Accuracy Minimum On-time Minimum Off-time Buck Switch On-Resistance ISEN Voltage Valley Current Limit Threshold VFB1 IFB1 19.25 Rton VHYS errton tonmin toffmin RDS(on) VISEN Ilim RSENSE 0.27 25°C, ILOAD 125°C, ILOAD 13.5 Rton Rton rising rising IOUT ISW+ ILIN 1.156 -400 15.75 1.180 -100 17.5 -200 1.204 19.25 VFB2 VO2UVLO VO2UVHYS IFB2 VDROP IOUT ISW+ ILIN VIN2 rising based voltage 1.156 0.896 -100 1.180 0.944 1.204 0.990 Symbol VIN1 VIN2 IIN(Q) VENB VENBHYS IENB High input level, VENB input level, VENB VIN2 IOUT ISW+ ILIN 13.5 VIN1 13.5 IOUT ISW+ ILIN VENB rising Test Conditions Min. Typ. 13.5 2.28 Max. 2.56 Units Continued next page. Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator ELECTRICAL CHARACTERISTICS1,2 (continued) valid 25°C, 13.5 (unless otherwise noted) Characteristics Protection Circuitry NPOR Output Voltage NPOR Leakage Current NPOR Reset Thermal Shutdown Threshold Thermal Shutdown Hysteresis Timing Circuitry TSET Current, Watchdog Mode TSET Valley Voltage, Watchdog Mode TSET Reset Voltage, Watchdog Mode Frequency Duty Cycle Logic Input Logic Input Current Input Hysteresis TSET Current, Soft Start Mode Current 1For Symbol VNPOR INPOR VNPORRESET TJTSD TJTSDHYS ITSETWDI VTRIP VRESET fWDI DCWDI VWDI(0) IWDI VWDIHYS ITSETSS IPOR NPOR VWDI NPOR high INPOR VNPOR Test Conditions Min. VIN2 0.55 3.92 Typ. 0.48 5.60 Max. 7.28 Units pullup connected VOUT2, rising input output current specifications, negative current defined coming (sourcing) specified pin. 2Performance range -40°C 85°C guaranteed design characterization. Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Power-Up Power-Down Timing Diagrams Using VIN1 UVLO Rising UVLO Falling UVLO Rising NPOR Using VIN1 VIN1 UVLO Rising UVLO Falling UVLO Rising NPOR VPOR VCTSET Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Watchdog Timing Diagram NPOR UVLO Rising wait trip wait TSET reset Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Functional Basic Operation A4402 contains fixed on-time, adjustable voltage buck switching regulator with valley sensing current mode control, adjustable linear regulator designed buck regulator output. constant on-time converter maintains constant output frequency because on-time inversely proportional supply voltage. input voltage decreases, on-time increased, maintaining relatively constant period. Valley mode current control allows converter achieve very short on-times because current measured during off-time. device enabled input. When pulled high, converter starts-up under control adjustable soft start routine whose ramp time controlled external capacitor. Under light load conditions, switch enters pulse-skipping mode ensure regulation maintained. This effectively changes switcher frequency. frequency also affected when switcher operating discontinuous mode. order maintain wide input voltage range, switcher period extended when either minimum off-time VIN, reached minimum on-time high VIN. Switcher Overcurrent Protection converter utilizes pulse-by-pulse valley current limiting, which operates when current through sense resistor creates voltage sense (ISEN) that equals -0.2 During overload condition, switch turned period determined constant ontime circuitry. switch off-time extended until current decays current limit value selection sense resistor, which point switch turns again. Because slope compensation required this control scheme, current limit maintained reasonably constant level across input voltage range. Figure illustrates current limited during overload condition. current decay (period with switch off) proportional output voltage. overload increased, output voltage tends decrease switching period increases. VIN1 VIN2 VIN1 high voltage input, designed withstand Bulk capacitance least should used decouple input supply VIN1. VIN2 input used supply linear regulator should connected directly output switching regulator. Output Voltage Selection output voltage each regulators voltage divider regulator output, follows: VFB1 VLIN VFB2 order maintain accuracy regulators equivalent impedance node parallel with should approximately Inductor current operating maximum load Current Limit level Maximum load Current Constant On-Time Constant period Time Inductor current operating "soft" overload Overload Current Limit level Current Constant On-Time Extended period Time Figure Current limiting during overload Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator TSET TSET serves dual function controlling timing both soft start ramp input. current sourced from TSET dependant state NPOR. There formulas calculating time constants. CTSET must selected that both frequency soft start requirements met. formulas calculating soft start timing are: tWDI CTSET CTSET where CTSET value capacitor results, Watchdog input used monitor state microcontroller. constant current driven into capacitor TSET, causing voltage TSET ramp upward until, each rising edge input, ramp pulled down VRESET. edge seen before ramp reaches VTRIP NPOR pulled low. watchdog timer activated until input sees rising edge. should pulled ground with resistor. Soft Start During soft start, internal ramp generator external capacitor TSET used ramp output voltage controlled fashion. This reduces demand external power supply limiting current that charges output capacitor load startup. Either following conditions required trigger soft start: input rising edge Reset event When soft start event occurs, held state until soft start ramp timer expires. Then regulator will power normally. Refer timing diagrams details. BOOT bootstrap capacitor used provide adequate charge NMOS switch. boot capacitor referenced supplies gate drive with voltage larger than supply voltage. size capacitor must 0.01 type, rated least resistor from input VIN1 sets on-time converter given input voltage. formula calculate on-time VIN1 3.12-12 10-9 When supply voltage between 17.5 switcher period remains constant, level based selected value Rton voltages lower than higher than 17.5 period reduced factor 3.5. constant period desired over varying input voltages, important select on-time that under worst case conditions will exceed minimum off-time minimum on-time converter. reasonable input voltage ranges, period converter held constant, resulting constant operating frequency over input supply range. More information choose Rton found Application Information section. ISEN sense input used sense current diode during off-time cycle. value RSENSE obtained formula: RSENSE IVALLEY during off-time cycle. recommended that current sense resistor sized that, peak output current, voltage ISEN does exceed -0.5 Because diode current measured when inductor current valley, average output current greater than IVALLEY value. value IVALLEY should IVALLEY IOUT(av) IRIPPLE where: IOUT(av) average both output currents, IRIPPLE inductor ripple current, guardband margin. peak current switch then: IPEAK IVALLEY IRIPPLE where IVALLEY lowest current measured through induc- Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator valley current must calculated that, worst-case ripple, converter still supply required current load. Further information calculate ripple current included Application Information section. active high input enables device. When low, device enters sleep mode; internal circuitry disabled, part draws maximum Thermal Shutdown When device junction temperature, sensed TJTSD, thermal shutdown circuit disables regulator output, protecting A4402 from damage. Power-on Reset Delay function monitors VFB2 voltage provides signal that used reset microcontroller. event triggered either following conditions: VFB2 falls below UVLO threshold. This occurs current limit either regulator exceeded, switcher voltage falls TSD. After rising edge input, voltage TSET reaches VTRIP. open drain output, through NPOR pin, provided signal event microcontroller. reset occurs after adjustable delay, tPOR, external capacitor connected pin. value tPOR calculated using following formula: tPOR CPOR where CPOR value capacitor tPOR Shutdown buck regulator will shutdown following conditions present: falling edge Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Application Information Switcher On-Time Switching Frequency order switcher maintain regulation, energy that transferred inductor during on-time must transferred capacitor during off-time. Because this relationship, load current, drops, well input output voltages, affect on-time converter. equation that governs switcher on-time (VSW+ IPEAK IPEAK VIN1+ IPEAK After resistor selected suitable found, must demonstrated that does not, under worst-case conditions, exceed minimum on-time minimum off-time converter. minimum on-time occurs maximum input voltage minimum load. maximum time occurs minimum supply voltage maximum load. supply voltages below above refer Voltage Operation section. Voltage Operation converter very input voltages. With output, minimum input supply When operating high frequencies, on-time converter must very short because available period short. high input voltages converter must maintain very short on-times, while input voltages converter must maintain long off-times. Rather than limit supply voltage range, converter solves this problem automatically increasing period factor 3.5. With period extended, converter will violate minimum on-time off-time. input voltage between converter will maintain constant period. When calculating worst-case on-times off-times, make sure multiplier supply voltage between those values. When operating voltages below additional care must taken when selecting inductor diode. voltages maximum current limited drops current path. When selecting external components voltage operation, drops must considered when determining on-time, complete formula should used make sure converter does violate timing specification. Inductor Selection Choosing right inductor critical correct operation switcher. converter capable running frequencies above MHz. This makes possible small inductor values, which reduces cost board area. inductor value what determines ripple current. important size inductor that under worst-case conditions IVALLEY equals minus half ripple current plus reasonable margin. ripple current large, converter will current limited. Typically peak-to-peak ripple current should limited maximum average load current. effects voltage drop inductor trace resistance affect switching frequency. However, frequency variation these factors small covered variation switcher period, which ±25% target. Removing these current dependant terms simplifies equation: IPEAK VIN1+ IPEAK (10) sure worst-case sense voltage forward voltage diode, including effects temperature. example, given converter with supply voltage 13.5 output voltage VSENSE 0.15 desired frequency MHz. solve follows: 0.15 13.5 0.15 formulas above describe changes based input load conditions. Because load changes minimal, output voltage fixed, dominant factor that affects on-time input voltage. converter able maintain constant period over varying supply voltage because on-time change based input voltage. current into terminal derived from resistor tied VIN1, which sets on-time proportional supply voltage. Selecting resistor value, based calculated above, done using following formula: RTON (ton+ 3.12 10-12 (11) Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Worst-case ripple current occurs maximum supply voltage. After calculating duty cycle, this condition, ripple current calculated. First calculate VSW+ IPEAK VIN1(max) IPEAK (12) Constant On-Time Buck Converter with Integrated Linear Regulator further filtering needed recommended that ceramic capacitors used parallel further reduce emissions. Rectification Diode diode conducts current during off-cycle. Schottky diode needed minimize forward drop switching losses. order size diode correctly, necessary find average diode conduction current using formula below: (15) ID(av) ILOAD DC(min)) where (min) defined (min) VSW+Vf VIN1+Vf (16) Using duty cycle, ripple current calculated using following formula: VIN1- IRIPPLE fSW(min) (13) where IRIPPLE maximum load current, fSW(min) minimum switching frequency (nominal frequency minus 25%). example used above, converter with supply voltage 13.5 design objective. supply voltage vary ±10%. output voltage VSENSE 0.15, desired frequency MHz. duty cycle calculated 36.45%. worst-case frequency minus MHz. Using these numbers above formula shows that minimum inductance this converter Output Capacitor converter designed operate with low-value ceramic output capacitor. When choosing ceramic capacitor, make sure rated voltage least times maximum output voltage converter. This because capacitance ceramic decreases they operate closer their rated voltage. recommended that output decoupled with ceramic capacitor. Larger capacitance required outputs load surges dramatically influence output voltage. Output ripple determined output capacitance effects ignored assuming recommended layout techniques followed. output voltage ripple approximated where VIN1 maximum input voltage maximum forward voltage diode. Average power dissipation diode PD(diode) ILOAD(av) DC(min) (17) power dissipation sense resistor must also considered using minimum duty cycle. Layout board layout large impact performance device. important isolate high current ground returns, minimize ground bounce that could produce reference errors device. method used isolate power ground from noise sensitive circuitry star ground. This approach makes sure high current components such input capacitor, output capacitor, diode have very impedance paths each other. Figure illustrates technique. RSENSE COUT RLOAD VRIPPLE IRIPPLE COUT (14) Input Capacitor value input capacitance affects amount current ripple input. This current ripple usually source supply side EMI. amount interference depends impedance from input capacitor bulk capacitance located supply bus. Adding small value, ceramic capacitor close input supply possible reduce effects. small capacitor will help reduce high frequency transient currents supply line. Current path (on-cycle Star Ground Current path (off-cycle Figure Star Ground Connection Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 ground from each components should very close each other connected same surface components. Internal ground planes should used star ground connection, vias impedance current path. order further reduce noise effects PCB, noise sensitive traces should connected internal ground planes. feedback network from switcher output should have independent ground trace that goes directly exposed underneath device. exposed should connected internal ground planes exposed copper used heat dissipation. grounds from device also connected Constant On-Time Buck Converter with Integrated Linear Regulator directly exposed ground reference from feedback network will less susceptible noise injection ground bounce. reduce radiated emissions from high frequency switching nodes important have internal ground plane directly under node. plane should broken directly under node lowest impedance path back star ground would directly under signal trace. another trace does break return path, energy will have find another path, which through radiated emissions. Layout Diagram VIN1 VIN2 VLIN Star Ground VIN1 VLIN VIN2 A4402 VIN1 BOOT ISEN A4402 Solder Trace oz.) Signal oz.) Ground oz.) Thermal oz.) TSET NPOR Thermal Vias Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Circuit Diagrams Power Terminals VIN1 Logic Terminals VIN2 TSET NPOR ISEN VIN1 BOOT VIN2 VIN1 Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A4402 Constant On-Time Buck Converter with Integrated Linear Regulator Package 16-Pin TSSOP 5.00 ±0.10 +0.05 0.15 -0.06 1.70 0.45 0.65 3.00 4.40 ±0.10 6.40 ±0.20 0.60 ±0.15 (1.00) 3.00 6.10 3.00 0.25 SEATING PLANE 0.65 1.20 0.15 SEATING PLANE GAUGE PLANE 3.00 Layout Reference View 0.10 +0.05 0.25 -0.06 dimensions nominal, tooling (reference JEDEC MO-153 ABT) Dimensions millimeters Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown Terminal mark area Exposed thermal (bottom surface) Reference land pattern layout (reference IPC7351 SOP65P640X110-17M); pads minimum 0.20 from adjacent pads; adjust necessary meet application process requirements layout tolerances; when mounting multilayer PCB, thermal vias exposed thermal land improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) Copyright ©2008-2009, Allegro MicroSystems, Inc. products described here manufactured under more U.S. patents U.S. patents pending. Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements performance, reliability, manufacturability products. Before placing order, user cautioned verify that information being relied upon current. Allegro's products used life support devices systems, failure Allegro product reasonably expected cause failure that life support device system, affect safety effectiveness that device system. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringement patents other rights third parties which result from use. latest version this document, visit website: www.allegromicro.com Allegro MicroSystems, Inc. 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