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Multiple output regulator input supply conducted radiated emissions Ad
Top Searches for this datasheetA4401 Automotive Quasi-Resonant Flyback Control Multiple output regulator input supply conducted radiated emissions Adaptive quasi-resonant turn on/off control Minimal number external components Enable input which driven with respect battery voltage This device provides necessary control functions provide power rails driving vacuum fluorescent display (VFD) using minimal external components. power supply based quasi-resonant, discontinuous flyback converter, operating near critical conduction boundary. novel adaptive turn-on control scheme used optimize turn-on turn-off phase MOSFET, reduce emissions while minimizing switching losses. converter self-oscillating, operating switching frequencies depending input voltage, load, external components. onboard linear regulator that powered directly from battery provides housekeeping supply, avoiding need complex bias supplies. Package: 8-pin narrow SOIC (suffix Internal diagnostics provide comprehensive protection against overloads, input undervoltage, overtemperature conditions. A4401 supplied 8-pin narrow SOIC package (suffix which lead (Pb) free, with 100% matte-tin leadframe plating. Approximate Scale Typical Application +VBAT A4401 COMP A4401-DS, Rev. A4401 Automotive Quasi-Resonant Flyback Control Selection Guide Part Number A4401KLTR-T Packing Tape reel, 3000 pieces/reel Absolute Maximum Ratings* Characteristic Voltage Voltage Voltage Voltage Voltage Rating Human Body Model Rating Charged Device Model Operating Ambient Temperature Junction Temperature Storage Temperature With respect ground Tstg Symbol VISS AEC-Q100-002; pins AEC-Q100-011; pins; inside AEC-Q100-011; pins; corner Range Notes Rating -0.3 -0.6 -0.3 -0.3 2000 Units Characteristic Package Thermal Resistance Symbol Test Conditions* 4-layer based JEDEC standard Value Units *Additional thermal information available Allegro website. Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control Functional Block Diagram US1J US1J STPS160U Anode 50mA Grid VBAT Optional Filter Filament Linear Adaptive turn-on control 0.100 Enable Control Logic Shutdown Optional feedback resistor Fault UVLO COMP Soft Start Ref. Pin-out Diagram Number Name COMP Description Enable input; active high Compensation node amplifier stage Output voltage feedback input Ground reference connection; connect negative terminal battery supply MOSFET, current sense input MOSFET gate drive output Regulator switching node: MOSFET drive output Supply input power control circuit, MOSFET driver, reference voltages COMP Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control ELECTRICAL CHARACTERISTICS1,2 valid -40°C +150°C, (unless noted otherwise) Characteristics General Quiescent Current Leakage Current Input Bias Current Minimum Frequency Soft Start Gate Drive Drive High Voltage, Drive High Voltage, Rise Time, Rise Time, Fall Time, Fall Time, Current Sense Input Maximum Sense Voltage (Current Limit) Sense Input Bias Current Current Sense Blanking Reference Supply Reference Voltage Tolerance Operational Transconductance Amplifier Output Impedance Constant3 Output Source Current Output Sink Current Input Bias Current Enable Input Input Voltage Input High Voltage Input Hysteresis Input Current VIhys IINL IINH Voltage rising Voltage falling Temperature increasing ISRC ISIN IBIAS VCOMP 1.06 VCOMP 1.36 -100 VREF 1.180 1.205 1.230 IISS tBLANK VISS -300 1000 VGDH CLOAD VGS= CLOAD CLOAD CLOAD 0.25 IINOFF IINON ILXLEAK High, MOSFET switching Low, High, Symbol Test Conditions Min. Typ. Max. Units Protection Turn-On Threshold Turn-Off Threshold Undervoltage Hysteresis Overtemperature Shutdown Overtemperature Hysteresis 1For VUVON VUVOFF VUVhys TJSD TJSDhys input output current specifications, negative current defined coming (sourcing) specified device pin. 2Specifications over operating temperature range assured design characterization. 3Guaranteed design. Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control Functional Basic Operation peak current-mode control scheme used regulate converter outputs, which will typically highest output voltage. regulated output voltage potentially divided down into stage, where resulting error signal acts control reference. This reference signal compared against signal that produced inductor magnetization current flowing through sense resistor. shown figure beginning switching cycle, external MOSFET, turned After sense resistor signal reaches control reference amplitude, comparator resets synchronous rectification (SR) latch turns MOSFET. When MOSFET turned off, voltage node rises until voltage clamps battery voltage, VBAT plus reflected output voltage, VOUT(RFL). secondary rectification diodes forward biased energy stored coupled inductor released output circuits. During this period, current through inductor decreases lin+V Coupled inductor goes discontinuous; resonant ring occurs VOUT(RFL) early. current falls resonance between primary magnetizing inductance capacitance appearing between drain ground. damped voltage ringing occurs, which resonates around battery voltage, VBAT. resonant ring swings negative, adaptive turn-on circuit monitors detect point which voltage reaches minimum. this point MOSFET commanded thereby minimizing turn-on losses. Also, relatively slow resonant dV/dt helps reduce EMI. most applications, converter will operated with battery input voltage 13.5 optimize performance regulator this voltage, magnetics designed force across MOSFET turn-on. This minimizes switching losses perhaps more importantly reduces caused voltage ringing drain ground capacitor resonating with primary inductance. voltage resonance MOSFET turn-off reduced simple low-loss snubber, described Electromagnetic Interference section. small enough load applied outputs, output stage falls below certain level, converter will enter burst mode operation. Burst mode reduces switching losses while maintaining regulation outputs. During startup, assuming battery voltage above turn-on threshold input enabled, controller turns soft start circuit controls reference voltage, limiting amount current drawn input amount charge transferred output, preventing voltage overshoot. During initial phase soft start, very little voltage present output. This means that there will resonant phase converter will operate continuous-conduction mode. converter effectively operates constant-current mode until regulation achieved. VMOSFET VOUT(RFL) VBAT MOSFET turns MOSFET turns IMOSFET Current released from coupled inductor into output circuit resonant period Current builds primary winding coupled inductor Figure External MOSFET voltage current Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control event overload, current demand signal produced amplifier restricts output current introducing pulse-by-pulse current limiting. Regulation Voltage determine sense resistor value, assume that minimum sense voltage before current limiting occurs reasonable maximum voltage select during normal operation would Then, resistor value found follows: RSENSE feedback resistors, determine voltage output rail which they connected, according following formula: VOUT VREF power losses resistor found first determining current through D(max) IRMS where should approximately internal reference worst case tolerance, plus there input bias current, IBIAS, feedback node, that small influence. This current flows into ground referenced resistor, creating small voltage offset. applications where main control output (anode grid) relatively light loads (relative filament load), necessary "mix" feedback signal. This involves adding additional feedback from filament output input. Note that this only applies filament outputs. Current Sense Resistor Selection Then, losses sense resistor are: PRDS RSENSE power rating resistor selected based power dissipation. When selecting resistor worth noting that maximum power rating valid 70°C derates linearly temperature typically between 120°C 140°C. Check resistor manufacturer guidelines. Note that imperative that this resistor inductance type; avoid wire wound. Standard surface mount devices usually acceptable. Soft Start determine resistance value, maximum peak current needs determined. First determine average input current, follows: POUT(max) VIN(max) where POUT output power. Then, peak current through sense resistor: D(max) When power initially applied, assuming input voltage turn-on threshold reached, input enabled, controller initiated MOSFET, turned first switching cycle. Initially, while output volts rising towards target regulation point soft start circuit, MOSFET will current limit. During soft start cycle, reference voltage ramped from steps over period under control DAC. This forces output amplifier vary between which turn reduces effects inrush current voltage overshoot outputs. where limited 0.7, precisely found described Magnetics Design section. Note that chosen order achieve switching with VBAT 13.5 Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control there special requirement larger output capacitors, onboard soft start insufficient, external soft start introduced. This implemented "pulling" down amplifier output (COMP pin) then "releasing" gradually over duration soft start period. pull-down circuit capable sinking least MOSFET Selection long driver takes remove Miller (gate drain) charge. Miller charge, quoted MOSFET datasheet. driver capability found from data Electrical Characteristics table, follows. turn-off, driver shift charge drive current required this IDRIVE general, higher smaller package, lower cost MOSFET, basis selecting MOSFET minimize cost, important understand power losses associated with When selecting RDS, important consider value minimum battery voltage, tends increase with values. Below battery voltage, VBAT, actual drive amplitude, VGS, VBAT minus (worst case). MOSFET suppliers usually quote variation with amplitude. Another factor that influences "real" operating temperature. temperature 140°C, this figure increased approximately 1.8. Again, manufacturers will provide this information. Worst case losses will occur minimum battery voltage maximum load. These considered terms static losses, switching turn-off losses, switching turn-on losses: Static Losses current, IRMS, that flows Then, time, tLOSS, taken shift Miller charge found: tLOSS IDRIVE turn-off switching loss estimated: PTURNOFF tLOSS fSW(min) (10) where fSW(min) specified Electrical Characteristics table peak current, identical current that flows sense resistor, calculation which shown Current Sense Resistor Selection section. calculated next section. MOSFET turned-off commanded MOSFET identical current that flows sense resistor previously calculated. Therefore: PSTATIC D(max) Switching Turn-Off Losses Assume that turn-off threshold, VTH, similar where Miller "plateau" effect takes place. Figure illustrates approximation made terms turn-off losses. duration tloss region determined Loss Region tLOSS Time Figure MOSFET, loss approximations Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control Switching Turn-On Losses turn-on losses determined amount energy resonant capacitor, C11, discharge into MOSFET. battery voltage, resonant swing should force volts across capacitor only volts, making this loss negligible. Total Losses total MOSFET power loss least maximum VDIODE voltage, calculated follows: VDIODE VBAT (max) VOUT (14) maximum average current through diode simply maximum load current. diode should rated handle this current with some margin. addition, diode should able handle power dissipation. majority power loss simply static loss: PSTATIC ILOAD estimated follows: PTOTAL PSTATIC PTURNOFF (11) thermal resistance, RJA, determined methods. estimating maximum junction temperature, TJ(max). other test operating junction temperature, using given device package mounted printed circuit board with copper trace area connected device. then calculated follows: PTOTAL (15) forward voltage drop, found from diode characteristics maximum load. Input Capacitor Selection (12) drain-to-source rating, maximum input voltage, VBAT (max), plus reflected output voltage. Adequate margin should also added, allow tolerancing effects parasitic voltage ring. calculated follows: VOUT VBAT (max) NOUT interests cost performance, recommended that ultralow impedance electrolytic capacitors used. ratio source impedance impedance input capacitor will determine much input current drawn from input capacitor. example, source impedance relatively high, then input capacitor would have supply triangular current that flows through primary winding, MOSFET current sense resistor. This current worked Current Sense Resistor Selection section. Electrolytic capacitors experience heating effects caused current flowing through device. maximum current normally quoted 105°C. Frequency correction factors ripple current provided when operating frequencies less than kHz. rating should adequate most applications. Output Capacitors Selection (13) Output Diodes Selection voltage outputs such filament supply, recommended that Schottky diode used. higher voltage rails, ultrafast rectifier diodes recommended. each output, estimate maximum reverse voltage, VRRM, maximum average current that diode subjected VRRM rating should exceed overall equivalent capacitance output should less (see Control Loop section Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control more information). current that flows capacitor similar current that flows through corresponding rectifier diode. Worst case power dissipation will occur VBAT(min) maximum load. duty cycle under these conditions maximum 0.7. current capacitor found follows: IRMS ILOAD power stage effectively contains pole formed output capacitors loads. terms "closing loop," optimal shaping components shown Functional Block diagram, connected COMP pin. control loop optimized equivalent output capacitor Larger capacitor values used, however, those will tend reduce bandwidth control loop. Smaller values should used, they cause instability issues. Magnetics Design (16) When selecting suitable capacitor, current rating should have reasonable margin with respect above value. addition, current rating should derated take into account frequency correction values less than kHz. impedance output capacitor will affect amount voltage ripple noise that appears output. impedance composed components: reactance, Even with modest amount capacitance output, will tend dominate overall impedance. estimated multiplying capacitance reactance dissipation factor, (tan COUT following known variables: Maximum output power, POUT Minimum battery voltage, VBAT(min). Minimum switching frequency, fSW(min). This occurs VBAT(min) maximum load. Note, recommended that lowest possible switching frequency used, order minimize switching losses shift differential harmonics down frequency spectrum. This compromise with sizing magnetics filtering components. Maximum duty cycle. This should typically exceed 0.7, order avoid excessive losses secondary output circuits. Efficiency converter, VBAT(min). This will typically between 85%. Resonant capacitor, C11, connected between ground. resonant half period achieved with parasitic capacitance that exists circuit. Fine tuning performed adding additional capacitance. Known magnetic core set. Material selection should based performance elevated temperature, include consideration flux density, losses, Curie temperature, forth. (17) Note that normally quoted 25°C, however, usually fairly constant temperature increased. peak peak voltage then found: Vpk-pk ILOAD (18) voltage rating should chosen provide least margin above maximum output voltage. Control Loop converter operates discontinuous mode, inductor does feature power stage. Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control Magnetics sizing determined using techniques such area product geometric product, following manufacturers guidelines, usually form nomograms. simplify design process, resonant switching transition ignored calculations based switcher operating boundary condition continuous/discontinuous conduction. This reasonable assumption resonant period forms small percentage overall period minimum line voltage maximum load (where magnetics designed because worst case conditions). objective design achieve switching when VBAT 13.5 (note that this voltage adjusted value). VBAT voltages less than 13.5 switching still achieved. addition, voltage prevented from swinging negative MOSFET, commanded soon reached. ensure that reflected output voltage forces node following condition must met: VOUT 13.5 Then, maximum peak current found: IPEAK(max) VBAT(min) D(max) fSW(min) LPRI (22) worst case operating flux density, found from ferrite core manufacturers datasheet, taking saturation flux density, BSAT elevated temperatures subtracting margin, approximately allow operation current limit mode during startup. After appropriate magnetic core been selected, number turns required primary winding found: VBAT(min) D(max) fSW(min) (23) where magnetics cross-sectional area number secondary turns derived through turns ratio found previously: (24) (19) there more than output, additional secondary windings simply scaled from main secondary shown following formula: VOUT2 VOUT1 where step-up turns ratio from primary controlled output. Worst case conditions terms core saturation occur when VBAT minimum duty cycle, maximum: D(max) VOUT (VBAT(min) VOUT (25) where: quantity turns additional windings, VOUT1 output voltage from main winding, VOUT2 output voltage from additional windings. total gap, found. First, approximate gap, lg(approx), found before flux fringing taken into account. Given: (26) (20) primary magnetizing inductance determined from following formula, which derived equating input energy output energy times efficiency: LPRI fSW(min) POUT VBAT(min) D(max)) (21) Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control then: Ig(approx) (27) other converter topologies because, during MOSFET off-time, voltage regulated. voltage amplitude across filament winding VFIL VBAT VOUT1 Because flux fringing effects, above should modified, according following formulas. Given: Ig(approx) Ig(approx) (30) (28) where: number turns filament winding, number turns main controlled output winding, VOUT1 output voltage main controlled output. where lg(approx) previously calculated approximate gap, bobbin width (the effective winding width). then total found: Ig(approx) (29) Note that most ferrite core manufacturers provide limited number sizes. therefore recommended select standard size. Size indicated terms factor, which expressed L/N2 units. factor derived from above formulae. minimize flux leakage effects, recommended that should located center limb. however, distributed used, figure should divided two. Some applications require filament output. Typically this center tapped winding with center held some bias voltage. During MOSFET off-time, output voltage control winding simply reflected through turns ratio magnetics. During on-time MOSFET, windings driven forward converter because there rectifying diode isolate this action. voltage during this interval simply battery voltage transformed turns ratio filament winding primary winding. This means that battery voltage varies, there will variation filament voltage. However, this variation will less than those aris- probably desirable optimize filament voltage nominal battery conditions; example, VBAT 13.5 voltage out, number integer turn combinations limited. filament voltage exact. turns range only magnetic wire sizing each winding determined ampere-turns ratio proportion total ampere-turns windings. amount bobbin area available windings influenced amount insulation required, winding construction technique, packing density circular wire. conservative utilization factor 0.5, that bobbin window area filled with copper. current each winding determined. worst case condition minimum input voltage maximum load. primary winding current identical current flowing current sense resistor (see Current Sense Resistor Selection section). current each other output windings found follows. Given: IOUT D'(max) (31) Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control where IOUT maximum load current, D'(max) duty cycle, limited 0.3. Then current winding IRMS Resonant Capacitor Selection (32) Because number turns already been worked out, ampere-turns factor determined. After ampere-turns known each winding, bobbin window apportioned each winding. recommended that current density each winding should kept below mm2. Another consideration when selecting wire gauge skin depth (depth within which current flows), especially higher frequencies. Skin depth calculated resonance that occurs when MOSFET, turns formed interaction primary magnetizing inductance capacitance between node (the drain terminal MOSFET) ground. design optimized half resonant period This means resonant capacitor value found from following formula: CRES (34) where half resonant period advisable measure half resonant period application, parasitic capacitance between node ground substantial even sufficient meet requirements with very little additional capacitance. Layout Guidelines (33) example, were minimum frequency minimum input voltage maximum load, then ensure maximum wire utilization first four switching harmonics, switching frequency would kHz. conduction depth would equal 0.18 therefore, wire diameter should exceed 0.36 particular winding, current rating wire insufficient even though wire meets skin depth criteria, multiple wires wound parallel will necessary. recommended locate start finish each winding close possible bobbin. This minimizes "loop area" reduces effects noise pick-up. When winding high voltage windings, such anode grid, advisable insert layer polyester insulating tape between each layer well between adjacent windings. layout considered blocks: primary secondary: Primary Block minimize parasitic noise appearing ground return, nodes, well maximize effectiveness LPRI VBAT node A4401 MOSFET node RSENSE Minimize this loop area Figure Main power loop Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control filtering, imperative that "power loop" formed input filter, primary winding, MOSFET, sense resistor short "tight" possible. This means components should placed close together possible, loop area should minimized, order reduce effects magnetic pickup noise generation higher frequencies. ground plane necessary, however, good star ground connection should formed between input filter capacitor sense resistor. Circuit traces should wide possible, order minimize leakage inductance. Figure illustrates main power loop. local ground plane around A4401 used minimize ground bounce issues. This done with simple connection from ground A4401 star ground, being careful avoid connection between this local ground plane power loop. compensation components connected COMP pin, filter capacitor connected VIN, feedback resistors connected resonant capacitor connected should located close their respective pins possible. addition, length traces between those components ground should short possible. Secondary Block Each output power circuit should laid with identical principles relative primary side power circuit, that with each secondary winding, rectifying diode, output capacitor positioned close together forming tight loop. high voltage output circuits should kept well away from control circuitry. recommended that good connections made between each local output grounds star ground. addition, output grounds should connected together wide traces ground planes. Figure illustrates output loops. feedback resistor connected regulated output rail should located close possible. trace that connects this resistor output rail should located near output power loops ground connections. Electromagnetic Interference LSEC COUT Some previous sections provide information reducing terms input filter capacitance selection, magnetics design achieve zero voltage switching nominal input voltage), board layout. This section provides some additional advice reducing EMI. Effects Magnetics Design Switching Figure illustrates converter running full power with VBAT 13.5 upper trace voltage across lower trace voltage across sense resistor (essentially current through primary winding MOSFET, Q1). magnetic this case designed achieve switching VBAT Minimize this loop area Figure three output power loops Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control seen that MOSFET turn-on there considerable sinusoidal ringing voltage sense, region MHz. addition, there considerable ringing during MOSFET turn-off, region MHz. These ringing effects caused primary-to-secondary leakage inductance interacting with parasitic capacitance. These noise sources will probably have impact conducted emissions should therefore suppressed. rescaling magnetics that switching achieved with VBAT 13.5 turn-on ringing almost completely damped, shown Figure Because resonant capacitor, C11, discharged before switching, there effectively little energy left. turn-off noise also improved dramatically well. seen that ringing amplitude lower, dampens more quickly, ringing frequency higher making easier snub (see Radiated Emissions Node subsection). reason this effect that lower step-up ratio required achieve output voltage. This improves magnetic coupling coefficient therefore leakage inductance reduced. Running system with lower turns ratio means that duty cycle greater. advantage this that peak current lower, resulting lower turn-off switching losses reduced harmonics input current, thus reducing conducted emissions. Radiated Emissions Node potential source radiated emissions turning MOSFET. resonance between leakage inductance magnetics parasitic capacitance node. Assuming magnetics well designed terms reducing leakage inductance, this resonance should occur region tens megahertz. Another potential source radiated emissions turning output rectifying diodes. following procedure applied address both issues. MOSFET Turn-On MOSFET Turn-Off MOSFET Turn-On MOSFET Turn-Off VRSENSE VRSENSE Figure Voltages with switching VBAT Figure Voltages with switching VBAT 13.5 Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control simple low-loss snubber deployed dampen these oscillations. follow these simple steps determine component values required: Measure voltage resonant frequency, fRES node. additional capacitance (C11) between ground until resonant frequency halved, fRES/2: fRES (35) (LLEAK (LLEAK fRES Figure illustrates converter running full power with VBAT 13.5 upper trace voltage across lower trace voltage across sense resistor, seen that turn-on, noise very low, resonant action introduces very slow voltage slew which reaches before MOSFET turned This action ensures minimal noise produced. However, turn-off there high frequency ringing which could cause issues terms complying with radiated emissions. Figure illustrates effects adding snubber series between GND). seen that, through addition snubber, turn-off ringing been considerably damped. This achieved with almost negligible additional power loss. Conducted Emissions help reduce conducted (36) (37) CNEW CLEAK CADD where: CADD additional capacitance added, CLEAK parasitic capacitance, LLEAK parasitic inductance. Note that value additional capacitance should region hundredths picofarads. calculate component values that will result fRES/2, first calculate CLEAK, given: CLEAK CADD CLEAK CLEAK CADD emissions, filter necessary shown Functional Block diagram. MOSFET Turn-On (38) (39) VRSENSE MOSFET Turn-Off With CLEAK solved, solve LLEAK Finally, solve characteristic impedance parasitic components: LEAK CLEAK (40) selected damping resistor value (not shown functional block diagram). Typically resistor adequate. Figure Voltages with switching with snubber Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control capacitance selection been dealt with Input Capacitor Selection section. terms selecting inductance, generally higher inductance better noise rejection differential conducted emissions concerned. However, large inductance usually means additional cost increased size, therefore, advisable select inductance large possible within constraints board space cost. maximum average current that flows through inductor similar maximum average current that worked Current Sense Resistor Selection section. Both saturation current ratings inductor selected should higher than maximum average current. Care should taken when selecting inductors operation elevated temperatures, because some manufacturers rate their parts using only self-generated heating, giving impression operability higher temperature conditions. Allegro MicroSystems, Inc. Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com A4401 Automotive Quasi-Resonant Flyback Control Package 8-Pin Narrow SOIC 4.90 ±0.10 0.21 ±0.04 0.65 1.75 1.27 3.90 ±0.10 6.00 ±0.20 +0.43 0.84 -0.44 (1.04) 5.60 0.25 SEATING PLANE GAUGE PLANE Layout Reference View 0.20 0.41 ±0.10 1.27 SEATING PLANE 1.75 +0.08 0.18 -0.07 Reference Only (reference JEDEC MS-012 Dimensions millimeters Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown Terminal mark area Reference land pattern layout (reference IPC7351 SOIC127P600X175-9AM); pads minimum 0.20 from adjacent pads; adjust necessary meet application process requirements layout tolerances; when mounting multilayer PCB, thermal vias exposed thermal land improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) Copyright ©2007-2008, Allegro MicroSystems, Inc. products described here manufactured under more U.S. patents U.S. patents pending. Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements performance, reliability, manufacturability products. Before placing order, user cautioned verify that information being relied upon current. Allegro's products used life support devices systems, failure Allegro product reasonably expected cause failure that life support device system, affect safety effectiveness that device system. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringement patents other rights third parties which result from use. latest version this document, visit website: www.allegromicro.com Allegro MicroSystems, Inc. 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