Intended Intended Processor-Based Subsystem Access On-Chip FROM M

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Intended Intended Processor-Based Subsystem Access On-Chip FROM M

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CoreFROM
Intended
Intended Processor-Based Subsystem Access On-Chip FROM Memory
Contents
General Description Connecting CoreFROM CoreConsole Programmer's Model Resource Requirements Ordering Information List Changes Datasheet Categories
Features
Supplied SysBASIC Core Bundle Tiny Area Access FROM Memory from Software
Benefits
Allows FROM Appear Your Memory (read only) Auto Stitch CoreFROM CoreConsole Rapid Development Compatible CortexTM-M1 with AMBA, CoreMP7,
General Description
CoreFROM slave that provides means access 128-byte FROM available Fusion, IGLOO, ProASIC, ProASIC3E devices. want access on-chip FROM, CoreFROM your design connect Bus. Aside from connections Bus, there other ports component. These named FROMAddr (7-bit FROM address bus) FROMData (8-bit FROM data bus) should routed top-level your subsystem design CoreConsole subsequent connection FROM instance.
SmartGen core generator, available Libero IDE,
Supported Device Families
Fusion IGLOO® IGLOOe ProASIC® ProASIC3 ProASIC3E
generate FROM instance values programmed into FROM. More information using FROM Actel devices found following application note:
Synthesis Simulation Support
Supported Actel Libero® Integrated Design Environment (IDE)
Verification Compliance
Compliant with AMBA
January 2008 2008 Actel Corporation
CoreFROM
Connecting CoreFROM CoreConsole
Table lists ports present CoreFROM describes connect these CoreConsole.
Table FROM Access Connections Connection Slave Interface FROM Address CoreConsole Label APBslave FROMAddr Description Connect this interface available slave slot Bus. 7-bit FROM address This port should connected subsystem level subsequent connection FROM instance. FROM Data FROMData 8-bit FROM data This port should connected subsystem level subsequent connection FROM instance. Required Connections
Programmer's Model
When CoreFROM connected FROM Access component, contents FROM appear base address slot where CoreFROM Access component located. FROM contents also aliased throughout this slot.
Table FROM Data Offset Base address 0x00 Base address 0x04 Base address 0x08 Base address 0x0C Base address 0x10 Base address 0x14 Base address 0x18 Base address 0x1C Base address 0x20 Base address 0x24 Base address 0x28 Base address 0x2C Base address 0x30 Base address 0x34 Base address 0x38 Base address 0x3C Base address 0x40 Base address 0x44 Base address 0x48 Base address 0x4C Base address 0x50 Base address 0x54 Base address 0x58 Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte
data stored FROM read only cannot changed processor. FROM data only accessed byte time; possible read word half-word FROM data step. Table shows FROM data appears processor.
Data Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte
v2.1
CoreFROM
Table FROM Data (Continued) Offset Base address 0x5C Base address 0x60 Base address 0x64 Base address 0x68 Base address 0x6C Base address 0x70 Base address 0x74 Base address 0x78 Base address 0x7C Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Data Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte Byte
Resource Requirements
utilization CoreFROM ProASIC3 device tiles.
Ordering Information
CoreFROM included SysBASIC core bundle that supplied with Actel CoreConsole Deployment Platform tool. obfuscated version SysBASIC (SysBASIC-OC) available free with CoreConsole. source version SysBASIC (SysBASIC-RM) ordered through your local Actel sales representative. CoreFROM cannot ordered separately from SysBASIC core bundle.
List Changes
following table lists critical changes that were made current version document.
Previous Version Changes Current Version v2.0 "Supported Device Families" section updated include ProASIC3L. "Resource Requirements" section updated change ProASIC3E ProASIC3. Advanced v0.1 "Product Summary" section "General Description" section were updated include Cortex-M1 IGLOO/e information. Page
Datasheet Categories
order provide latest information designers, some datasheets published before data been fully characterized. Datasheets designated "Product Brief," "Advanced," "Production," "Datasheet Supplement." definitions these categories follows:
Product Brief
product brief summarized version datasheet (advanced production) containing general product information. This brief gives overview specific device family information.
Advanced
This datasheet version contains initial estimated information based simulation, other products, devices, speed grades. This information used estimates, production.
Unmarked (production)
This datasheet version contains information that considered final.
v2.1
Actel Actel logo registered trademarks Actel Corporation. other trademarks property their owners.
www.actel.com
Actel Corporation 2061 Stierlin Court Mountain View, 94043-4655 Phone 650.318.4200 650.318.4600 Actel Europe Ltd. River Court, Meadows Business Park Station Approach, Blackwater Camberley Surrey GU17 United Kingdom Phone 1276 1276 Actel Japan EXOS Ebisu Building 1-24-14 Ebisu Shibuya-ku Tokyo Japan Phone +81.03.3445.7671 +81.03.3445.7668 www.jp.actel.com Actel Hong Kong Room 2107, China Resources Building Harbour Road Wanchai, Hong Kong Phone +852 2185 6460 +852 2185 6488 www.actel.com.cn
51700070-2/1.08

Intended Intended Processor-Based Subsystem Access On-Chip FROM M

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