MITSUBISHI 8-BIT SINGLE-CHIP MICROCOMPUTER FAMILY 38000 SERIES 38

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MITSUBISHI 8-BIT SINGLE-CHIP MICROCOMPUTER FAMILY 38000 SERIES
3822
User's Manual
Group
keep safety first your circuit designs Mitsubishi Electric Corporation puts maximum effort into making semiconductor products better more reliable, there always possibility that trouble occur with them. Trouble with semiconductors lead personal injury, fire property damage. Remember give consideration safety when making your circuit designs, with appropriate measures such placement substitutive, auxiliary circuits, (ii) non-flammable material (iii) prevention against malfunction mishap. Notes regarding these materials These materials intended reference assist customers selection Mitsubishi semiconductor product best suited customer's application; they convey license under intellectual property rights, other rights, belonging Mitsubishi Electric Corporation third party. Mitsubishi Electric Corporation assumes responsibility damage, infringement third-party's rights, originating product data, diagrams, charts circuit application examples contained these materials. information contained these materials, including product data, diagrams charts, represent information products time publication these materials, subject change Mitsubishi Electric Corporation without notice product improvements other reasons. therefore recommended that customers contact Mitsubishi Electric Corporation authorized Mitsubishi Semiconductor product distributor latest product information before purchasing product listed herein. Mitsubishi Electric Corporation semiconductors designed manufactured device system that used under circumstances which human life potentially stake. Please contact Mitsubishi Electric Corporation authorized Mitsubishi Semiconductor product distributor when considering product contained herein specific purposes, such apparatus systems transportation, vehicular, medical, aerospace, nuclear, undersea repeater use. prior written approval Mitsubishi Electric Corporation necessary reprint reproduce whole part these materials. these products technologies subject Japanese export control restrictions, they must exported under license from Japanese government cannot imported into country other than approved destination. diversion reexport contrary export control laws regulations JAPAN and/or country destination prohibited. Please contact Mitsubishi Electric Corporation authorized Mitsubishi Semiconductor product distributor further details these materials products contained therein.
Preface
This user's manual describes Mitsubishi's CMOS 8bit microcomputers 3822 Group. After reading this manual, user should have through knowledge functions features 3822 Group, should able fully utilize product. manual starts with specifications ends with application examples. details software, refer "SERIES <SOFTWARE> USER'S MANUAL."
BEFORE USING THIS USER'S MANUAL
This user's manual consists following three chapters. Refer chapter appropriate your conditions, such hardware design software development.
Organization
CHAPTER HARDWARE This chapter describes features microcomputer, operation each peripheral function electric characteristics. CHAPTER APPLICATION This chapter describes usage application examples peripheral functions, based mainly setting examples related registers. CHAPTER APPENDIX This chapter includes precautions systems development using microcomputer, list control registers, masking confirmation forms (mask version), programming confirmation forms (One Time PROM version) mark specification forms which submitted when ordering.
Structure register
figure each register structure describes functions, contents reset, attributes follows Bits attributes (Note Values immediately after reset release (Note
mode register (CPUM) [Address:3B16] Stack page selection this "1." Port switch Main clock (XIN-XOUT) stop Main clock division ratio selection Internal system clock selection Name Processor mode bits Functions
Single-chip mode available page page port XCIN, XCOUT Oscillating Stopped f(XIN)/2 (high-speed mode) f(XIN)/8 (middle-speed mode) XIN-XOUT selected (middle-/high-speed mode) XCIN-XCOUT selected (low-speed mode)
b1b0
reset
which nothing allocated
that used control corresponding function
Notes Values immediately after reset release reset release reset release reset release attributes control register bits classified into types read-only, write-only read write. figure, these attributes represented follows enabled enabled disabled disabled write enabled
Table contents
Table contents
CHAPTER HARDWARE
Description Features Applications configuration Functional block diagram description Part numbering .1-7 Group expansion Group expansion (extended operating temperature version) Functional description 1-10 Central processing unit (CPU) 1-10 mode register 1-10 Memory. 1-11 ports 1-13 Interrupts 1-18 Timers. 1-21 Serial I/O. 1-25 converter 1-29 drive control circuit 1-30 clock output function 1-36 Reset circuit 1-37 Clock generating circuit 1-39 Notes programming 1-42 Data required mask orders 1-43 Absolute maximum ratings 1-44 Recommended operating conditions 1-44 Electrical characteristics 1-46 converter characteristics 1-48 Timing requirements 1-49 Timing requirements 1-49 Switching characteristics 1-50 Switching characteristics 1-50 Timing diagram 1-51
CHAPTER APPLICATION
pins 2.1.1 ports 2.1.2 Function pins 2.1.3 Application examples. 2.1.4 Notes 2-12 Interrupts 2-15 2.2.1 Explanation operations 2-15 2.2.2 Control 2-19 2.2.3 Related registers 2-22 2.2.4 interrupts 2-28 2.2.5 input interrupt 2-29 2.2.6 Notes 2-31
3822 GROUP USER'S MANUAL
Table contents
Timer timer 2-32 2.3.1 Explanation timer operations 2-32 2.3.2 Explanation timer operations 2-42 2.3.3 Related registers 2-50 2.3.4 Register setting example 2-65 2.3.5 Application examples 2-74 2.3.6 Notes 2-81 Timer timer timer 2-84 2.4.1 Explanation operations 2-84 2.4.2 Related registers 2-89 2.4.3 Register setting example 2-98 2.4.4 Application example .2-99 2.4.5 Notes 2-101 Serial 2-102 2.5.1 Explanation operations 2-102 2.5.2 Pins 2-119 2.5.3 Related registers 2-120 2.5.4 Register setting example 2-128 2.5.5 Notes 2-138 converter 2-140 2.6.1 Explanation operations 2-140 2.6.2 Conversion method 2-141 2.6.3 Pins 2-145 2.6.4 Related registers 2-146 2.6.5 Measuring various converter standard characteristics 2-154 2.6.6 Register setting example 2-156 2.6.7 Application example 2-161 2.6.8 Notes 2-163 drive control circuit 2-164 2.7.1 Explanation operations 2-164 2.7.2 Pins 2-165 2.7.3 Related registers 2-168 2.7.4 Register setting example 2-175 2.7.5 Application examples 2-177 2.7.6 Notes 2-181 Standby function 2-182 2.8.1 Stop mode 2-182 2.8.2 Wait mode 2-187 2.8.3 State transitions internal clock 2-190 Reset 2-191 2.9.1 Explanation operations 2-191 2.9.2 Internal state microcomputer immediately after reset release 2-193 2.9.3 Reset circuit 2-194 2.9.4 Notes RESET 2-195 2.10 Oscillation circuit .2-196 2.10.1 Oscillation circuit. 2-196 2.10.2 Internal clock 2-198 2.10.3 Oscillating operation 2-200 2.10.4 Oscillation stabilizing time 2-203
3822 GROUP USER'S MANUAL
Table contents CHAPTER APPENDIX
Built-in PROM version 3.1.1 Product expansion 3.1.2 Performance overview 3.1.3 configuration 3.1.4 Functional block diagram 3.1.5 Notes Countermeasures against noise 3-10 3.2.1 Shortest wiring length 3-10 3.2.2 Connection bypass capacitor across line line 3-11 3.2.3 Wiring analog input pins 3-12 3.2.4 Oscillator concerns 3-12 3.2.5 Installing oscillator away from signal lines where potential levels change frequently. 3-13 3.2.6 Oscillator protection using pattern 3-13 3.2.7 ports 3-13 3.2.8 Providing watchdog timer function software 3-14 Control registers 3-15 List instruction codes 3-29 Machine instructions 3-30 Mask ordering method 3-40 Mark specification form 3-44 Package outlines 3-46 allocation 3-48 3.10 configuration 3-49
3822 GROUP USER'S MANUAL
List figures
List figures
CHAPTER HARDWARE
Fig. configuration M38223M4-XXXFP Fig. configuration M38223M4-XXXGP/HP Fig. Function block diagram Fig. Part numbering Fig. Memory expansion plan Fig. Memory expansion plan Fig. Structure mode register 1-10 Fig. Memory diagram 1-11 Fig. Memory special function register (SFR) 1-12 Fig. Structure PULL register PULL register 1-13 Fig. Port block diagram 1-15 Fig. Port block diagram 1-16 Fig. Port block diagram 1-17 Fig. Interrupt control 1-19 Fig. Structure interrupt-related registers 1-19 Fig. Connection example when input interrupt port block diagram 1-20 Fig. Timer block diagram 1-21 Fig. Structure timer mode register 1-22 Fig. Structure timer mode register 1-23 Fig. Structure timer mode register 1-24 Fig. Block diagram clock synchronous serial 1-25 Fig. Operation clock synchronous serial function 1-25 Fig. Block diagram UART serial 1-26 Fig. Operation UART serial function 1-26 Fig. Structure serial control registers 1-28 Fig. Structure control register 1-29 Fig. converter block diagram 1-29 Fig. Structure segment output enable register mode register 1-30 Fig. Block diagram controller/driver 1-31 Fig. Example circuit each bias 1-32 Fig. display 1-33 Fig. drive waveform (1/2 bias) 1-34 Fig. drive waveform (1/3 bias) 1-35 Fig. Structure output control register 1-36 Fig. Example reset circuit 1-37 Fig. Internal status microcomputer immediately after reset 1-37 Fig. Reset sequence 1-38 Fig. Ceramic resonator circuit 1-39 Fig. External clock input circuit 1-39 Fig. System clock generating circuit block diagram 1-40 Fig. State transitions internal clock 1-41 Fig. Programming testing Time PROM version 1-43 Fig. Circuit measuring output switching characteristics 1-50 Fig. Timing diagram 1-51
3822 GROUP USER'S MANUAL
List figures CHAPTER APPLICATION
Fig. 2.1.1 port write read Fig. 2.1.2 Structure port direction register Fig. 2.1.3 Structure ports direction registers Fig. 2.1.4 Port direction register setting example Fig. 2.1.5 Structure PULL register Fig. 2.1.6 Structure PULL register Fig. 2.1.7 Connection example input Fig. 2.1.8 input control procedure Fig. 2.1.9 Timing diagram where switch pressed .2-9 Fig. 2.1.10 Connection example input 2-10 Fig. 2.1.11 input control procedure 2-10 Fig. 2.1.12 Timing diagram where switch pressed 2-11 Fig. 2.2.1 Interrupt operation diagram .2-15 Fig. 2.2.2 Changes stack pointer program counter upon acceptance interrupt request 2-17 Fig. 2.2.3 Processing time execution interrupt processing routine 2-18 Fig. 2.2.4 Timing after acceptance interrupt request 2-18 Fig. 2.2.5 Interrupt control diagram 2-19 Fig. 2.2.6 Example multiple interrupts 2-21 Fig. 2.2.7 Memory allocation interrupt-related registers 2-22 Fig. 2.2.8 Structure interrupt edge selection register 2-22 Fig. 2.2.9 Structure interrupt request register .2-23 Fig. 2.2.10 Structure interrupt request register 2-24 Fig. 2.2.11 Structure interrupt control register 2-25 Fig. 2.2.12 Structure interrupt control register 2-26 Fig. 2.2.13 Structure processor status register 2-27 Fig. 2.2.14 Structure interrupt edge selection register 2-28 Fig. 2.2.15 Connection example when input interrupt used, port block diagram 2-29 Fig. 2.2.16 Setting values (corresponding Figure 2.2.15) input interrupt-related registers 2-30 Fig. 2.2.17 Register setting example 2-31 Fig. 2.3.1 Timer mode operation example 2-33 Fig. 2.3.2 Pulse output mode operation example 2-35 Fig. 2.3.3 Event counter mode operation example 2-37 Fig. 2.3.4 Pulse width measurement mode operation example 2-39 Fig. 2.3.5 Timer mode operation example with real time port function 2-41 Fig. 2.3.6 Timer mode operation example 2-43 Fig. 2.3.7 Period measurement mode operation example 2-45 Fig. 2.3.8 Event counter mode operation example 2-47 Fig. 2.3.9 Pulse width continuously measurement mode operation example 2-49 Fig. 2.3.10 Memory allocation timer timer Y-related registers 2-50 Fig. 2.3.11 Structure port direction register 2-51 Fig. 2.3.12 Structure timer latch 2-52 Fig. 2.3.13 Structure timer counter 2-53 Fig. 2.3.14 Structure timer latch 2-54 Fig. 2.3.15 Structure timer counter 2-55 Fig. 2.3.16 Structure timer mode register 2-56 Fig. 2.3.17 Structure timer mode register 2-59 Fig. 2.3.18 Structure interrupt request register 2-61 Fig. 2.3.19 Structure interrupt request register 2-62 Fig. 2.3.20 Structure interrupt control register 2-63 Fig. 2.3.21 Structure interrupt control register 2-64 Fig. 2.3.22 Example setting registers using timer mode 2-65 Fig. 2.3.23 Example setting registers using pulse output mode 2-66 Fig. 2.3.24 Example setting registers using event counter mode 2-67 Fig. 2.3.25 Example setting registers using pulse width measurement mode 2-68 Fig. 2.3.26 Example setting registers using real time port 2-69 Fig. 2.3.27 Example setting registers using timer mode 2-70
3822 GROUP USER'S MANUAL
List figures
Fig. 2.3.28 Example setting registers using period measurement mode 2-71 Fig. 2.3.29 Example setting registers using event counter mode 2-72 Fig. 2.3.30 Example setting registers using pulse width continuously measurement mode 2-73 Fig. 2.3.31 Example peripheral circuit 2-74 Fig. 2.3.32 Connection timer setting division ratio 2-74 Fig. 2.3.33 Setting related registers 2-75 Fig. 2.3.34 Control procedure 2-75 Fig. 2.3.35 Example peripheral circuit 2-76 Fig. 2.3.36 Setting related registers 2-76 Fig. 2.3.37 Ringer signal waveform 2-77 Fig. 2.3.38 Operation timing when ringer signal input 2-77 Fig. 2.3.39 Control procedure 2-78 Fig. 2.3.40 Timer interrupt processing procedure example when real time port used 2-79 Fig. 2.3.41 Application connection example when used 2-80 Fig. 2.3.42 output example 2-80 Fig. 2.4.1 Timer mode operation example 2-85 Fig. 2.4.2 Rewriting example counter latch corresponding timers 2-86 Fig. 2.4.3 Rewriting example timer counter timer latch (Writing timer latch only) 2-87 Fig. 2.4.4 Pulse output example 2-88 Fig. 2.4.5 Memory allocation timer-related registers 2-89 Fig. 2.4.6 Structure latches 2-90 Fig. 2.4.7 Structure timer counters 2-91 Fig. 2.4.8 Structure timer mode register 2-92 Fig. 2.4.9 Structure interrupt request register 2-94 Fig. 2.4.10 Structure interrupt request register 2-95 Fig. 2.4.11 Structure interrupt control register 2-96 Fig. 2.4.12 Structure interrupt control register 2-97 Fig. 2.4.13 Example setting registers timers 2-98 Fig. 2.4.14 Setting related registers 2-99 Fig. 2.4.15 Control procedure .2-100 Fig. 2.5.1 External connection example clock synchronous mode 2-102 Fig. 2.5.2 Shift clock .2-103 Fig. 2.5.3 Transmit operation clock synchronous mode .2-106 Fig. 2.5.4 Transmit timing example clock synchronous mode .2-107 Fig. 2.5.5 Receive operation clock synchronous mode .2-109 Fig. 2.5.6 Receive timing example clock synchronous mode .2-109 Fig. 2.5.7 Transmit/receive timing example clock synchronous mode .2-110 Fig. 2.5.8 External connection example UART mode 2-111 Fig. 2.5.9 Transfer data format UART mode .2-113 Fig. 2.5.10 transfer data formats UART mode .2-114 Fig. 2.5.11 Transmit timing example UART mode 2-116 Fig. 2.5.12 Receive timing example UART mode .2-118 Fig. 2.5.13 Memory allocation serial I/O-related registers 2-120 Fig. 2.5.14 Structure transmit/receive buffer register 2-120 Fig. 2.5.15 Structure serial status register 2-121 Fig. 2.5.16 Structure serial control register .2-123 Fig. 2.5.17 Structure UART control register 2-126 Fig. 2.5.18 Transmitting method clock synchronous mode 2-128 Fig. 2.5.19 Transmitting method clock synchronous mode 2-129 Fig. 2.5.20 Receiving method clock synchronous mode .2-130 Fig. 2.5.21 Receiving method clock synchronous mode .2-131 Fig. 2.5.22 Transmitting method UART mode .2-132 Fig. 2.5.23 Transmitting method UART mode .2-133 Fig. 2.5.24 Receiving method UART mode .2-134 Fig. 2.5.25 Receiving method UART mode .2-135
3822 GROUP USER'S MANUAL
List figures
Fig. 2.6.1 Changes conversion register comparison voltage during conversion 2-143 Fig. 2.6.2 converter equivalent connection diagram 2-144 Fig. 2.6.3 Memory allocation converter-related registers 2-146 Fig. 2.6.4 Structure control register 2-147 Fig. 2.6.5 Structure conversion register 2-148 Fig. 2.6.6 Structure mode register 2-149 Fig. 2.6.7 Structure port direction register 2-150 Fig. 2.6.8 Structure port direction register 2-151 Fig. 2.6.9 Structure interrupt request register 2-152 Fig. 2.6.10 Structure interrupt control register 2-153 Fig. 2.6.11 Absolute accuracy converter 2-154 Fig. 2.6.12 Differential non-linearity error converter 2-155 Fig. 2.6.13 Operating conditions using converter 2-156 Fig. 2.6.14 Register initialization example when internal trigger selected 2-157 Fig. 2.6.15 Register initialization example when internal trigger selected 2-158 Fig. 2.6.16 Register initialization example when external trigger selected 2-159 Fig. 2.6.17 Register initialization example when external trigger selected 2-160 Fig. 2.6.18 Example peripheral circuit 2-161 Fig. 2.6.19 Setting related registers 2-161 Fig. 2.6.20 Control procedure 2-162 Fig. 2.7.1 Memory allocation display-related registers 2-168 Fig. 2.7.2 Structure segment output enable register 2-169 Fig. 2.7.3 Structure mode register 2-171 Fig. 2.7.4 Structure port direction register 2-172 Fig. 2.7.5 Structure port direction register 2-173 Fig. 2.7.6 Structure PULL register 2-174 Fig. 2.7.7 Example setting registers display 2-175 Fig. 2.7.8 Example setting registers display 2-176 Fig. 2.7.9 8-segment panel display pattern example when duty ratio number 2-177 Fig. 2.7.10 panel example 2-178 Fig. 2.7.11 Segment allocation example 2-178 Fig. 2.7.12 display setting example 2-178 Fig. 2.7.13 Setting related registers 2-179 Fig. 2.7.14 Control procedure 2-180 Fig. 2.8.1 Oscillation stabilizing time restoration reset input 2-183 Fig. 2.8.2 Execution sequence example restoration occurrence INT0 Interrupt request 2-185 Fig. 2.8.3 Reset input time .2-188 Fig. 2.8.4 State transitions internal clock 2-190 Fig. 2.9.1 Internal reset state hold/release timing 2-191 Fig. 2.9.2 Internal processing sequence immediately after reset release 2-192 Fig. 2.9.3 Internal state microcomputer immediately after reset release 2-193 Fig. 2.9.4 Poweron reset conditions 2-194 Fig. 2.9.5 Poweron reset circuit examples 2-194 Fig. 2.10.1 Oscillating circuit example using ceramic resonators 2-196 Fig. 2.10.2 External clock input circuit example 2-197 Fig. 2.10.3 Clock generating circuit block diagram 2-198 Fig. 2.10.4 Structure output control register 2-199 Fig. 2.10.5 State transitions internal clock 2-202 Fig. 2.10.6 Oscillation stabilizing time poweron 2-203 Fig. 2.10.7 Oscillation stabilizing time reoscillation 2-204
3822 GROUP USER'S MANUAL
List figures CHAPTER APPENDIX
Fig. 3.1.1 configuration EPROM version (top view) Fig. 3.1.2 configuration Time PROM version (top view) Fig. 3.1.3 configuration Time PROM version (top view) Fig. 3.1.4 Functional block diagram built-in PROM version Fig. 3.1.5 Programming testing Time PROM version (shipped blank) Fig. 3.2.1 Wiring RESET input 3-10 Fig. 3.2.2 Wiring clock pins 3-10 Fig. 3.2.3 Wiring Time PROM EPROM version 3-11 Fig. 3.2.4 Bypass capacitor across line line 3-11 Fig. 3.2.5 Analog signal line resistor capacitor 3-12 Fig. 3.2.6 Wiring large current signal line 3-12 Fig. 3.2.7 Wiring signal line where potential levels change frequently 3-13 Fig. 3.2.8 pattern underside oscillator 3-13 Fig. 3.2.9 Setup ports 3-13 Fig. 3.2.10 Watchdog timer software 3-14 Fig. 3.3.1 Structure port direction registers 3-15 Fig. 3.3.2 Structure port direction registers 3-15 Fig. 3.3.3 Structure PULL register 3-16 Fig. 3.3.4 Structure PULL register 3-16 Fig. 3.3.5 Structure serial status register 3-17 Fig. 3.3.6 Structure serial control register 3-18 Fig. 3.3.7 Structure UART control register 3-19 Fig. 3.3.8 Structure timer mode register 3-20 Fig. 3.3.9 Structure timer mode register 3-21 Fig. 3.3.10 Structure timer mode register 3-22 Fig. 3.3.11 Structure output control register 3-22 Fig. 3.3.12 Structure control register 3-23 Fig. 3.3.13 Structure segment output register 3-24 Fig. 3.3.14 Structure mode register 3-25 Fig. 3.3.15 Structure interrupt edge selection register 3-26 Fig. 3.3.16 Structure mode register 3-26 Fig. 3.3.17 Structure interrupt request register 3-27 Fig. 3.3.18 Structure interrupt request register 3-27 Fig. 3.3.19 Structure interrupt control register 3-28 Fig. 3.3.20 Structure interrupt control register 3-28
3822 GROUP USER'S MANUAL
List tables
List tables
CHAPTER HARDWARE
Table description Table description Table List supported products Table ports functions 1-14 Table Interrupt vector addresses priorities 1-18 Table Maximum number display pixels each duty ratio 1-30 Table Bias control applied voltage VL1-VL3 1-32 Table Duty ratio control common pins used 1-32 Table Programming adapter 1-43 Table Absolute maximum ratings 1-44 Table Recommended operating conditions 1-44 Table Recommended operating conditions 1-45 Table Electrical characteristics 1-46 Table Electrical characteristics 1-47 Table converter characteristics 1-48 Table Timing requirements 1-49 Table Timing requirements 1-49 Table Switching characteristics 1-50 Table Switching characteristics 1-50
CHAPTER APPLICATION
Table 2.1.1 Memory allocation port registers Table 2.1.2 Memory allocation port direction registers Table 2.1.3 ports which either pull-up pull-down controlled software Table 2.1.4 Termination unused pins 2-14 Table 2.2.1 Interrupt sources interrupt request generating conditions 2-16 Table 2.2.2 List interrupt bits individual interrupt sources 2-20 Table 2.3.1 Real time ports data storage bits 2-40 Table 2.3.2 Relation between timer operating mode bits operating modes 2-57 Table 2.3.3 Relation between timer operating mode bits operating modes 2-60 Table 2.3.4 Table example timer setting value 2-80 Table 2.3.5 Table example setting value 2-80 Table 2.4.1 Relation between timer count source selection count sources 2-93 Table 2.4.2 Relation between timer count source selection count sources 2-93 Table 2.4.3 Relation between timer count source selection count sources 2-93 Table 2.5.1 Baud rate selection table (reference values) 2-112 Table 2.5.2 Each function UART transmit data .2-113 Table 2.5.3 Control contents transmit enable 2-124 Table 2.5.4 Control contents receive enable .2-125 Table 2.5.5 Relation between UART control register transfer data formats .2-127 Table 2.6.1 Expression comparison voltage "Vref .2-141 Table 2.6.2 List functions used converter .2-145 Table 2.7.1 functions setting segment output enable register 2-165 Table 2.7.2 functions setting corresponding registers when they used segment output pins 2-166 Table 2.7.3 Setting segment output pins display 2-166 Table 2.7.4 Setting input ports P34-P37 ports .2-167 Table 2.7.5 Setting pull-down pins .2-167 Table 2.8.1 State stop mode 2-182 Table 2.8.2 State wait mode .2-187 Table 2.9.1 Timers reset .2-192
3822 GROUP USER'S MANUAL
List tables CHAPTER APPENDIX
Table 3.1.1 Product expansion built-in PROM version Table 3.1.2 Performance overview built-in PROM version
3822 GROUP USER'S MANUAL
CHAPTER HARDWARE
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DESCRIPTION
3822 group 8-bit microcomputer based family core technology. 3822 group drive control circuit 8-channel converter, Serial additional functions. various microcomputers 3822 group include variations internal memory size packaging. details, refer section part numbering. details availability microcomputers 3822 group, refer section group expansion.
drive control circuit
Bias 1/2, Duty 1/2, 1/3, Common output Segment output Clock generating circuit Clock IN-XOUT) Internal feedback resistor Sub-clock (XCIN -XCOUT) Without internal feedback resistor (connect external ceramic resonator quartz-crystal oscillator) Power source voltage high-speed mode 8MHz oscillation frequency high-speed selected) middle-speed mode .2.5 8MHz oscillation frequency middle-speed selected) low-speed mode (Extended operating temperature version: Power dissipation high-speed mode oscillation frequency) low-speed mode oscillation frequency, power source voltage) Operating temperature range 85°C (Extended operating temperature version: 85°C)
FEATURES
Basic machine-language instructions minimum instruction execution time
8MHz oscillation frequency)
Memory size
bytes 1024 bytes Programmable input/output ports Software pull-up/pull-down resistors (Ports P0-P7 except Port Interrupts sources, vectors (includes input interrupt) Timers 8-bit 16-bit Serial I/O1 8-bit (UART Clock-synchronized) Serial I/O2 8-bit channels
APPLICATIONS
Camera, household appliances, consumer electronics, etc.
CONFIGURATION (TOP VIEW)
SEG8 SEG9 SEG10 SEG11 /SEG12 /SEG13 P36/SEG14 P37/SEG15 P00/SEG16 P01/SEG17 P02/SEG18 /SEG19 P04/SEG20 P05/SEG21 P06/SEG22 P07/SEG23 /SEG24 P11/SEG25 P12/SEG26 P13/SEG27 P14/SEG28 P15/SEG29 P16/SEG30 P17/SEG31
SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 VREF AVSS COM3 COM2 COM1 COM0
M38223M4-XXXFP
XOUT /XCOUT /XCIN RESET
Fig. configuration M38223M4-XXXFP
/AN7 P66/AN6 P65/AN5 P64/AN4 P63/AN3 /AN2 P61/AN1 P60/AN0 /ADT TOUT /CNTR1 P54/CNTR0 P53/RTP1 P52/RTP0 P51/INT3 P50/INT2 P47/SRDY /SCLK P45/ P44/RXD /INT1 P42/INT0
Package type 80P6N-A 80-pin plastic-molded
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CONFIGURATION (TOP VIEW)
SEG10 SEG11 P34/SEG12 /SEG13 P36/SEG14 P37/SEG15 P00/SEG16 /SEG17 P02/SEG18 P03/SEG19 P04/SEG20 P05/SEG21 /SEG22 P07/SEG23 P10/SEG24 P11/SEG25 P12/SEG26 /SEG27 P14/SEG28 P15/SEG29
SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 VREF AVSS
M38223M4-XXXGP M38223M4-XXXHP
P16/SEG30 P17/SEG31 XOUT P70/XCOUT P71/XCIN RESET P41/ P42/INT0 P43/INT1
Package type 80P6S-A/80P6D-A 80-pin plastic-molded
Fig. configuration M38223M4-XXXGP/HP
P67/AN7 /AN6 P65/AN5 P64/AN4 /AN3 P62/AN2 P61/AN1 /AN0 P57/ADT P56/ TOUT /CNTR1 P54/CNTR0 P53/RTP1 P52/RTP0 P51/INT3 P50/INT2 P47/SRDY /SCLK P45/ P44/RXD
XCIN INT2 ,INT3 P5(8) P4(8)
INT0,INT1
Key-on wake
P7(2)
P6(8)
P3(8)
Real time port function
Reset input RESET
FUNCTIONAL BLOCK DIAGRAM (Package 80P6S-A)
Clock input
Clock output XOUT
Fig. Functional block diagram
Data
display bytes)
Clock generating circuit Timer X(16) Timer Y(16) Timer 1(8) Timer 2(8) Timer 3(8)
COM0 COM1 COM2 COM3
XCIN Subclock input
XCOUT Subclock output
drive control circuit
SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11
converter(8)
SI/O(8) TOUT CNTR0,CNTR1 0,RTP
XCOUT
P2(8)
P1(8)
P0(8)
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
port port
port
VREF AVSS
port
Input port
port
port
port
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DESCRIPTION
VREF AVSS RESET XOUT Name Power source Analog reference voltage Analog power source Reset input Clock input Clock output Function Apply voltage Reference voltage input converter. input converter. Connect input active Input output pins main clock generating circuit. Feedback resistor built between pin. Connect ceramic resonator quartz-crystal oscillator between pins oscillation frequency. external clock used, connect clock source leave open. This clock used oscillating source system clock. Input voltage Input voltage common output pins COM2 COM3 used duty ratio. COM3 used duty ratio. segment output pins 8-bit port CMOS compatible input level CMOS 3-state output structure direction register allows each port individually programmed either input output. Pull-down control enabled. 8-bit port CMOS compatible input level CMOS 3-state output structure direction register allows each individually programmed either input output. Pull-up control enabled. 4-bit Input port CMOS compatible input level Pull-down control enabled. 1-bit input CMOS compatible input level 7-bit port CMOS compatible input level CMOS 3-state output structure direction register allows each individually programmed either input output. Pull-up control enabled. clock output Interrupt input pins Serial I/O1 function pins segment pins Function except port function
COM3
power source Common output
SEG11 /SEG /SEG /SEG24 /SEG
Segment output port
port
port
input (key-on wake interrupt input pins
/SEG /SEG /INT0 /INT1 P44/RXD, P45/TXD, /SCLK, P47/SRDY
Input port
segment pins
Input port port
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DESCRIPTION
P50/INT2 P51/INT3 /RTP0 /RTP1 /CNTR0 /CNTR1 Timer output P56/T trigger input P57/ADT /AN0P67/AN port 8-bit port CMOS compatible input level CMOS 3-state output structure direction register allows each individually programmed either input output. Pull-up control enabled. 2-bit port CMOS compatible input level CMOS 3-state output structure direction register allows each individually programmed either input output. Pull-up control enabled. conversion input pins Name port Function Function except port function 8-bit port CMOS compatible input level CMOS 3-state output structure direction register allows each individually programmed either input output. Pull-up control enabled. Interrupt input pins Real time port function pins Timer function pins
P70/X COUT, P71/X
port
Sub-clock generating circuit pins (Connect resonator. External clock cannot used.)
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PART NUMBERING
Product M3822 Package type 80P6N-A package 80P6S-A package 80P6D-A package 80D0 package number Omitted some types. Normally, using hyphen When electrical characteristic, division quality identification code using alphanumeric character Standard Extended operating temperature version ROM/PROM size 4096 bytes 8192 bytes 12288 bytes 16384 bytes 20480 bytes 24576 bytes 28672 bytes 32768 bytes first bytes last bytes reserved areas they cannot used. Memory type Mask version EPROM Time PROM version size bytes bytes bytes bytes bytes bytes bytes 1024 bytes
Fig. Part numbering
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
GROUP EXPANSION
Mitsubishi plans expand 3822 group follows: Support mask ROM, Time PROM, EPROM versions ROM/PROM size bytes size bytes
Packages 80P6N-A mm-pitch plastic molded 80P6S-A 0.65 mm-pitch plastic molded 80P6D-A mm-pitch plastic molded 80D0 mm-pitch ceramic (EPROM version)
Memory Expansion Plan
size (bytes)
Mass product M38223M4/E4
Mass product M38223M2
size (bytes)
1024
Fig. Memory expansion plan Currently supported products listed below. Product M38223M4-XXXFP M38223E4-XXXFP M38223E4FP M38223M4-XXXGP M38223E4-XXXGP M38223E4GP M38223M4-XXXHP M38223E4-XXXHP M38223E4HP M38223E4FS M38222M2-XXXFP M38222M2-XXXGP M38222M2-XXXHP size (bytes) size User size (bytes) Package Remarks Mask version Time PROM version Time PROM version (blank) Mask version Time PROM version Time PROM version (blank) Mask version Time PROM version Time PROM version (blank) EPROM version Mask version 1996
80P6N-A
16384 (16254)
80P6S-A
80P6D-A 80D0 80P6N-A 80P6S-A 80P6D-A
8192 (8062)
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
GROUP EXPANSION (EXTENDED OPERATING TEMPERATURE VERSION)
Mitsubishi plans expand 3822 group (extended operating temperature version) follows: Support mask ROM, Time PROM, EPROM versions
size bytes size bytes Packages 80P6N-A mm-pitch plastic molded
Memory Expansion Plan
size (bytes)
Under development M38223M4D
Mass product M38222M2D
size (bytes)
1024
Products under development: development schedule specification revised without notice. Fig. Memory expansion plan
Currently supported products listed below. Product M38223M4DXXXFP M38222M2DXXXGP size (bytes) size User 16384(16254) 8192(8062) size (bytes) Package 80P6N-A 80P6S-A Mask version Mask version Remarks
1996
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL DESCRIPTION Central Processing Unit (CPU)
3822 group uses standard family instruction set. Refer table family addressing modes machine instructions SERIES <Software> User's Manual details instruction set. Machine-resident family instructions follows: instruction cannot used. STP, WIT, MUL, instruction used.
Mode Register
mode register allocated address 003B mode register contains stack page selection internal system clock selection bit.
mode register (CPUM (CM) address 003B Processor mode bits Single-chip mode available Stack page selection zero page used stack area page used stack area used (returns when read) write this bit) Port switch port XCIN XCOUT Main clock -XOUT stop Oscillating Stopped Main clock division ratio selection f(XIN (high-speed mode) f(XIN (middle-speed mode) Internal system clock selection -XOUT selected (middle-/high-speed mode) XCIN -XCOUT selected (low-speed mode)
Fig. Structure mode register
1-10
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MEMORY Special Function Register (SFR) Area
Special Function Register area zero page contains control registers such ports timers.
Zero Page
bytes from addresses 0000 00FF16 called zero page area. internal special function registers (SFR) allocated this area. zero page addressing mode used specify memory register addresses zero page area. Access this area with only bytes possible zero page addressing mode.
used data storage stack area subroutine calls interrupts.
Special Page
first bytes last bytes reserved device testing rest user area storing programs. bytes from addresses FF0016 FFFF called special page area. special page addressing mode used specify memory addresses special page area. Access this area with only bytes possible special page addressing mode.
Interrupt Vector Area
interrupt vector area contains reset interrupt vectors.
area size (bytes) 1024 Address XXXX16 00FF 013F 01BF16 023F 02BF16 033F 03BF16 043F XXXX16 Reserved area 044016 area size (bytes) 4096 8192 12288 16384 20480 24576 28672 32768 Address YYYY16 F000 E00016 D00016 C00016 B00016 A00016 900016 800016 Address ZZZZ F080 E080 D08016 C08016 B080 A080 908016 808016 FF0016 FFDC16 Interrupt vector area FFFE16 Reserved area FFFF Special page ZZZZ YYYY16 Reserved area (128 bytes) used 000016 area 004016 005016 010016 display area Zero page
Fig. Memory diagram
1-11
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
000016 Port (P0) 000116 Port direction register (P0D) 000216 Port (P1) 000316 Port direction register (P1D) 000416 Port (P2) 000516 Port direction register (P2D) 000616 Port (P3) 000716 000816 Port (P4) 000916 Port direction register (P4D) 000A16 Port (P5) 000B16 Port direction register (P5D) 000C16 Port (P6) 000D16 Port direction register (P6D) 000E16 Port (P7) 000F16 Port direction register (P7D) 001016 001116 001216 001316 001416 001516 001616 PULL register (PULLA) 001716 PULL register (PULLB) 001816 Transmit/Receive buffer register(TB/RB) 001916 Serial I/O1 status register (SIO1STS) 001A16 Serial I/O1 control register (SIO1CON) 001B16 UART control register (UARTCON) 001C16 Baud rate generator (BRG) 001D16 001E16 001F16
002016 Timer (low) (TXL) 002116 Timer (high) (TXH) 002216 Timer (low) (TYL) 002316 Timer (high) (TYH) 002416 Timer (T1) 002516 Timer (T2) 002616 Timer (T3) 002716 Timer mode register (TXM) 002816 Timer mode register (TYM) 002916 Timer mode register (T123M) 002A16 output control register (CKOUT) 002B16 002C16 002D16 002E16 002F 003016 003116 003216 003316 003416 control register (ADCON) 003516 conversion register (AD) 003616 003716 003816 Segment output enable register (SEG) 003916 mode register (LM) 003A16 Interrupt edge selection register (INTEDGE) 003B16 mode register (CPUM) 003C16 Interrupt request register 1(IREQ1) 003D16 Interrupt request register 2(IREQ2) 003E16 Interrupt control register 1(ICON1) 003F Interrupt control register 2(ICON2)
Fig. Memory special function register (SFR)
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PORTS Direction Registers (ports P41-P4 P5-P7)
3822 group programmable pins arranged seven ports (ports P0-P2 P5-P7). ports P41-P47, P5-P7 have direction registers which determine input/output direction each individual pin. Each direction register corresponds pin, each input port output port. When written corresponding pin, that becomes input pin. When written that bit, that becomes output pin. data read from output, value port output latch read, value itself. Pins input floating. input written only port output latch written remains floating.
PULL register (PULLA address 0016 -P07 pull-down -P17 pull-down -P27 pull-up -P37 pull-down pull-up used (return when read)
PULL register (PULLB address 0017 -P43 pull-up -P47 pull-up -P53 pull-up -P57 pull-up pull-up -P67 pull-up used (return when read) Disable Enable
Direction Registers (ports
Ports have direction registers which determine input /output direction each individual port. Each port direction register corresponds port, each port input output. When written direction register, that port becomes input port. When written that port, that port becomes output port. Bits ports direction registers used.
Note contents PULL register PULL register affect ports programmed output ports.
Fig. Structure PULL register PULL register
Ports
These ports only input.
Pull-up/Pull-down Control
setting PULL register (address 001616 PULL register (address 0017 16), ports except port control either pull-down pull-up (pins that shared with segment output pins pull-down; other pins pull-up) with program. However, contents PULL register PULL register affect ports programmed output ports.
1-13
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
/SEG16 /SEG23 /SEG24 /SEG31
Name Port
Input/Output Input/output, individual ports Input/output, individual ports Input/output, individual bits
Port
Port
Format CMOS compatible input level CMOS 3-state output CMOS compatible input level CMOS 3-state output CMOS compatible input level CMOS 3-state output CMOS compatible input level
Non-Port Function segment output
segment output input(Key-on wake interrupt input segment output
/SEG12 /SEG15
Port
Input
Related SFRs PULL register Segment output enable register PULL register Segment output enable register PULL register Interrupt control register PULL register Segment output enable register PULL register output control register PULL register Interrupt edge selection register PULL register Serial control register Serial status register UART control register
Diagram
clock output
/INT0 /INT1 /RXD /TXD /SCLK1 /SRDY /INT2 /INT3 /RTP0 /RTP1 /CNTR0 /CNTR1 P56/T /ADT /AN0- /AN7 /XCOUT /XCIN 0-COM3 SEG0 -SEG11
Port
External interrupt input
Serial function
Input/output, individual bits Port
CMOS compatible input level CMOS 3-state output
External interrupt input Real time port function oputput
PULL register Interrupt edge selection register
(10)
Timer Timer Timer output trigger input
Port Port Common Segment output common output segment output
conversion input Sub-clock generating circuit
PULL register Timer mode register PULL register Timer mode register PULL register Timer mode register PULL register Timer mode register PULL register control register PULL register mode register mode register Segment output enable register
(11) (12) (13) (12) (14) (15) (16) (17) (18)
Note Make sure that input level each either during execution instruction. When input level intermediate potential, current will flow from through input-stage gate.
1-14
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(1)Ports VL2/VL3
(2)Ports P43, Pull-up control
VL1/VSS Segment output enable (Note) Direction register Data Data Port latch Direction register Port latch
input (Key-on wake interrupt input INT0 -INT3 interrupt input Pull-down control Segment output enable Note direction register (3)Ports -P37 VL2/VL3 Data VL1/VSS (4)Port
Pull-down control Segment output enable (6)Port Pull-up control Serial enable Reception enable Direction register Data Direction register Data Port latch Pull-up control
(5)Port
Port latch
output control
Serial input
Fig. Port block diagram
1-15
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(7)Port
(8)Port Serial clock-synchronized selection Serial enable Serial mode selection Serial enable Direction register Data Port latch
Pull-up control P45/TXD P-channel output disable Serial enable Transmission enable Direction register Data Port latch
Pull-up control
Serial output
Serial clock output Serial clock input
Port Pull-up control
(10)Ports Pull-up control
Serial mode selection Serial enable SRDY output enable Direction register Data Port latch
Direction register Data
Port latch
Serial ready output
Real time port control Date real time port
(11) Port Pull-up control
(12) Ports Pull-up control Direction register Direction register
Data
Port latch Data Port latch
Timer operating mode (Pulse output mode selection) Timer output CNTR0 interrupt input CNTR1 interrupt input trigger interrupt input
Fig. Port block diagram
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
(13) Port Pull-up control
(14) Port Pull-up control
Direction register Data Data
Direction register
Port latch
Port latch
TOUT output control Timer output
conversion input Analog input selection
(15) Port Port selection/Pull-up control Port switch Direction register Data Port latch
(16) Port Port selection/Pull-up control Port switch Direction register Data Port latch
Oscillation circuit Port Port switch Sub-clock generating circuit input
(17) COM0-COM3
(18) 0-SEG11 VL2/VL3 voltage applied sources P-channel N-channel transistors controlled voltage bias value.
gate input signal each transistor controlled duty ratio bias value.
VL1/VSS
Fig. Port block diagram
1-17
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
INTERRUPTS
Interrupts occur seventeen sources: eight external, eight internal, software.
Interrupt Operation
When interrupt received, contents program counter processor status register automatically stored into stack. interrupt disable flag inhibit other interrupts from interfering.The corresponding interrupt request cleared interrupt jump destination address read from vector table into program counter.
Interrupt Control
Each interrupt controlled interrupt request bit, interrupt enable bit, interrupt disable flag except software interrupt instruction. interrupt occurs corresponding interrupt request enable bits interrupt disable flag "0". Interrupt enable bits cleared software. Interrupt request bits cleared software, cannot software. instruction cannot disabled with flag bit. flag disables interrupts except instruction interrupt.
Notes
When active edge external interrupt (INT 0-INT3, CNTR0 CNTR changed, corresponding interrupt request also set. Therefore, please take following sequence; Disable external interrupt which selected. Change active edge selection. Clear interrupt request which selected "0". Enable external interrupt which selected.
Table Interrupt vector addresses priority Interrupt Source Reset (Note Serial reception Serial transmission Timer Timer Timer Timer CNTR CNTR Timer input (Key-on wake conversion instruction FFDD FFDC16 FFDF FFDE16 completion conversion instruction execution Priority Vector Addresses (Note High FFFD FFFC FFFB16 FFF916 FFF716 FFFA16 FFF816 FFF616 Interrupt Request Generating Conditions reset detection either rising falling edge INT0 input detection either rising falling edge INT1 input completion serial data reception completion serial transmit shift when transmission buffer empty timer underflow timer underflow timer underflow timer underflow detection either rising falling edge CNTR0 input detection either rising falling edge CNTR1 input timer underflow detection either rising falling edge INT2 input detection either rising falling edge INT3 input falling conjunction input level port input mode) falling input Remarks Non-maskable External interrupt (active edge selectable) External interrupt (active edge selectable) Valid when serial I/O1 selected
FFF516 FFF316 FFF116 FFEF16 FFED16 FFEB FFE916 FFE716 FFE516 FFE316 FFE116
FFF416 FFF216 FFF016 FFEE FFEC16 FFEA FFE816 FFE616 FFE416 FFE216 FFE016
Valid when serial I/O1 selected
External interrupt (active edge selectable) External interrupt (active edge selectable) External interrupt (active edge selectable) External interrupt (active edge selectable) External interrupt (valid when level applied) Valid when interrupt selected External interrupt (valid falling) Valid when interrupt selected Non-maskable software interrupt
Notes Vector addresses contain interrupt jump destination addresses. Reset function same interrupt with highest priority.
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Interrupt request Interrupt enable
Interrupt disable flag
instruction Reset
Interrupt request
Fig. Interrupt control
Interrupt edge selection register (INTEDGE address 003A INT0 interrupt edge selection INT1 interrupt edge selection INT2 interrupt edge selection INT3 interrupt edge selection Falling edge active Rising edge active
used (return when read)
Interrupt request register (IREQ1 address 003C INT0 interrupt request INT1 interrupt request Serial receive interrupt request Serial transmit interrupt request Timer interrupt request Timer interrupt request Timer interrupt request Timer interrupt request
Interrupt request register (IREQ2 address 003D CNTR0 interrupt request CNTR1 interrupt request Timer interrupt request INT2 interrupt request INT3 interrupt request input interrupt request ADT/AD conversion interrupt request used (returns when read)
interrupt request issued Interrupt request issued
Interrupt control register (ICON1 address 003E INT0 interrupt enable INT1 interrupt enable Serial receive interrupt enable Serial transmit interrupt enable Timer interrupt enable Timer interrupt enable Timer interrupt enable Timer interrupt enable
Interrupt control register (ICON2 address 003F CNTR0 interrupt enable CNTR1 interrupt enable Timer interrupt enable INT2 interrupt enable INT3 interrupt enable input interrupt enable ADT/AD conversion interrupt enable used (returns when read) write this bit)
Interrupts disabled Interrupts enabled
Fig. Structure interrupt-related registers
1-19
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Input Interrupt (Key-on Wake
input interrupt request generated applying level port that have been input mode. other words, generated when input level goes from "0".
example using input interrupt shown Figure where interrupt request generated pressing keys consisted active-low matrix which inputs ports P20-P23.
Port level output PULL register
Port direction register Port latch
input interrupt request
output
output
Port direction register Port latch
output
Port direction register Port latch
output
Port direction register Port latch
input
Port direction register Port latch
Port Input reading circuit
input
Port direction register Port latch
input
Port direction register Port latch
input
Port direction register Port latch
P-channel transistor pull-up CMOS output buffer
Fig. Connection example when using input interrupt port block diagram
1-20
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
TIMERS
3822 group five timers: timer timer timer timer timer Timer timer 16-bit timers, timer timer timer 8-bit timers. timers down count timers. When timer reaches 16", underflow occurs next count pulse corresponding timer latch reloaded into timer count continued. When timer underflows, interrupt request corresponding that timer "1".
Read write operation 16-bit timer must performed both high low-order bytes. When reading 16-bit timer, read high-order byte first. When writing 16-bit timer, write low-order byte first. 16-bit timer cannot perform correct operation when reading during write operation, when writing during read operation.
Real time port control data real time port Latch direction register latch Real time port control Latch direction register latch
Data
data real time port Real time port control
Timer mode register write signal Timer write control
Timer (high) latch Timer (high)
f(XIN )/16 (f(XCIN )/16 low-speed mode CNTR0 active edge switch
Timer operating mode "00","01","11"
Timer stop control
Timer (low) latch Timer (low)
/CNTR0
"10" Pulse width measurement mode CNTR0 active edge switch direction register latch Pulse output mode
Timer interrupt request CNTR0 interrupt request
Pulse output mode
Rising edge detection Falling edge detection Period measurement mode
Timer operating mode "00","01","10"
Pulse width continuously measurement mode
CNTR1 interrupt request
"11"
/CNTR1
CNTR1 active edge switch
f(XIN )/16 (f(XCIN )/16 low-speed mode Timer stop control "00","01","11"
Timer (low) latch Timer (low) Timer (high) latch Timer (high)
"10" Timer operating mode
Timer interrupt request
)/16 (f(XCIN )/16 low-speed mode Timer count source selection Timer latch XCIN Timer
Timer count source selection Timer latch Timer
f(XIN)/16 (f(XCIN )/16 low-speed modeV)
Timer write control
Timer interrupt request Timer interrupt request
TOUT output active edge switch P56/TOUT
TOUT output control Timer latch Timer Timer count source selection
latch direction register TOUT output control f(XIN )/16(f(XCIN )/16 low-speed mode
Timer interrupt request
VInternal
clock XCIN
Fig. Timer block diagram
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Timer
Timer 16-bit timer that selected four modes controlled timer write real time port setting timer mode register. Timer mode timer counts f(XIN)/16 CIN)/16 low-speed mode). Pulse output mode Each time timer underflows, signal output from CNTR inverted. Except this, operation pulse output mode same timer mode. When using timer this mode, corresponding port direction register output mode. Event counter mode timer counts signals input through CNTR0 pin. Except this, operation event counter mode same timer mode. When using timer this mode, corresponding port direction register input mode. Pulse width measurement mode count source f(XIN )/16 f(XCIN)/16 low-speed mode). CNTR0 active edge switch "0", timer counts while input signal CNTR0 "H". "1", timer counts while input signal CNTR "L". When using timer this mode, corresponding port direction register input mode.
Note CNTR0 Interrupt Active Edge Selection
CNTR0 interrupt active edge depends CNTR0 active edge switch bit.
Real Time Port Control
While real time port function valid, data real time port output from ports each time timer underflows. (However, after rewriting data real time port, real time port control changed from "1", data output without timer data real time port changed while real time port function valid, changed data output next underflow timer Before using this function, corresponding port direction registers output mode.
Timer mode register (TXM address 0027 Timer write control Write value latch counter Write value latch only Real time port control Real time port function invalid Real time port function valid data real time port data real time port Timer operating mode bits Timer mode Pulse output mode Event counter mode Pulse width measurement mode CNTR0 active edge switch Count rising edge event counter mode Start from output pulse output mode Measure pulse width pulse width measurement mode Falling edge active CNTR interrupt Count falling edge event counter mode Start from output pulse output mode Measure pulse width pulse width measurement mode Rising edge active CNTR interrupt Timer stop control Count start Count stop
Timer Write Control
timer write control "0", when value written address timer value loaded timer latch same time. timer write control "1", when value written address timer value loaded only latch. value latch loaded timer after timer underflows. value written latch only, unexpected value high-order counter when writing high-order latch underflow timer performed same timing.
Fig. Structure timer mode register
1-22
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Timer
Timer 16-bit timer that selected four modes. Timer mode timer counts f(XIN)/16 f(XCIN )/16 low-speed mode). Period measurement mode CNTR1 interrupt request generated rising/falling edge CNTR1 input signal. Simultaneously, value timer latch reloaded timer timer continues counting down/Except above-mentioned, operation period measurement mode same timer mode. timer value just before reloading rising/falling CNTR1 input signal retained until timer read once after reload. rising/falling timing CNTR input signal found CNTR1 interrupt. When using timer this mode, corresponding port direction register input mode. Event counter mode timer counts signals input through CNTR1 pin. Except this, operation event counter mode same timer mode. When using timer this mode, corresponding port direction register input mode. Pulse width continuously measurement mode CNTR1 interrupt request generated both rising falling edges CNTR1 input signal. Except this, operation pulse width continuously measurement mode same period measurement mode. When using timer this mode, corresponding port direction register input mode.
Timer mode register (TYM address 0028 used (return when read) Timer operating mode bits Timer mode Period measurement mode Event counter mode Pulse width continuously measurement mode CNTR1 active edge switch Count rising edge event counter mode Measure falling edge falling edge period period measurement mode Falling edge active CNTR interrupt Count falling edge event counter mode Measure rising edge period period measurement mode Rising edge active CNTR interrupt Timer stop control Count start Count stop
Fig. Structure timer mode register
Note CNTR1 Interrupt Active Edge Selection
CNTR1 interrupt active edge depends CNTR1 active edge switch bit. However, pulse width continuously measurement mode, CNTR1 interrupt request generated both rising falling edges CNTR1 input signal regardless setting CNTR1 active edge switch bit.
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Timer Timer Timer
Timer timer timer 8-bit timers. count source each timer selected timer mode register. timer latch value affected change count source. However, because changing count source cause inadvertent count down timer. Therefore, rewrite value timer whenever count source changed.
Timer mode register (T123M address 0029 TOUT output active edge switch Start output Start output TOUT output control output disabled output enabled Timer write control Write data latch counter Write data latch only Timer count source selection Timer output f(XIN )/16 f(XCIN )/16 low-speed mode) Timer count source selection Timer output f(XIN )/16 f(XCIN )/16 low-speed mode) Timer count source selection f(XIN )/16 f(XCIN )/16 low-speed mode) f(XCIN used (return when read) Note Internal clock f(XCIN)/2 low-speed mode.
Timer Write Control
timer write control "0", when value written address timer value loaded timer latch same time. timer write control "1", when value written address timer value loaded only latch. value latch loaded timer after timer underflows.
Timer Output Control
When timer OUT) output enabled, inversion signal from TOUT output each time timer underflows. this case, port shared with port TOUT output mode.
Note Timer Timer
When count source timer changed, timer counting value changed large because thin pulse generated count input timer timer output selected count source timer timer when timer written, counting value timer timer changed large because thin pulse generated timer output. Therefore, value timer order timer timer timer after count source selection timer
Fig. Structure timer mode register
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SERIAL
Serial used either clock synchronous asynchronous (UART) serial I/O. dedicated timer (baud rate generator) also provided baud rate generation.
Clock Synchronous Serial Mode
Clock synchronous serial mode selected setting mode selection serial control register "1". clock synchronous serial I/O, transmitter receiver must same clock. internal clock used, transfer started write signal TB/RB (address 001816).
Data Address 0018
Receive buffer Serial control register
Address 001A
Receive buffer full flag (RBF) Receive interrupt request (RI)
Clock control circuit
P44/RXD
Receive shift register
Shift clock /SCLK1
f(XIN
count source selection
Serial synchronization clock selection Frequency division ratio 1/(n+1)
Baud rate generator
Address 001C
Falling-edge detector Clock control circuit
P47/SRDY1
Shift clock /TXD
Transmit shift register
Transmit buffer register (TB)
Transmit shift register shift completion flag (TSC) Transmit interrupt source selection Serial transmit interrupt request (TI) Transmit buffer empty flag (TBE) Address 0019
Address 0018 Data
Serial status register
Fig. Block diagram clock synchronous serial
Transfer shift clock (1/2 1/2048 internal clock, external clock) Serial output Serial input
Receive enable signal RDY1 Write signal receive/transmit buffer register (address 0018 Overrun error (OE) detection
Notes transmit interrupt (TI) selected occur either when transmit buffer register emptied (TBE=1) after transmit shift operation ended (TSC=1), setting transmit interrupt source selection (TIC) serial control register. data written transmit buffer register when TSC=0, transmit clock generated continuously serial data output continuously from pin. receive interrupt (RI) when receive buffer full flag (RBF) becomes
Fig. Operation clock synchronous serial function
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Asynchronous Serial I/O1 (UART) Mode
Clock asynchronous serial I/O1 mode (UART) selected clearing serial mode selection serial control register "0". Eight serial data transfer formats selected, transfer formats used transmitter receiver must identical. transmit receive shift registers each have buffer regis-
ter, buffers have same address memory. Since shift register cannot written read from directly, transmit data written transmit buffer register, receive data read from receive buffer register. transmit buffer register also hold next data transmitted, receive buffer register hold character while next character being received.
Data Address 0018 Serial control register Address 001A16 Receive buffer full flag (RBF)
Serial receive interrupt request (RI)
Receive buffer register(RB) Character length selection
/RXD
detector
bits bits
Receive shift register 1/16 detector Clock control circuit UART control register Address 001B16
Serial synchronization clock selection /SCLK1 count source selection Frequency division ratio 1/(n+1) Baud rate generator Address 001C
ST/SP/PA generator
f(XIN
1/16 /TXD Character length selection
Transmit buffer register
Transmit shift register shift completion flag (TSC) Transmit interrupt source selection Transmit interrupt request (TI) Transmit buffer empty flag (TBE) Serial status register Address 0019
Transmit shift register
Address 0018 Data
Fig. Block diagram UART serial
Transmit receive clock Transmit buffer register write signal TBE=0 TSC=0 TBE=1 Serial output TBE=0 TBE=1 start data bits parity stop
VGenerated
TSC=1V 2-stop-bit mode
Receive buffer register read signal
RBF=1 Serial input
RBF=0
RBF=1
Notes Error flag detection occurs same time that flag becomes stop bit, during reception). transmit interrupt (TI) selected occur when either flag becomes "1", depending setting transmit interrupt source selection (TIC) serial control register. receive interrupt (RI) when flag becomes "1". After data written transmit buffer register when TSC=1, cycles data shift cycle necessary until changing TSC=0.
Fig. Operation UART serial function
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Serial Control Register (SIO1CON) 001A16
serial control register contains eight control bits serial function.
UART Control Register (UARTCON) 001B16
UART control register consists four control bits (bits which valid when asynchronous serial selected data format data transfer. this register (bit always valid sets output structure P45/T pin.
Serial Status Register (SIO1STS) 001916
read-only serial status register consists seven flags (bits which indicate operating status serial function various errors. Three flags (bits valid only UART mode. receive buffer full flag (bit cleared when receive buffer read. there error, detected same time that data transferred from receive shift register receive buffer register, receive buffer full flag set. write serial status register clears error flags (bit respectively). Writing serial enable SIOE (bit Serial Control Register) also clears status flags, including error flags. bits serial status register initialized reset, transmit enable (bit serial control register been "1", transmit shift completion flag (bit transmit buffer empty flag (bit become "1".
Transmit Buffer/Receive Buffer Register (TB/ 001816
transmit buffer register receive buffer located same address. transmit buffer register write-only receive buffer register read-only. character length bits, data stored receive buffer register "0".
Baud Rate Generator (BRG) 001C16
baud rate generator determines baud rate serial transfer. baud rate generator divides frequency count source 1/(n where value written baud rate generator.
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MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Serial status register (SIOSTS address 0019 Transmit buffer empty flag (TBE) Buffer full Buffer empty Receive buffer full flag (RBF) Buffer empty Buffer full Transmit shift register shift completion flag (TSC) Transmit shift progress Transmit shift completed Overrun error flag (OE) error Overrun error Parity error flag (PE) error Parity error Framing error flag (FE) error Framing error Summing error flag (SE) (OE) (PE) (FE) (OE) (PE) (FE) used (returns when read)
Serial control register (SIO1CON address 001A count source selection (CSS) f(XIN f(XIN Serial I/O1 synchronization clock selection (SCS) output divided when clock synchronized serial selected. output divided when UART selected. External clock input when clock synchronized serial selected. External clock input divided when UART selected. SRDY1 output enable (SRDY) operates ordinary operates RDY1 output Transmit interrupt source selection (TIC) Interrupt when transmit buffer emptied Interrupt when transmit shift operation completed Transmit enable (TE) Transmit disabled Transmit enabled Receive enable (RE) Receive disabled Receive enabled Serial mode selection (SIOM) Asynchronous serial (UART) Clock synchronous serial Serial enable (SIOE) Serial disabled (pins -P47 operate ordinary pins) Serial enabled (pins -P47 operate serial pins)
UART control register (UARTCON address 001B Character length selection (CHAS) bits bits Parity enable (PARE) Parity checking disabled Parity checking enabled Parity selection (PARS) Even parity parity Stop length selection (STPS) stop stop bits /TXD P-channel output disable (POFF) CMOS output output mode) N-channel open-drain output output mode) used (return when read)
Fig. Structure serial control registers
1-28
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CONVERTER
functional blocks converter described below.
Comparator Control Circuit
comparator control circuit compares analog input voltage with comparison voltage stores result conversion register. When conversion completed, control circuit sets conversion completion interrupt request "1". Note that comparator constructed linked capacitor, f(XIN) least during conversion.
Conversion Register (AD) 003516
conversion register read-only register that contains result conversion. When reading this register during conversion, previous conversion result read.
Control Register (ADCON) 003416
control register controls conversion process. Bits this register select specific analog input pins. signals completion conversion. value this remains during conversion, then changes when conversion completed. Writing this starts conversion. controls transistor which breaks through current resistor ladder. When which external trigger valid bit, "1", this enables conversion even falling edge input. ports which share with pins input when using external trigger.
control register (ADCON address 0034 Analog input selection bits /AN0 /AN1 /AN2 /AN3 /AN4 /AN5 /AN6 /AN7 conversion completion Conversion progress Conversion completed VREF input switch external trigger valid external trigger invalid external trigger valid Interrupt source selection Interrupt request conversion completed Interrupt request input falling used (returns when read)
Comparison Voltage Generator
comparison voltage generator divides voltage between AVSS VREF 256, outputs divided voltages.
Channel Selector
channel selector selects input ports 7/AN P60/AN0
Fig. Structure control register
Data
control register P57/ADT
control circuit P60/AN0 Channel selector P61/AN1 P62/AN2 P63/AN3 P64/AN4 P65/AN5 P66/AN6 P67/AN7 AVSS VREF conversion register Resistor ladder
ADT/A-D interrupt request
Comparator
Fig. converter block diagram
1-29
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DRIVE CONTROL CIRCUIT
3822 group built-in Liquid Crystal Display (LCD) drive control circuit consisting following. display Segment output enable register mode register Selector Timing controller Common driver Segment driver Bias control circuit maximum segment output pins common output pins used. pixels controlled display. When enable after data mode register,
segment output enable register display RAM, drive control circuit starts reading display data automatically, performs bias control duty ratio control, displays data panel. Table Maximum number display pixels each duty ratio Duty ratio Maximum number display pixel dots segment digits dots segment digits dots segment digits
Segment output enable register (SEG address 0038 Segment output enable Input ports -P37 Segment output 12-SEG15 Segment output enable ports Segment output 16,SEG17 Segment output enable ports 2-P07 Segment output 18-SEG23 Segment output enable ports 0,P11 Segment output 24,SEG25 Segment output enable port Segment output Segment output enable ports 3-P17 Segment output 27-SEG31 used (return when read) write this bit)
mode register address 0039 Duty ratio selection bits available (use 0,COM (use 0-COM (use 0-COM Bias control bias bias enable used (returns when read) write this bit) circuit divider division ratio selection bits CLOCK input division CLOCK input division CLOCK input division CLOCK input LCDCK count source selection (Note) f(XCIN )/32 f(XIN )/8192 Note LCDCK clock timing controller.
Fig. Structure segment output enable register mode register
1-30
Data
enable Address 004F16 display circuit divider division ratio selection bits Bias control divider Duty ratio selection bits LCDCK count source selection f(XIN )/8192 f(XCIN )/32
Fig. Block diagram controller/driver
Selector Selector Timing controller LCDCK Segment Segment driver driver Bias control
Common driver Common driver Common driver Common driver
Address 0040
Address 004116
Selector Selector Selector Selector
Segment Segment Segment Segment driver driver driver driver
MITSUBISHI MICROCOMPUTERS
3822 Group
SEG0
SEG1
SEG2
SEG3
/SEG12
/SEG30 P17/SEG31
COM0 COM1 COM2 COM3
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1-31
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Bias Control Applied Voltage Power Input Pins
power input pins (VL1 -VL3 apply voltage shown Table according bias value. Select bias value bias control (bit mode register).
Table Bias control applied voltage VL1-VL3 Bias value bias =VLCD =2/3 VLCD =1/3 VLCD =VLCD =VL1=1/2 VLCD Voltage value
bias
Common Duty Ratio Control
common pins (COM 0-COM used determined duty ratio. Select duty ratio duty ratio selection bits (bits mode register).
Note VLCD maximum value supplied voltage panel. Table Duty ratio control common pins used Duty ratio Duty ratio selection Common pins used COM0, COM1 (Note COM0-COM2 (Note COM0-COM3
Notes COM2 COM3 open COM3 open
Contrast control
Contrast control
bias
bias
Fig. Example circuit each bias
1-32
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Display
Address 004016 004F16 designated display. When written these addresses, corresponding segments display panel turned
Drive Timing
LCDCK timing frequency (LCD drive timing) generated internally frame frequency determined with following equation; f(LCDCK)= (frequency count source LCDCK) (divider division ratio LCD) f(LCDCK) duty ratio
Frame frequency=
Address 004016 004116 004216 004316 004416 004516 004616 004716 004816 004916 004A16 004B16 004C16 004D16 004E16 004F16 COM3 COM2 COM1 COM0 COM3 COM2 COM1 COM0 SEG1 SEG0 SEG3 SEG2 SEG5 SEG7 SEG9 SEG11 SEG13 SEG15 SEG17 SEG19 SEG21 SEG23 SEG25 SEG27 SEG29 SEG31 SEG4 SEG6 SEG8 SEG10 SEG12 SEG14 SEG16 SEG18 SEG20 SEG22 SEG24 SEG26 SEG28 SEG30
Fig. display
1-33
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Internal logic LCDCK timing
duty
Voltage level VL2=VL1
COM0 COM1 COM2 COM3 SEG0
COM3 COM2 COM1
COM0 COM3
COM2 COM1
COM0
duty COM0 COM1 COM2 VL2=VL1
SEG0
COM0 duty COM0 COM1 SEG0
COM2 COM1
COM0
COM2 COM1
COM0
COM2
VL2=VL1
COM1 COM0 COM1 COM0 COM1 COM0 COM1 COM0
Fig. drive waveform (1/2 bias)
1-34
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Internal logic LCDCK timing
duty
Voltage level
COM0
COM1 COM2 COM3 SEG0
COM3 COM2 COM1
COM0 COM3
COM2 COM1
COM0
duty COM0 COM1 COM2
SEG0
COM0 duty COM0 COM1 SEG0
COM2 COM1
COM0
COM2 COM1
COM0
COM2
COM1 COM0 COM1 COM0 COM1 COM0 COM1 COM0
Fig. drive waveform (1/3 bias)
1-35
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CLOCK OUTPUT FUNCTION
internal system clock output from port setting output control register. port direction register when outputting clock.
output control register (CKOUT address 002A
output control Port function clock output used (return when read)
Fig. Structure output control register
1-36
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
RESET CIRCUIT
reset microcomputer, RESET should held level more. Then RESET returned level (the power source voltage should between oscillation should stable), reset released. order give clock time stabilize, internal operation does begin until after 8200 clock cycles (timer timer connected together cycles f(XIN)/16) complete. After reset completed, program starts from address contained address FFFD (high-order byte) address FFFC16 (low-order byte). Make sure that reset input voltage less than (Extended operating temperature version: reset input voltage less than 0.6V 3.0V).
Address Port direction register (000116) Port direction register (0003 Port direction register (000516) Port direction register (000916) Port direction register (000B16) Port direction register (000D Port direction register (000F16 PULL register PULL register Register contents 0016 0016 0016 0016 0016 0016 0016
(001616) (001716) 0016
(10) Serial status register (001916) (11) Serial control register (001A16) (12) UART control register (13) Timer (low) (14) Timer (high) 0016
(001B16) (002016 (002116 (002216 (002316 (002416 (002516 (002616 (002716 (002816 FF16 FF16 FF16 FF16 FF16 0116 FF16 0016 0016 0016 0016
Power Power source voltage Reset input voltage (Note)
(15) Timer (low) (16) Timer (high) (17) Timer
RESET
0.2VCC
(18) Timer (19) Timer (20) Timer mode register (21) Timer mode register
Note. Reset release voltage 2.5V (Extended operating temperature version 3.0V)
RESET
Power source voltage detection circuit
(22) Timer mode register (002916 (23) output control register (002A16) (24) control register (25) Segment output enable register (26) mode register (27) Interrupt edge selection register (28) mode register (29) Interrupt request register
(003416 (003816 (003916 (003A16) 0016 0016 0016
(003B16) (003C16) (003D16) (003E16) (003F16) 0016 0016 0016 0016
Fig. Example reset circuit
(30) Interrupt request register (31) Interrupt control register (32) Interrupt control register (33) Processor status register (34) Program counter
(PS) (PCH) (PCL
Contents address FFFD Contents address FFFC
Note Undefined contents other registers undefined after reset, they must initialized software.
Fig. Internal state microcomputer after reset
1-37
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
RESET
Internal reset
Reset address from vector table
Address Data
FFFC
FFFD
ADH,
SYNC Notes f(XIN relationship f(XIN Notes question mark indicates undefined status that depends previous status.
about 8200 clock cycles
Fig. Reset sequence
1-38
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CLOCK GENERATING CIRCUIT
3822 group built-in oscillation circuits. oscillation circuit formed connecting resonator between XOUT (XCIN COUT). circuit constants accordance with resonator manufacturer's recommended values. external resistor needed between since feed-back resistor exists on-chip. However, external feed-back resistor needed between XCIN COUT. supply clock signal externally, input make open. sub-clock XCIN-X COUT oscillation circuit cannot directly input clocks that externally generated. Accordingly, sure cause external resonator oscillate. Immediately after poweron, only oscillation circuit starts oscillating, COUT pins function ports. pull-up resistor XCOUT pins must made invalid sub-clock.
Oscillation Control
Stop mode instruction executed, internal clock stops level, XCIN oscillators stop. Timer "FF16 timer "0116". Either XCIN divided input timer count source, output timer connected timer bits timer mode register except cleared "0". timer timer interrupt enable bits disabled ("0") before executing instruction. Oscillator restarts reset when external interrupt received, internal clock supplied until timer underflows. This allows time clock circuit oscillation stabilize. Wait mode instruction executed, internal clock stops level. states XCIN same state before executing instruction. internal clock restarts reset when interrupt received. Since oscillator does stop, normal operation started immediately after clock restarted.
Frequency Control
Middle-speed mode internal clock frequency divided After reset, this mode selected. High-speed mode internal clock half frequency Low-speed mode internal clock half frequency XCIN. low-power consumption operation realized stopping main clock this mode. stop main clock, mode register "1". When main clock restarted, enough time oscillation stabilize programming. Note: switch mode between middle/high-speed lowspeed, stabilize both oscillations. sufficient time required sub-clock stabilize, especially immediately after poweron returning from stop mode. When switching mode between middle/highspeed low-speed, frequency condition that f(XIN)>3f(XCIN
XCIN CCIN
XCOUT CCOUT
XOUT
COUT
Fig. Ceramic resonator circuit
XCIN CCIN
XCOUT CCOUT
XOUT Open
External oscillation circuit
Fig. External clock input circuit
1-39
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
XCIN
XCOUT
Port switch
XOUT
Internal system clock selection (Note)
Timer count source selection Timer
Timer count source selection Timer
Low-speed mode Middle-/High-speed mode
Main clock division ratio selection Middle-speed mode Timing (Internal system clock)
High-speed mode Low-speed mode Main clock stop
instruction
instruction
instruction
Reset Interrupt disable flag Interrupt request
Note When using low-speed mode, port switch
Fig. Clock generating circuit block diagram
1-40
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Reset
Middle-speed mode (f() MHz) 7=0(8 selected) =1(Middle-speed) =0(8 oscillating) CM4=0(32 stopped)
High-speed mode (f() MHz)
CM7=0(8 selected) CM6=0(High-speed) CM5=0(8 oscillating) CM4=0(32 stopped)
Middle-speed mode (f() MHz) CM7=0(8 selected) CM6=1(Middle-speed) CM5=0(8 oscillating) CM4=1(32 oscillating)
High-speed mode (f() MHz)
=0(8 selected) =0(High-speed) =0(8 oscillating) =1(32 oscillating)
Low-speed mode (f() kHz) CM7=1(32 selected) CM6=1(Middle-speed) CM5=0(8 oscillating) CM4=1(32 oscillating)
Low-speed mode (f() kHz)
CM7=1(32 selected) CM6=0(High-speed) CM5=0(8 oscillating) CM4=1(32 oscillating)
mode register (CPUM address 003B
Low-speed mode (f() kHz) CM7=1(32 selected) CM6=1(Middle-speed) CM5=1(8 stopped) CM4=1(32 oscillating)
Low-speed mode (f() kHz)
=1(32 selected) =0(High-speed) =1(8 stopped) =1(32 oscillating)
Notes Switch mode allows shown between mode blocks. switch between mode directly without allow.) modes switched stop mode wait mode returned source mode when stop mode wait mode ended. Timer operate wait mode. When stop mode ended, delay approximately occurs automatically timer timer middle-/high-speed mode. When stop mode ended, delay approximately 0.25 occurs automatically timer timer low-speed mode. Wait until oscillation stabilizes after oscillating main clock before switching from low-speed mode middle-/highspeed mode. example assumes that being applied pin. indicates internal clock.
Fig. State transitions internal clock
Port switch port XCIN XCOUT Main clock (XIN -XOUT stop Oscillating Stopped Main clock division ratio selection f(XIN (high-speed mode) f(XIN (middle-speed mode) Internal system clock selection -XOUT selected (middle-/high-speed mode) XCIN -XCOUT selected (low-speed mode)
1-41
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
NOTES PROGRAMMING Processor Status Register
contents processor status register (PS) after reset undefined, except interrupt disable flag which "1". After reset, initialize flags which affect program execution. particular, essential initialize index mode decimal mode flags because their effect calculations.
Serial
clock synchronous serial I/O, receive side using external clock output SRDY signal, transmit enable bit, receive enable bit, SRDY output enable "1". Serial continues output final from after transmission completed.
Interrupt
contents interrupt request bits change immediately after they have been written. After writing interrupt request register, execute least instruction before performing instruction.
Converter
comparator uses internal capacitors whose charge will lost clock frequency low. Make sure that f(XIN) least during conversion. execute instruction during conversion.
Decimal Calculations
calculate decimal notation, decimal mode flag "1", then execute instruction. Only instructions yield proper decimal results. After executing instruction, execute least instruction before executing SEC, CLC, instruction. decimal mode, values negative (N), overflow (V), zero flags invalid. carry flag used indicate whether carry borrow occurred. Initialize carry flag before each calculation. Clear carry flag before flag before SBC.
Instruction Execution Time
instruction execution time obtained multiplying frequency internal clock number cycles needed execute instruction. number cycles required execute instruction shown list machine instructions. frequency internal clock half frequency.
Timers
value (between 255) written timer latch, frequency division ratio 1/(n
Multiplication Division Instructions
index mode decimal mode flags affect instruction. execution these instructions does change contents processor status register.
Ports
contents port direction registers cannot read. following cannot used: data transfer instruction (LDA, etc.) operation instruction when index mode flag addressing mode which uses value direction register index bit-test instruction (BBC BBS, etc.) direction register read-modify-write instruction (ROR, CLB, SEB, etc.) direction register instructions such STA, etc., port direction registers.
1-42
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DATA REQUIRED MASK ORDERS
following necessary when ordering mask production: Mask Order Confirmation Form Mark Specification Form Data written ROM, EPROM form (three identical copies)
PROGRAMMING METHOD
built-in PROM blank Time PROM version builtin EPROM version read programmed with generalpurpose PROM programmer using special programming adapter. address PROM programmer user area.
Package 80P6N-A 80P6S-A 80P6D-A 80D0
Name Programming Adapter PCA4738F-80A PCA4738G-80 PCA4738H-80 PCA4738L-80A
PROM blank Time PROM version tested screened assembly process following processes. ensure proper operation after programming, procedure shown Figure recommended verify programming.
Programming with PROM programmer
Screening (Caution) (150°C hours)
Verification with PROM programmer
Functional check target device Caution screening temperature higher than storage temperature. Never expose exceeding hours.
Fig. Programming testing Time PROM version
1-43
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
ABSOLUTE MAXIMUM RATINGS
Symbol Topr Tstg Parameter Power source voltage Input voltage -P07, P10-P17, 0-P27, -P37, P40-P47, 0-P57, -P67, P70, Input voltage Input voltage Input voltage Input voltage RESET, Output voltage P00-P07 P10-P17 Output voltage P34-P37 Output voltage P20-P27 P41-P47, -P57, P60-P67, Output voltage 0-SEG11 Output voltage XOUT Power dissipation Operating temperature Storage temperature Conditions Ratings -0.3 -0.3 +0.3 voltages based Output transistors off. -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 (Note (Note Unit
output port segment output segment output
Notes Extended operating temperature version 85°C Extended operating temperature version 150°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter
(VCC 85°C, unless otherwise noted. Limits Typ. AVSS
Extended operating temperature version -20°C 5.5V, 85°C) Min. Max. Unit
Power source voltage
High-speed mode f(XIN)=8 Middle-speed mode 85°C f(XIN)=8 -20°C Low-speed mode 85°C -20°C
VREF AVSS
Power source voltage conversion reference input voltage Analog power source voltage Analog input voltage 0-AM input voltage P00-P07, P10-P17 P34-P37, P41, P47, P52, P53, P60-P67, (CM4 input voltage P20-P27, P42-P44 P46, P51, P54, input voltage RESET input voltage input voltage P00-P07, P10-P17 P34-P37, P41, P47, P52, P53, P60-P67, (CM4 input voltage P20-P27, P42-P44 P46, P51, P54, input voltage input voltage RESET
1-44
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
RECOMMENDED OPERATING CONDITIONS (VCC 85°C, unless otherwise noted. Extended operating temperature version -20°C 85°C)
Symbol OH(peak) OH(peak) OL(peak) OL(peak) OH(avg) OH(avg) OL(avg) OL(avg) OH(peak) OH(peak) OL(peak) OL(peak) OH(avg) OH(avg) OL(avg) OL(avg) total peak output current total peak output current total peak output current total peak output current total average output current total average output current total average output current total average output current peak output current peak output current peak output current peak output current average output current average output current average output current average output current Input frequency timers (duty cycle Parameter P00-P07 -P17, 0-P2 (Note P41-P47,P5 0-P57, P60-P67 P70, (Note P00-P07 -P17, 0-P2 (Note P41-P47,P5 0-P57, P60-P67 P70, (Note P00-P07 -P17, 0-P2 (Note P41-P47,P5 0-P57, P60-P67 P70, (Note P00-P07 -P17, 0-P2 (Note P41-P47,P5 0-P57, P60-P67 P70, (Note P00-P07, P10-P17 (Note P20-P27, P41-P47 P50-P57, -P67, P70, (Note P00-P07 -P17 (Note P20-P27, P41-P47 P50-P57, -P67, P70, (Note P00-P07, P10-P17 (Note P20-P27, P41-P47 P50-P57, -P67, P70, (Note P00-P07, P10-P17 (Note P20-P27, P40-P47 P50-P57, -P67, P70, (Note Limits Min. Typ. Max. -1.0 -2.5 Unit
f(CNTR f(CNTR
(2XVCC)-4 (4XVCC)-8 32.768
f(XIN) f(XCIN
High-speed mode (4.0 Main clock input oscillation High-speed mode (2.5 frequency (Note Middle-speed mode Sub-clock input oscillation frequency (Note
Notes total output current currents flowing through applicable ports. total average current average value measured over total peak current peak value currents. peak output current peak current flowing each port. average output current average value measured over When oscillation frequency duty cycle 50%. When using microcomputer low-speed mode, make sure that sub-clock input oscillation frequency condition that f(XCIN f(XIN)/3.
1-45
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS (VCC 85°C, unless otherwise noted. Extended operating temperature version -20°C 85°C)
Symbol Parameter Test conditions -2.5 -0.6 -1.25 -1.25 1.25 1.25 Min. VCC-2.0 VCC-1.0 VCC-2.0 VCC-0.5 VCC-1.0 -5.0 Pull-ups "off" VCC= Pull-ups "on" VCC= Pull-ups "on" -5.0 -140 Limits Typ. Max. Unit
output voltage P00-P0 P10-P1
output voltage P20-P2 P41-P4 7,P50-P5 P60-P6 P70, (Note
output voltage P00-P0 P10-P1
output voltage P20-P2 P41-P4 P50-P57, P60-P6 P70, (Note Hysteresis Hysteresis Hysteresis CNTR0, CNTR1 INT0-INT 0-P27 RXD, SCLK RESET
input current
P00-P0 P10-P1 P30-P3
RESET: VCC=2.5 Pull-downs "off" VCC= 85°C -20°C Pull-downs "on" VCC= Pull-downs "on" 85°C -20°C
input current input current input current input current
P20-P2 P40-P4 P50-P57, P60-P6 P70, RESET P00-P0 P10-P1 P34-P37,
input current
P20-P2 P41-P4 P50-P57, P60-P6 P70-P7
-5.0 input current RESET -4.0 input current Note When port switch (bit address 003B16) mode register, drive ability port different from value above mentioned.
1-46
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
ELECTRICAL CHARACTERISTICS
Symbol VRAM hold voltage Parameter
(VCC 85°C, unless otherwise noted. Extended operating temperature version -20°C 85°C) Test conditions When clock stopped High-speed mode, f(XIN) f(XCIN 32.768 Output transistors "off" converter operating High-speed mode, f(XIN) state) f(XCIN 32.768 Output transistors "off" converter stopped Low-speed mode, 55°C f(XIN) stopped f(XCIN 32.768 Output transistors "off" Low-speed mode, 25°C f(XIN) stopped f(XCIN 32.768 state) Output transistors "off" Low-speed mode, 55°C f(XIN) stopped f(XCIN 32.768 Output transistors "off" Low-speed mode, 25°C f(XIN) stopped f(XCIN 32.768 state) Output transistors "off" oscillation stopped state) Output transistors "off" Min. Limits Typ. Max. Unit
Power source current
14.0
1-47
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
CONVERTER CHARACTERISTICS
(VCC 85°C, MHz, middle-/high-speed mode, unless otherwise noted. Extended operating temperature version -20°C 85°C) Symbol CONV Parameter Resolution Absolute accuracy (excluding quantization error) Conversion time Test conditions Min. Limits Typ. Max. 12.5 (Note) Unit Bits
VREF f(XIN)
RLADDER Ladder resistor VREF Reference input current VREF Analog port input current Note When internal trigger used middle-speed mode,
1-48
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
TIMING REQUIREMENTS 1(VCC 85°C, unless otherwise noted.
Extended operating temperature version -20°C 85°C) Symbol w(RESET) wH(XIN) wL(XIN) c(CNTR) wH(CNTR) wL(CNTR) wH(INT) wL(INT) CLK) wH(SCLK) wL(S CLK) tsu(R D-SCLK th(S CLK-RX Parameter Reset input pulse width Main clock input cycle time (XIN input) Main clock input pulse width Main clock input pulse width CNTR0, CNTR1 input cycle time CNTR0, CNTR1 input pulse width CNTR0 CNTR1 input pulse width INT0 INT3 input pulse width INT0 INT3 input pulse width Serial clock input cycle time (Note) Serial clock input pulse width (Note) Serial clock input pulse width (Note) Serial input time Serial input hold time Min. Limits Typ. Max. Unit
Note When address 001A16 (clock synchronous). Divide this value four when f(XIN) address 001A16 (UART).
TIMING REQUIREMENTS 2(VCC 85°C, unless otherwise noted.
Extended operating temperature version -20°C 85°C) Symbol w(RESET) wH(XIN) wL(XIN) c(CNTR) wH(CNTR) wL(CNTR) wH(INT) wL(INT) CLK) wH(SCLK) wL(S CLK) tsu(R D-SCLK th(S CLK-RX Parameter Reset input pulse width Main clock input cycle time (XIN input) Main clock input pulse width Main clock input pulse width CNTR0, CNTR1 input cycle time CNTR0, CNTR1 input pulse width CNTR0, CNTR1 input pulse width INT0 INT3 input pulse width INT0 INT3 input pulse width Serial clock input cycle time (Note) Serial clock input pulse width (Note) Serial clock input pulse width (Note) Serial input time Serial input hold time Min. 2000 Limits Typ. Max. Unit
Note When address 001A16 (clock synchronous). Divide this value four when f(XIN) address 001A16 (UART).
1-49
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SWITCHING CHARACTERISTICS 1(VCC 85°C, unless otherwise noted.
Extended operating temperature version -20°C 85°C) Symbol wH(SCLK) wL(S CLK) td(S CLK-TX tv(SCLK -TXD) r(SCLK f(SCLK) r(CMOS) f(CMOS) Parameter Serial clock output pulse width Serial clock output pulse width Serial output delay time (Note Serial output valid time (Note Serial clock output rising time Serial clock output falling time CMOS output rising time (Note CMOS output falling time (Note Min. tc(SCLK)/2-30 tc(SCLK)/2-30 Limits Typ. Max. Unit
Notes When P45/T P-channel output disable UART control register (bit address 001B16 "0". XOUT XCOUT pins excluded.
SWITCHING CHARACTERISTICS (VCC 85°C, unless otherwise noted.
Extended operating temperature version -20°C 85°C) Symbol wH(SCLK) wL(S CLK) td(S CLK-TX tv(SCLK -TXD) r(SCLK f(SCLK) r(CMOS) f(CMOS) Parameter Serial clock output pulse width Serial clock output pulse width Serial output delay time (Note Serial output valid time (Note Serial clock output rising time Serial clock output falling time CMOS output rising time (Note CMOS output falling time (Note Min. tc(SCLK )/2-50 tc(SCLK )/2-50 Limits Typ. Max. Unit
Notes When P45/T P-channel output disable UART control register (bit address 001B16 "0". XOUT XCOUT pins excluded.
Measurement output Measurement output
CMOS output
N-channel open-drain output (Note) Note When UART control register (address 001B "1". (N-channel open-drain output mode)
Fig. Circuit measuring output switching characteristics
1-50
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
TIMING DIAGRAM
tc(CNTR) twH(CNTR) CNTR 0,CNTR1
0.8VCC 0.2VCC
twL(CNTR)
twH(INT) INT0-INT3
0.8VCC 0.2VCC
twL(INT)
tw(RESET) RESET
0.2VCC 0.8VCC
tc(XIN) twH(XIN)
0.8VCC 0.2VCC
twL(XIN
tc(SCLK) SCLK
0.2VCC
twL(SCLK)
0.8VCC
twH(SCLK
tsu(RXD-SCLK td(SCLK -TXD)
0.8VCC 0.2VCC
th(SCLK -RXD)
tv(SCLK-TXD)
Fig. Timing diagram
1-51
CHAPTER APPLICATION
pins Interrupts Timer timer Timer timer timer Serial converter drive control circuit Standby function Reset 2.10 Oscillating circuit
APPLICATION
pins
pins
2.1.1 ports port write read sThe input-only ports programmable ports input mode input-only ports programmable ports input mode floating. value (pin state) input port read reading port register corresponding each port. writing data into port register corresponding each port, data only written port register remains floating state. sOutput-only ports programmable ports output mode value written port register corresponding output port programmable port output mode output externally through transistor. reading data port transistor corresponding each port, state read value written port register read. Accordingly, even output voltage reduced output voltage increased external load, previous output value correctly read.
output output value writing port register. port register possible.
input port register possible. state read reading port register.
level output Port direction register ("1") Port direction registerV ("0")
Port register
Port register writing)
level output
Port register reading)
Read state N-channel transistors off.
Fig. 2.1.1 port write read
3822 GROUP USER'S MANUAL
APPLICATION
pins
Table 2.1.1 shows memory allocation port registers corresponding each port. Table 2.1.1 Memory allocation port registers Port Port register address 0000 0002 0004 0006 0008 000A 000C16 000E
Input/output switching programmable ports Input/output switching programmable ports performed port direction register corresponding each port (Note). Figure 2.1.2 shows structure port direction register, Table 2.1.2 shows memory allocation port direction registers corresponding each port. Figure 2.1.4 shows port direction register setting example. Note: ports input/output switching performed port unit. setting corresponding direction register "0," port input mode. setting "1," port output mode. Figure 2.1.3 shows structure ports direction registers.
Port direction register
Port direction register (PiD) [Address 0916, Name Port direction register Functions Port input mode Port output mode Port input mode Port output mode Port input mode Port output mode Port input mode Port output mode Port input mode Port output mode Port input mode Port output mode Port input mode Port output mode Port input mode Port output mode reset
Notes Nothing allocated port direction register port direction register. These bits cannot written contents port direction register cannot read (refer "2.1.4 Notes use"
Fig. 2.1.2 Structure port direction register
3822 GROUP USER'S MANUAL
APPLICATION
pins
Port direction register, port direction register
Port direction register (P0D) [Address Port direction register (P1D) [Address Name Port direction register Port direction register Functions bits input mode bits output mode reset
Nothing allocated. These bits cannot written read out.
Note: ports input/output switching performed port unit. setting corresponding port direction register "0", port input mode. setting "1", port output mode. Nothing allocated bits port direction register, these bits cannot written
Fig. 2.1.3 Structure ports direction registers
Table 2.1.2 Memory allocation port direction registers Port Port direction register address 0001 0003 0005 0009 000B 000D 000F16
3822 GROUP USER'S MANUAL
APPLICATION
pins
Example When setting "6B16"
port direction register
Input/output direction port
Input Output Output Input Output Input Output Output
Fig. 2.1.4 Port direction register setting example
Pull-up control pull-down control ports shown Table 2.1.3 controlled pull-up pull-down software. Either pull-up pull-down controlled PULL register (address 001616 PULL register (address 001716 Figure 2.1.5 shows structure PULL register Figure 2.1.6 shows structure PULL register Table 2.1.3 ports which either pull-up pull-down controlled software Control Pull-down Pull-up Ports
3822 GROUP USER'S MANUAL
APPLICATION
pins
PULL register
PULL register (PULLA) [Address Name Functions pull-down Pull-down pull-down Pull-down pull-up Pull-up pull-down Pull-down pull-up Pull-up reset
Port 0-P0 pull-down Port 0-P1 pull-down Port 0-P2 pull-up Port 0-P3 pull-down
Port pull-up
Nothing allocated. These bits cannot written fixed reading.
Note: ports output mode, pull-up pull-down impossible.
Fig. 2.1.5 Structure PULL register
PULL register
PULL register (PULLB) [Address Name Port 1-P43 pull-up Port 4-P47 pull-up Port 0-P53 pull-up Port 4-P57 pull-up Port 0-P63 pull-up Port 4-P67 pull-up Functions pull-up Pull-up pull-up Pull-up pull-up Pull-up pull-up Pull-up pull-up Pull-up pull-up Pull-up reset
Nothing allocated. These bits cannot written fixed reading.
Note: ports output mode, pull-up impossible.
Fig. 2.1.6 Structure PULL register
3822 GROUP USER'S MANUAL
APPLICATION
pins
2.1.2 Function pins Each function except ports described below. Power source input pins. high-speed mode, apply pin. middle-speed mode low-speed mode, apply pin. modes, apply pin. reference voltage input converter. Apply pin. input converter. Apply same voltage that applied AVSS pin. pin, Power source input pins LCD. Apply
voltage these pins.
Pins input output main clock generating circuit. RESET 3822 group reset internally keeping level this more. Reset state released returning level this "H". Pins SEG0 SEG11 Segment signal output pins LCD. Pins Common signal output pins LCD.
3822 GROUP USER'S MANUAL
APPLICATION
pins
2.1.3 Application examples basic structure input without pull-up resistor application examples described below. contrast method which uses pull-up resistor, dissipating current incessantly, this method requires only charging current very small capacitance, especially suitable battery-driven unit. following description, ports only tentative names differ from real port names. Basic structure input Figure 2.1.7 shows connection example input without pull-up resistor Figure 2.1.8 shows input control procedure Figure 2.1.9 shows timing diagram where switch pressed.
CMOS port CMOS port CMOS port Virtual capacitor
Fig. 2.1.7 Connection example input
input
case input, output (Noise countermeasure).
Output charging each port
virtual capacitor charged outputting "H." (For capacitance, refer next page.) port direction register input mode with instruction immediately after output. (For limit timer ON/OFF judgment discharging time refer next page.) double reading ensure data, repeat
After inputting data into port direction register, judge ON/OFF input.
Fig. 2.1.8 input control procedure
3822 GROUP USER'S MANUAL
APPLICATION
pins
Charge time
Charge time
output
CMOS port
output
output Input Port input
Input Read port state
CMOS port
output
output
Input
output
Input
CMOS port
output
output
Input
output
Input
Fig. 2.1.9 Timing diagram where switch pressed discharging time after completion charge Figure 2.1.9 shown with following expression. discharging time obtained with qThe capacitance virtual capacitor Capacitance microcomputer output transistors input transistors Approx. Capacitance package Several Capacitance each wiring Several (minimum) Approx. leak current standard maximum value standard value 0.05 Accordingly, minimum resistance standard resistance above condition, discharging time obtained follows: (minimum) (standard) Accordingly, discharging time (minimum) (standard).
3822 GROUP USER'S MANUAL
APPLICATION
pins
TThe discharging time (t2) obtained with same previous page, with result TJudge ON/OFF input within time which obtained follows: After completion output, -t1/T output voltage Input voltage after 1(s)
<Example> standard time input application example According input without pull-up resistor described (1), effective application example where there enough ports shown below. This method reduces both current dissipation quantity parts compared with example shown (1). Figure 2.1.10 shows connection example input using port Figure 2.1.11 shows input control procedure Figure 2.1.12 shows timing diagram where switch pressed.
CMOS port CMOS port CMOS port CMOS port
Virtual capacitor
Fig. 2.1.10 Connection example input
input
case input, output (Noise countermeasure).
Output charging each port
virtual capacitor charged outputting "H." (For capacitance, refer previous page.) port direction register input mode with instruction immediately after output. (For limit timer ON/OFF judgment discharging time refer next page.) Output with next instruction (refer "Figure 2.1.12 (A)") double reading ensure data, repeat
port direction register input mode
After inputting data into port direction register, judge ON/OFF input.
Fig. 2.1.11 input control procedure 2-10
3822 GROUP USER'S MANUAL
APPLICATION
pins
Charge time
Charge time
output
CMOS port
output
output Input Port input
Input Input port state output Input
CMOS port
output
output
Input
CMOS port
output
output
Input
output
Input
CMOS port
output
output
output
output
output
Fig. 2.1.12 Timing diagram where switch pressed With exception that output using port input (refer "Figure 2.1.12 (A)"), basic structure same that shown (1). examples shown already into practical use. However, sure evaluate them user's side. this example, ports same structure equivalent circuit which pull-up resistor about connected.
3822 GROUP USER'S MANUAL
2-11
APPLICATION
pins
2.1.4 Notes When using ports, note following. Reading port direction register value port direction register readable. following cannot used: data transfer instruction (LDA, etc.) operation instruction when index mode flag addressing mode which uses value direction register index bit-test instruction (BBC BBS, etc.) direction register read-modify-write instruction (ROR, CLB, SEB, etc.) direction register instructions such STA, etc., port direction registers. When data register (port latch) port modified with managing instruction When data register (port latch) port modified with managing instruction value unspecified changed. REASON managing instructions read-modify-write form instructions reading writing data byte unit. Accordingly, when these instructions executed data register port, following executed bits data register. which input port: state read CPU, written this after managing. which output port: value read CPU, written this after managing. Note following: qEven when port which output port changed input port, data register holds output data. which input port, value changed even when specified with managing instruction case where state differs from data register contents managing instructions instruction Pull-up control pull-down control pull-up pull-down ports software, note following. qWhen ports used segment output pins LCD, settings pull-down bits corresponding these ports PULL register invalid (pull-down impossible). qWhen ports P0-P2, -P47 P5-P7 output mode, settings bits corresponding these ports PULL register PULL register invalid (pull-up pulldown impossible).
2-12
3822 GROUP USER'S MANUAL
APPLICATION
pins
Notes standby state standby state low-power dissipation, make input levels input port port "undefined", especially ports P-channel N-channel open-drain. Pull-up (connect port VCC) pull-down (connect port VSS) these ports through resistor. When determining resistance value, note following points: qExternal circuit qVariation output levels during ordinary operation When using built-in pull-up pull-down resistor option, note varied current values. qWhen setting input port input level qWhen setting output port Prevent current from flowing external REASON Even when setting output port with direction register, following state: qP-channel.when content data register (port latch) qN-channel.when content data register (port latch) transistor becomes state, which causes ports high-impedance state. Note that level becomes "undefined" depending external circuits. Accordingly, potential which input input buffer microcomputer unstable state that input levels input port port "undefined". This cause power source current. standby state stop mode executing instruction wait mode executing instruction
3822 GROUP USER'S MANUAL
2-13
APPLICATION
pins
Termination unused pins Table 2.1.4 shows termination unused pins. Table 2.1.4 Termination unused pins Pins Terminations
-P27 /RxD /TxD /SCLK /SRDY After input mode built-in pull-up resistor state, /RTP open. /RTP output mode open "H".V2 /CNTR /CNTR /ADT /AN0-P67 /AN7 /XCOUT /XCIN /SEG16-P0 7/SEG23 After input mode built-in pull-down resistor /SEG24-P1 7/SEG31 state, open.V1 output mode open "H".V2 Connect each through each resistor /INT0 After disabling interrupts, input mode, pull-up builtP43 /INT1 resistor state, open.V1 /INT2 output mode open "H".V2 /INT3 VL1-VL3 Connect level COM0-COM3 SEG0-SEG11 Open /SEG12-P3 7/SEG15
After reset before built-in pull-up (pull-down) resistor state software, built-in pull-up (pull-down) resistor state. Because this, potential these pins "undefined" power source current increase. Since direction register setup changed output mode because program runaway noise, direction register input mode periodically. make length wiring which connected ports within After reset before ports switched output mode software, ports input mode. Because this, potential these pins "undefined" power source current increase input mode. Since direction register setup changed input mode because program runaway noise, direction register output mode periodically. make length wiring which connected ports within
2-14
3822 GROUP USER'S MANUAL
APPLICATION
Interrupts
Interrupts
2.2.1 Explanation operations When interrupt request accepted, contents immediately before acceptance interrupt requests following registers automatically pushed onto stack area order High-order (PCH) contents program counter Low-order (PCL contents program counter Contents processor status register (PS) After contents above registers pushed onto stack area, accepted interrupt vector address enters program counter consequently interrupt processing routine executed. When instruction executed interrupt processing routine, contents above registers pushed onto stack area restored respective registers order processing executed immediately before acceptance interrupts co

MITSUBISHI 8-BIT SINGLE-CHIP MICROCOMPUTER FAMILY 38000 SERIES 38

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