MC9RS08LA8 Case 1314 LQFP Case MC9RS08LA8 Features

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MC9RS08LA8 Case 1314 LQFP Case MC9RS08LA8 Features

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Document Number: MC9RS08LA8 Rev. 10/2008
MC9RS08LA8
Case 1314
LQFP Case
MC9RS08LA8
Features: 8-Bit RS08 Central Processor Unit (CPU) across temperature range -40°C 85°C Subset HC08 instruction with added BGND instruction On-Chip Memory flash read/program/erase over full operating voltage temperature 256-byte random-access memory (RAM) Security circuitry prevent unauthorized access flash contents Power-Saving Modes Wait stop Clock Source Options Oscillator (XOSC) Loop-control Pierce oscillator; crystal ceramic resonator range 31.25 39.0625 Internal clock source (ICS) Internal clock source module containing frequency-locked-loop (FLL) controlled internal external reference; supports frequencies System Protection Watchdog computer operating properly (COP) reset with option from dedicated internal clock source clock Low-voltage detection with reset interrupt; selectable trip points Illegal opcode detection with reset Illegal address detection with reset Flash block protection Development Support Single-wire background debug interface Breakpoint capability allow single breakpoint setting during in-circuit debugging Peripherals segments; compatible with glass displays using on-chip charge pump; functional wait, stop modes very power operation; frontplane backplane pins multiplexed with GPIO functions; selectable frontplane backplane configurations 6-channel, 10-bit resolution; conversion time; automatic compare function; mV/°C temperature sensor; internal bandgap reference channel; operation stop; fully functional from 2-channel 16-bit timer/pulse-width modulator (TPM) module 2-channel serial communications interface module with optional 13-bit break; extensions serial peripheral interface module 8-bit data length mode with receive data buffer hardware match function ACMP Analog comparator with option compare internal reference MTIM 8-bit modulo timer 8-pin keyboard interrupt module real-time interrupt module with optional reference clock. Input/Output GPIOs including output only input only pin. Hysteresis configurable pullup device input pins; configurable slew rate drive strength output pins. Package Options 48-pin 48-pin LQFP
This document contains information product under development. Freescale reserves right change discontinue this product without notice. Freescale Semiconductor, Inc., 2008. rights reserved.
Table Contents
Block Diagram Assignments Electrical Characteristics Parameter Classification Absolute Maximum Ratings Thermal Characteristics Protection Latch-Up Immunity Characteristics Supply Current Characteristics External (XOSC) Internal (ICS) Oscillator Characteristics Characteristics 3.8.1 Control Timing 3.8.2 TPM/MTIM Module Timing Analog Comparator (ACMP) Electrical 3.10 Internal Clock Source Characteristics 3.11 Characteristics 3.12 Characteristics 3.12.1 Control Timing 3.13 Flash Specifications. Ordering Information Mechanical Drawings
Revision History
provide most up-to-date information, revision documents World Wide will most current. Your printed copy earlier revision. verify have latest information available, refer http://freescale.com/ following revision history table summarizes changes contained this document.
Revision Date 10/9/2008 Initial public released. Description Changes
Related Documentation
Find most current versions documents http://www.freescale.com
Reference Manual
(MC9RS08LA8RM) Contains extensive product information including modes operation, memory, resets interrupts, register definition, port pins, CPU, module information.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Block Diagram
VREFH VREFL VDDAD VSSAD
Block Diagram
6-CH 10-BIT ANALOG-TO-DIGITAL CONVERTER(ADC) 4-BIT KEYBORAD RS08 CORE INTERRUPT(KBI) SERIAL PERIPHERAL INTERFACE (SPI) ANALOG COMPARATOR (ACMP) RS08 SYSTEM CONTROL RESETS INTERRUPTS MODES OPERATION POWER MANAGEMENT WAKEUP 2-CH TIMER/PWM MODULE (TPM) RESET XTAL EXTAL SPSCK MISO MOSI ACMP+ ACMP- ACMPO PTA0/SS/KBIP0/ADP0/LCD27 PTA1/SPSCK/KBIP1/ADP1/LCD26 KBIP[0:7]
block diagram, Figure shows structure MC9RS08LA8 MCU.
ADP[5:0]
PORT
PTA2/MISO/KBIP2/ADP2/RxD/LCD25 PTA3/MOSI/KBIP3/ADP3/TxD/LCD24 PTA4/KBIP4/ADP4/LCD23 PTA5/KBIP5/ADP5/LCD22 PTA6/KBIP6/ACMP+ PTA7/KBIP7/ACMP-
PORT
PTB0/EXTAL PTB1/XTAL PTB2/RESET/VPP PTC0/RxD
TPMCH0 TPMCH1 TCLK
PORT
PTC1/TxD PTC2/TPMCH0 PTC3/TPMCH1 PTC6/ACMPO/BKGD/MS
USER FLASH 8192 BYTES USER BYTES INTERNAL CLOCK SOURCE (ICS) LOW-POWER OSCILLATOR TCLK SERIAL COMMUNICATION INTERFACE (SCI)
PTC7/TCLK/LCD28 PTD0/LCD0 PTD1/LCD1
PORT
31.25 38.4
(XOSC) VOLTAGE REGULATOR
8-bit Modulo Timer (MTIM)
PTD2/LCD2 PTD3/LCD3 PTD4/LCD4 PTD5/LCD5 PTD6/LCD6 PTD7/LCD7 PTE0/LCD8
LCD[0:7] VLL1 VLL2 VLL3 VCAP1 VCAP2 LCD28 LIQUID CRYSTAL DISPLAY DRIVER (LCD) LCD[16:21] LCD[22:27] LCD[8:15]
PTE1/LCD9
PORT
PTE2/LCD10 PTE3/LCD11 PTE4/LCD12 PTE5/LCD13 PTE6/LCD14 PTE7/LCD15 LCD[16:21]
NOTES: PTB2/RESET/VPP input only when used port PTC6/ACMPO/BKGD/MS output only
Figure MC9RS08LA8 Series Block Diagram
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Assignments
Assignments
Table Availability Package Pin-Count
Number PTB2 PTC0 PTC1 PTC2 PTC3 PTC6 PTC7 PTA0 PTA1 PTA2 SPSCK MISO ACMPO RESET TPMCH0 TPMCH1 BKGD TCLK KBIP0 KBIP1 KBIP2 ADP0 ADP1 ADP2 LCD28 LCD27 LCD26 LCD25 PTB0 PTB1 PTA6 PTA7 KBIP6 KBIP7 ACMP+ ACMP- VSSAD/VREFL VDDAD/VREFH EXTAL XTAL Port PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0 Lowest Priority Highest LCD7 LCD6 LCD5 LCD4 LCD3 LCD2 LCD1 LCD0 VCAP1 VCAP2 VLL1 VLL2 VLL3
This section shows assignments packages available MC9RS08LA8 series.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Assignments
Table Availability Package Pin-Count (continued)
Number PTE7 PTE6 PTE5 PTE4 PTE3 PTE2 PTE1 PTE0 Port PTA3 PTA4 PTA5 MOSI Lowest Priority KBIP3 KBIP4 KBIP5 ADP4 ADP5 Highest ADP3 LCD24 LCD23 LCD22 LCD21 LCD20 LCD19 LCD18 LCD17 LCD16 LCD15 LCD14 LCD13 LCD12 LCD11 LCD10 LCD9 LCD8
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Assignments
PTE2/LCD10
PTE3/LCD11
PTE4/LCD12
PTE5/LCD13
PTE6/LCD14
PTE7/LCD15
PTE0/LCD8
PTE1/LCD9
LCD16
LCD17
LCD18
PTD7/LCD7 PTD6/LCD6 PTD5/LCD5 PTD4/LCD4 PTD3/LCD3 PTD2/LCD2 PTD1/LCD1 PTD0/LCD0 VCAP1 VCAP2 VLL1 VLL2
LCD19
PTB0/EXTAL PTC0/RxD PTA7/KBIP7/ACMP- PTA6/KBIP6/ACMP+ PTB1/XTAL PTB2/RESET/VPP VSSAD/VREFL VDDAD/VREFH PTC1/TxD VLL3
LCD20 LCD21 PTA5/KBIP5/ADP5/LCD22 PTA4/KBIP4/ADP4/LCD23 PTA3/MOSI/KBIP3/ADP3/TxD/LCD24 PTA2/MISO/KBIP2/ADP2/RxD/LCD25 PTA1/SPSCK/KBIP1/ADP1/LCD26 PTA0/SS/KBIP0/ADP0/LCD27 PTC7/TCLK/LCD28 PTC6/ACMPO/BKGD/MS PTC3/TPMCH1 PTC2/TPMCH0
Figure MC9RS08LA8 Series 48-Pin QFN/LQFP Package
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Electrical Characteristics
Parameter Classification
This chapter contains electrical timing specifications.
electrical parameters shown this supplement guaranteed various methods. give customer better understanding following classification used parameters tagged accordingly tables where appropriate:
Table Parameter Classifications
Those parameters guaranteed during production testing each individual device. Those parameters achieved design characterization measuring statistically relevant sample size across process variations. Those parameters achieved design characterization small sample size from typical devices under typical conditions unless otherwise noted. values shown typical column within this category. Those parameters derived mainly from simulations.
NOTE classification shown column labeled parameter tables where appropriate.
Absolute Maximum Ratings
Absolute maximum ratings stress ratings only, functional operation maxima guaranteed. Stress beyond limits specified Table affect device reliability cause permanent damage device. functional operating conditions, refer remaining tables this chapter. This device contains circuitry protecting against damage high static voltage electrical fields; however, advised that normal precautions taken avoid application voltages higher than maximum-rated voltages this high-impedance circuit. Reliability operation enhanced unused inputs tied appropriate logic voltage level (for instance, either VDD) programmable pull-up resistor associated with enabled.
Table Absolute Maximum Ratings
Rating Supply voltage Maximum current into Digital input voltage Instantaneous maximum current Single limit (applies port pins)1, Storage temperature range Symbol Tstg Value -0.3 Unit
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Input must current limited value specified. determine value required current-limiting resistor, calculate resistance values positive (VDD) negative (VSS) clamp voltages, then larger resistance values. functional non-supply pins internally clamped except RESET/VPP which internally clamped only. Power supply must maintain regulation within operating range during instantaneous operating maximum current conditions. positive injection current (VIn VDD) greater than IDD, injection current flow could result external power supply going regulation. Ensure external load will shunt current greater than maximum injection current. This will greatest risk when consuming power. Examples are: system clock present, clock rate very which would reduce overall power consumption.
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, package thermal resistance. Power dissipation pins usually small compared power dissipation on-chip logic voltage regulator circuits user-determined rather than being controlled design. order take PI/O into account power calculations, determine difference between actual voltage multiply current each pin. Except cases unusually high current (heavy loads), difference between voltage will very small.
Table Thermal Characteristics
Rating Operating temperature range (packaged) Maximum junction temperature Thermal resistance Single layer board 48-pin LQFP 48-pin Four layer board 48-pin LQFP 48-pin °C/W TJMAX Symbol Value Unit
average chip-junction temperature (TJ) obtained from:
Eqn.
where: Ambient temperature, Package thermal resistance, junction-to-ambient, Pint PI/O Pint VDD, Watts chip internal power PI/O Power dissipation input output pins user determined most applications, PI/O Pint neglected. approximate relationship between
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
PI/O neglected)
273°C) Eqn.
Solving Equation Equation gives:
273°C) (PD)2 Eqn.
where constant pertaining particular part. determined from Equation measuring equilibrium) known Using this value values obtained solving equations iteratively value
Protection Latch-Up Immunity
Although damage from electrostatic discharge (ESD) much less common these devices than early CMOS circuits, normal handling precautions must used avoid exposure static discharge. Qualification tests performed ensure that these devices withstand exposure reasonable levels static without suffering permanent damage. testing conformity with AEC-Q100 Stress Test Qualification Automotive Grade Integrated Circuits. During device qualification stresses were performed human body model (HBM), machine model (MM) charge device model (CDM). device defined failure after exposure pulses device longer meets device specification. Complete parametric functional testing performed applicable device specification room temperature followed temperature, unless specified otherwise device specification.
Table Latch-up Test Conditions Model
Human Body
Description
Series resistance Storage capacitance Number pulses Series resistance
Symbol
Value
1500 -2.5
Unit
Machine
Storage capacitance Number pulses Minimum input voltage limit
Latch-up Maximum input voltage limit
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table Latch-Up Protection Characteristics
Rating1
Human body model (HBM) Machine model (MM) Charge device model (CDM) Latch-up current 85°C Latch-up current 85°C
Symbol
VHBM VCDM ILAT ILAT
±2000 ±200 ±500 ±1002 ±753
Unit
Parameter achieved design characterization small sample size from typical devices under typical conditions unless otherwise noted. These pins meet JESD78A Class (section 1.2) Level (section 1.3) requirement ±100 This meets JESD78A Class (section 1.2) Level (section 1.3) characterization
Characteristics
This section includes information about power supply requirements, characteristics, power supply current various operating modes.
Table Characteristics (Temperature Range 85°C Ambient)
Parameter Supply voltage (run, wait stop modes) fBus Minimum retention supply voltage applied Low-voltage Detection threshold (VDD falling) Power RESET (POR) voltage Input high voltage (VDD (all digital inputs) Input high voltage (2.7 (all digital inputs) Input voltage (VDD (all digital inputs) Input voltage (2.7 (all digital inputs) Input hysteresis (all digital inputs) Input leakage current (per pin) VSS, input only pins High impedance (off-state) leakage current (per pin) VSS, input/output Internal pullup/pulldown resistors2(all port pins) Output high voltage (all (VDD (VDD Maximum total port pins |IOHT| ports)3,4 Symbol VRAM VLVD VPOR Vhys |IIn| |IOZ| 0.81 Typical Unit
0.70 0.85 0.06
0.025 0.025
0.30 0.30
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table Characteristics (Temperature Range 85°C Ambient) (continued)
Parameter Output voltage (port (VDD (VDD
Symbol
Typical
Unit
IOLT
Maximum total port pins injection current VSS, Single limit Total limit, includes stressed pins Input capacitance (all non-supply pins)
5,6,7
This parameter characterized tested each device. Measurement condition pull resistors: pullup pulldown. high output drive strength. tested under high output drive strength only. functional non-supply pins internally clamped except RESET/VPP which internally clamped only Input must current limited value specified. determine value required current-limiting resistor, calculate resistance values positive negative clamp voltages, then larger values. This parameter characterized tested each device.
Typical VDD-VOH
12mA 15mA
-40C
Figure Typical VDD-VOH (VDD
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Typical DD-V
1800 1600 1400 1200 1000 12mA 15mA -40C
Figure Typical VDD-VOH (VDD
Typical
12mA 15mA
-40C
Figure Typical (VDD
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Typical
12mA 15mA -40C
Figure Typical (VDD
2.8V 3.0V 3.3V 4.5V 5.0V 5.5V
-40C
Figure Typical
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
-40C
2.8V 3.0V 3.3V 4.5V 5.0V 5.5V
Figure Typical
Supply Current Characteristics
Table Supply Current Characteristics
Parameter current2 measured Symbol supply (fBus MHz) RIDD10 Wait mode supply current WIDD1 Stop mode supply current SIDD adder from stop3 ACMP adder from stop (ACME Typical1 3.71 3.68 3.67 3.66 1.37 1.37 1.37 1.36 1.40 1.35 1.31 1.25 125.45 122.04 121.59 121.22 18.5 Unit
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table Supply Current Characteristics (continued)
Parameter adder from stop with clock source enabled4 adder from stop (LVDE LVDSE
Symbol
Typical1
Unit
Typicals measured Does include loads port pins Required asynchronous clock enabled. Most customers expected find that auto-wakeup from stop used instead higher current wait mode. Wait mode typical 1.37 with fBus MHz.
External (XOSC) Internal (ICS) Oscillator Characteristics
Reference Figure crystal resonator circuit.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table External Oscillator Specifications (Temperature Range 85°C Ambient)
Characteristic Oscillator crystal resonator (EREFS range, (IREFS High range, bypassed external (CLKS IREFS High range, engaged external (CLKS IREFS Load capacitors Feedback resistor range kHz) High range MHz) Series resistor range Gain (HGO High Gain (HGO High range Gain (HGO High Gain (HGO Crystal start-up time range High range Square wave input clock frequency (EREFS bypass external (CLKS engaged external (CLKS Average internal reference frequency untrimmed Average internal reference frequency trimmed output frequency range untrimmed output frequency range trimmed Resolution trimmed output frequency fixed voltage temperature Total deviation trimmed output frequency over voltage temperature acquisition time Long term Jitter output clock (averaged over interval)
Symbol fhi_byp fhi_eng
Typical1
38.4
Unit
Note
CSTL CSTH
31.25 31.25
41.66 39.0625 21.33 ±0.2
0.03125 31.25 12.8
fextal fint_ut fint_t fdco_ut fdco_t fdco_res_t fdco_t tacquire CJitter
%fdco %fdco %fdco
Data Typical column characterized typical recommended value. crystal resonator manufacturer's recommendation. This parameter characterized tested each device. Proper board layout procedures must followed achieve specifications. This specification applies time reference source reference divider changed, trim value changed changing from disabled (FBELP, FBILP) enabled (FEI, FEE, FBE, FBI). crystal/resonator being used reference, this specification assumes already running.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Jitter average deviation from programmed frequency measured over specified interval maximum fBUS. Measurements made with device powered filtered supplies clocked stable external clock signal. Noise injected into circuitry variation crystal oscillator frequency increase CJitter percentage given interval.
XOSC EXTAL XTAL
Crystal Resonator
Figure Typical Crystal Resonator Circuit
Characteristics
This section describes timing characteristics each peripheral system.
3.8.1
Control Timing
Table Control Timing
Parameter Symbol fBus tRTI textrst tKBIPW tKBIPWS tRise, tFall tcyc Typical 1000 1300 Unit
frequency (tcyc 1/fBus) Real time interrupt internal oscillator period External RESET pulse width1 pulse width2 pulse width stop1 Port rise fall time (load pF)3 Slew rate control disabled (PTxSE Slew rate control enabled (PTxSE
This shortest pulse that guaranteed pass through input filter circuitry. Shorter pulses recognized. This minimum pulse width that guaranteed pass through synchronization circuitry. Shorter pulses recognized. stop mode, synchronizer bypassed shorter pulses recognized that case. Timing shown with respect levels. Temperature range -40°C 85°C.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
textrst RESET
Figure Reset Timing
tKBIPWS tKBIPW (rising high level)
(falling level) tKBIPW tKBIPWS
Figure Pulse Width
3.8.2
TPM/MTIM Module Timing
Synchronizer circuits determine shortest input pulses that recognized fastest clock that used optional external source timer counter. These synchronizers operate from current rate clock.
Table TPM/MTIM Input Timing
Function External clock frequency External clock period External clock high time External clock time Input capture pulse width Symbol fTCLK tTCLK tclkh tclkl fICPW
tTCLK tclkh
fBus1/4
Unit tCYC tCYC tCYC tCYC
TCLK tclkl
Figure Timer External Clock
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
tICPW TPMCHn
TPMCHn tICPW
Figure Timer Input Capture Pulse
Analog Comparator (ACMP) Electrical
Table Analog Comparator Electrical Specifications
Characteristic Symbol IDDAC VAIN VAIO IALKG tAINIT 1.208 Typical 1.208 15.0 1.208 Unit
Supply voltage Supply current (active) Analog input voltage Analog input offset voltage1 Analog Comparator hysteresis1 Analog source impedance Analog input leakage current Analog Comparator initialization delay Analog Comparator bandgap reference voltage
These data characterized production tested. Measurements made with device entered STOP mode.
3.10
Internal Clock Source Characteristics
Table Internal Clock Source Specifications
Characteristic Symbol fint_ut fint_t fdco_ut fdco_t fdco_res_t fdco_t tacquire 31.25 12.8 Typical1 31.25 39.06252 41.66 39.0625 21.33 Unit %fdco %fdco
Average internal reference frequency untrimmed Average internal reference frequency trimmed output frequency range untrimmed output frequency range trimmed Resolution trimmed output frequency fixed voltage temperature Total deviation trimmed output frequency over voltage temperature acquisition time4,5 Stop recovery time (FLL wakeup previous acquired frequency) IREFSTEN IREFSTEN
twakeup
Data typical column characterized typical recommended value. This value been trimmed 39.0625 when factory This value been trimmed when factory
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
This parameter characterized tested each device. This specification applies time reference source reference divider changed, trim value changed changing from disabled (FBILP) enabled (FEI, FBI).
3.11
Characteristics
Table Volt 10-bit Operating Conditions
Characteristic Conditions Absolute Symbol VDDAD VDDAD VSSAD VREFH VREFL VADIN CADIN RADIN -100 -100 VSSAD VREFL fADCK Typical1 VDDAD VSSAD VDDAD VSSAD VREFH Unit
Supply voltage Ground voltage voltage high voltage Input voltage Input capacitance Input resistance
Delta (VDD VDDAD)2 Delta (VSS VSSAD)2 10-bit mode fADCK 4MHz fADCK 4MHz 8-bit mode (all valid fADCK)
Analog source resistance external
conversion clock frequency
High speed (ADLPC power (ADLPC
Typical values assume VDDAD Temp fADCK unless otherwise stated. Typical values reference only tested production. potential difference.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
SIMPLIFIED INPUT EQUIVALENT CIRCUIT VADIN leakage input protection
ZADIN SIMPLIFIED CHANNEL SELECT CIRCUIT RADIN
ENGINE
RADIN INPUT
RADIN
INPUT
RADIN CADIN
INPUT
Figure Input Impedance Equivalency Diagram Table 10-bit Characteristics (VREFH VDDAD, VREFL VSSAD)
Characteristic Supply current ADLPC=1 ADLSMP=1 ADCO=1 Supply current ADLPC=1 ADLSMP=0 ADCO=1 Supply current ADLPC=0 ADLSMP=1 ADCO=1 Supply current ADLPC=0 ADLSMP=0 ADCO=1 Supply current asynchronous clock source Conditions Symbol Typical1 Unit
IDDAD
IDDAD
IDDAD
VDDAD
IDDAD
0.582
Stop, Reset, Module High Speed (ADLPC Power (ADLPC
IDDAD fADACK
1.25
0.011
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table 10-bit Characteristics (VREFH VDDAD, VREFL VSSAD) (continued)
Characteristic Conversion time (Including sample time) Conditions Short Sample (ADLSMP Long Sample (ADLSMP Short Sample (ADLSMP Long Sample (ADLSMP 10-bit mode Total unadjusted error 8-bit mode 10-bit mode Differential non-linearity 8-bit mode ETUE Symbol tADC tADS 23.5 ±0.5 ±0.5 ±0.3 ±2.5 ±1.0 ±1.0 ±0.5 LSB2 ADCK cycles Typical1 Unit ADCK cycles
Sample time
LSB2
Monotonicity no-missing-code guaranteed 10-bit mode Integral non-linearity 8-bit mode 10-bit mode Zero-scale error 8-bit mode Full-scale error VADIN VDDA Quantization error 8-bit mode Input leakage error leakage3
±0.5 ±0.3 ±0.5 ±0.5 ±0.5 ±0.5 ±0.2 ±0.1
±1.0 ±0.5 ±1.5 ±0.5 ±1.5 ±0.5 ±0.5 ±0.5 ±2.5
LSB2
LSB2
10-bit mode 8-bit mode 10-bit mode
LSB2
LSB2
10-bit mode 8-bit mode
LSB2
Typical values assume VDDAD Temp fADCK unless otherwise stated. Typical values reference only tested production. (VREFH VREFL)/2N Based input leakage current. Refer electrical.
3.12
Characteristics
This section describes timing characteristics each peripheral system.
3.12.1
Control Timing
Table Control Timing
Characteristic Symbol fBus tRTI Typical 1000 1300 Unit
frequency (tcyc 1/fBus) Real time interrupt internal oscillator period
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table Control Timing (continued)
Characteristic External RESET pulse width1 pulse width2 pulse width stop1 Port rise fall time (load pF)3 Slew rate control disabled (PTxSE Slew rate control enabled (PTxSE
Symbol textrst tKBIPW tKBIPWS tRise, tFall
tcyc
Typical
Unit
This shortest pulse that guaranteed pass through input filter circuitry. Shorter pulses recognized. This minimum pulse width that guaranteed pass through synchronization circuitry. Shorter pulses recognized. stop mode, synchronizer bypassed shorter pulses recognized that case. Timing shown with respect levels. Temperature range
textrst RESET
Figure Reset Timing
tKBIPWS tKBIPW (rising high level)
(falling level) tKBIPW tKBIPWS
Figure Pulse Width
3.13
Flash Specifications
This section provides details about program/erase times program-erase endurance flash memory. detailed information about program/erase operations, reference manual.
Table Flash Characteristics
Characteristic Supply voltage program/erase Program/Erase voltage current Program Mass erase Supply voltage read operation fBus IVPP_prog IVPP_erase VRead Symbol 11.8 Typical1 12.2 Unit
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Electrical Characteristics
Table Flash Characteristics (continued)
Characteristic Byte program time Mass erase time Cumulative program time2 Total cumulative time (total applied device) HVEN program setup time PGM/MASS HVEN setup time HVEN hold time HVEN hold time MASS PGM/MASS setup time HVEN hold time rise time3 Recovery time Program/erase endurance Data retention
Symbol tprog thv_total tpgs tnvs tnvh tnvh1 tvps tvph tvrs trcv tD_ret
1000
Typical1
Unit hours cycles years
Typicals measured cumulative high voltage programming time same before next erase. Same address programmed more than twice before next erase. Fast rise time potentially trigger protection structure, which result over current flowing into cause permanent damage pad. External filtering power source recommended. example filter shown Figure
Figure Example Filtering
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Ordering Information
tprog WRITE DATA1 tpgs
Data Next Data
tnvs HVEN VPP2 tnvh trcv
tvps
tvph
Next Data applies programming multiple bytes single row, refer MC9RS08LA8 Series Reference Manual. must valid operating voltage before voltage applied removed from pin.
Figure Flash Program Timing
trcv MASS tnvs HVEN VPP1
tnvh1
tvps
tvph
must valid operating voltage before voltage applied removed from pin.
Figure Flash Mass Erase Timing
Ordering Information
This section contains ordering numbers MC9RS08LA8 devices. below example device numbering system.
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
Mechanical Drawings
Table Device Numbering System
Memory Device Number FLASH MC9RS08LA8 bytes Type 48-Pin 48-Pin LQFP Designator Document 98ARH99048A 98ASH00962A Package
RS08 Status Fully Qualified) Memory Flash-based) Core Family Package designator (See Table Temperature range -40°C 85°C) Approximate memory size
Mechanical Drawings
This following pages contain mechanical specifications MC9RS08LA8 series package options. 48-pin (quad flat non-leader) 48-pin LQFP (low-profile quad flat-pack)
MC9RS08LA8 Series Data Sheet, Rev. Freescale Semiconductor
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Document Number: MC9RS08LA8 Rev. 10/2008

MC9RS08LA8 Case 1314 LQFP Case MC9RS08LA8 Features

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