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8-bit Microcontroller with 4/8K Bytes In-System Programmable Flash ATt


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8-bit Microcontroller with 4/8K Bytes In-System Programmable Flash ATtiny48/88 Preliminary Summary
Rev. 8008BS-AVR-06/08
Configurations
Figure 1-1. Pinout ATtiny48/88
TQFP View
(INT0/PCINT18) (PCINT17) (PCINT16) (RESET/PCINT14) (ADC5/SCL/PCINT13) (ADC4/SDA/PCINT12) (ADC3/PCINT11) (ADC2/PCINT10)
PDIP
(PCINT14/RESET) (PCINT16) (PCINT17) (PCINT18/INT0) (PCINT19/INT1) (PCINT20/T0) (PCINT6/CLKI) (PCINT7) (PCINT21/T1) (PCINT22/AIN0) (PCINT23/AIN1) (PCINT0/CLKO/ICP1) (ADC5/SCL/PCINT13) (ADC4/SDA/PCINT12) (ADC3/PCINT11) (ADC2/PCINT10) (ADC1/PCINT9) (ADC0/PCINT8) (PCINT15) AVCC (SCK/PCINT5) (MISO/PCINT4) (MOSI/PCINT3) (SS/OC1B/PCINT2) (OC1A/PCINT1)
(PCINT19/INT1) (PCINT20/T0) (PCINT26) (PCINT27) (PCINT6/CLKI) (PCINT7)
(ADC1/PCINT9) (ADC0/PCINT8) (ADC7/PCINT25) (PCINT15) (ADC6/PCINT24) AVCC (SCK/PCINT5)
(PCINT21/T1) (PCINT22/AIN0) (PCINT23/AIN1) (PCINT0/CLKO/ICP1) (PCINT1/OC1A) (PCINT2/SS/OC1B) (PCINT3/MOSI) (PCINT4/MISO)
View
(INT0/PCINT18) (PCINT17) (PCINT16) (RESET/PCINT14) (ADC5/SCL/PCINT13) (ADC4/SDA/PCINT12) (ADC3/PCINT11)
(INT0/PCINT18) (PCINT17) (PCINT16) (RESET/PCINT14) (ADC5/SCL/PCINT13) (ADC4/SDA/PCINT12) (ADC3/PCINT11) (ADC2/PCINT10)
View
(PCINT19/INT1) (PCINT20/T0) (PCINT6/CLKI) (PCINT7) (PCINT21/T1)
(ADC2/PCINT10) (ADC1/PCINT9) (ADC0/PCINT8) (PCI NT15) AVCC (SCK/PCINT5)
(PCINT19/INT1) (PCINT20/T0) (PCINT26) (PCINT27) (PCINT6/CLKI) (PCINT7)
(ADC1/PCINT9) (ADC0/PCINT8) (ADC7/PCINT25) (PCINT15) (ADC6/PCINT24) AVCC (SCK/PCINT5)
(PCINT22/AIN0) (PCINT23/AIN1) (PCINT0/CLKO/ICP1) (PCINT1/OC1A) (PCINT2/SS/OC1B) (PCINT3//MOSI) (PCINT4/MISO)
NOTE: Bottom should soldered ground.
NOTE: Bottom should soldered ground.
ATtiny48/88
8008BS-AVR-06/08
(PCINT21/T1) (PCINT22/AIN0) (PCINT23/AIN1) (PCINT0/CLKO/ICP1) (PCINT1/OC1A) (PCINT2/SS/OC1B) (PCINT3/MOSI) (PCINT4/MISO)
ATtiny48/88
1.1.1
Descriptions
Digital supply voltage.
1.1.2
Ground.
1.1.3
Port (PA3:0) 32-lead TQFP 32-pad QFN/MLF packages, only) Port 4-bit bi-directional port with internal pull-up resistors (selected each bit) 32lead TQFP 32-pad QFN/MLF package. PA3.0 output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tristated when reset condition becomes active, even clock running. Port (PB7:0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Depending clock selection fuse settings, used input internal clock operating circuit. various special features Port elaborated "Alternate Functions Port page "System Clock Clock Options" page
1.1.4
1.1.5
Port (PC7, PC5:0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). PC5.0 output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. PC6/RESET RSTDISBL Fuse programmed, used pin. Note that electrical characteristics differ from those other pins Port RSTDISBL Fuse unprogrammed, used reset input. level this longer than minimum pulse width will generate reset, even clock running. minimum pulse length given Table 22-3 page 201. Shorter pulses guaranteed generate reset. various special features Port elaborated "Alternate Functions Port page
1.1.6
1.1.7
Port (PD7:0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). PD7.4 output buffers have symmetrical drive characteristics with both high sink source capabilities, while PD3.0 output buffers have stronger sink capabilities. inputs, Port
8008BS-AVR-06/08
pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. various special features Port elaborated "Alternate Functions Port page 1.1.8 AVCC AVCC supply voltage converter selection pins. This should externally connected even used. used, recommended this connected through low-pass filter, described "Analog Noise Canceling Techniques" page 163. following pins receive their supply voltage from AVCC: PC7, PC5:0 32-lead packages) PA1:0. other pins take their supply voltage from VCC.
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
Overview
ATtiny48/88 low-power CMOS 8-bit microcontroller based enhanced RISC architecture. executing powerful instructions single clock cycle, ATtiny48/88 achieves throughputs approaching MIPS allowing system designer optimize power consumption versus processing speed.
Block Diagram
Figure 2-1. Block Diagram
Watchdog Timer Watchdog Oscillator
Power Supervision RESET
debugWIRE
Program Logic
Oscillator Circuits Clock Generation
Flash
SRAM
EEPROM
8bit
16bit
Conv.
DATABUS
Internal Bandgap
Analog Comp.
PORT
PORT
PORT
PORT
RESET CLKI PD[0.7] PB[0.7] PC[0.7] PA[0.3] TQFP MLF)
core combines rich instruction with general purpose working registers. registers directly connected Arithmetic Logic Unit (ALU), allowing independent registers accessed single instruction executed clock cycle. resulting architecture more code efficient while achieving throughputs times faster than conventional CISC microcontrollers.
8008BS-AVR-06/08
ATtiny48/88 provides following features: 4/8K bytes In-System Programmable Flash, 64/64 bytes EEPROM, 256/512 bytes SRAM, general purpose lines I/Os 32-lead TQFP 32-pad QFN/MLF packages), general purpose working registers, flexible Timer/Counters with compare modes, internal external interrupts, byte-oriented 2-wire serial interface, serial port, 6-channel 10-bit channels 32-lead TQFP 32pad QFN/MLF packages), programmable Watchdog Timer with internal oscillator, three software selectable power saving modes. Idle mode stops while allowing Timer/Counters, 2-wire serial interface, port, interrupt system continue functioning. Power-down mode saves register contents freezes oscillator, disabling other chip functions until next interrupt hardware reset. Noise Reduction mode stops modules except ADC, helps minimize switching noise during conversions. device manufactured using Atmel's high density non-volatile memory technology. On-chip Flash allows program memory reprogrammed In-System through serial interface, conventional non-volatile memory programmer, On-chip Boot program running core. Boot program interface download application program Flash memory. combining 8-bit RISC with In-System SelfProgrammable Flash monolithic chip, Atmel ATtiny48/88 powerful microcontroller that provides highly flexible cost effective solution many embedded control applications. ATtiny48/88 supported full suite program system development tools including: compilers, macro assemblers, program debugger/simulators evaluation kits.
Comparison Between ATtiny48 ATtiny88
ATtiny48 ATtiny88 differ only memory sizes. Table summarizes different memory sizes devices. Table 2-1.
Device ATtiny48 ATtiny88
Memory Size Summary
Flash Bytes Bytes EEPROM Bytes Bytes Bytes Bytes
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
About
Resources
comprehensive development tools, application notes datasheets available download http://www.atmel.com/avr.
About Code Examples
This documentation contains simple code examples that briefly show various parts device. These code examples assume that part specific header file included before compilation. aware that compiler vendors include definitions header files interrupt handling compiler dependent. Please confirm with compiler documentation more details. Registers located extended map, "IN", "OUT", "SBIS", "SBIC", "CBI", "SBI" instructions must replaced with instructions that allow access extended I/O. Typically "LDS" "STS" combined with "SBRS", "SBRC", "SBR", "CBR".
Data Retention
Reliability Qualification results show that projected data retention failure rate much less than over years 85°C years 25°C.
Disclaimer
Typical values contained this datasheet based simulations characterization other microcontrollers manufactured same process technology. values will available after device characterized.
8008BS-AVR-06/08
Register Summary
Address
(0xFF) (0xFE) (0xFD) (0xFC) (0xFB) (0xFA) (0xF9) (0xF8) (0xF7) (0xF6) (0xF5) (0xF4) (0xF3) (0xF2) (0xF1) (0xF0) (0xEF) (0xEE) (0xED) (0xEC) (0xEB) (0xEA) (0xE9) (0xE8) (0xE7) (0xE6) (0xE5) (0xE4) (0xE3) (0xE2) (0xE1) (0xE0) (0xDF) (0xDE) (0xDD) (0xDC) (0xDB) (0xDA) (0xD9) (0xD8) (0xD7) (0xD6) (0xD5) (0xD4) (0xD3) (0xD2) (0xD1) (0xD0) (0xCF) (0xCE) (0xCD) (0xCC) (0xCB) (0xCA) (0xC9) (0xC8) (0xC7) (0xC6) (0xC5) (0xC4) (0xC3) (0xC2) (0xC1) (0xC0)
Name
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Page
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
Address
(0xBF) (0xBE) (0xBD) (0xBC) (0xBB) (0xBA) (0xB9) (0xB8) (0xB7) (0xB6) (0xB5) (0xB4) (0xB3) (0xB2) (0xB1) (0xB0) (0xAF) (0xAE) (0xAD) (0xAC) (0xAB) (0xAA) (0xA9) (0xA8) (0xA7) (0xA6) (0xA5) (0xA4) (0xA3) (0xA2) (0xA1) (0xA0) (0x9F) (0x9E) (0x9D) (0x9C) (0x9B) (0x9A) (0x99) (0x98) (0x97) (0x96) (0x95) (0x94) (0x93) (0x92) (0x91) (0x90) (0x8F) (0x8E) (0x8D) (0x8C) (0x8B) (0x8A) (0x89) (0x88) (0x87) (0x86) (0x85) (0x84) (0x83) (0x82) (0x81) (0x80) (0x7F) (0x7E)
Name
Reserved TWHSR TWAMR TWCR TWDR TWAR TWSR TWBR Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved OCR1BH OCR1BL OCR1AH OCR1AL ICR1H ICR1L TCNT1H TCNT1L Reserved TCCR1C TCCR1B TCCR1A DIDR1 DIDR0
TWAM6 TWINT TWA6 TWS7
TWAM5 TWEA TWA5 TWS6
TWAM4 TWSTA TWA4 TWS5 Timer/Counter1
TWAM3 TWSTO TWA3 TWS4
TWAM2 TWWC TWA2 TWS3
TWAM1 TWEN TWA1
TWAM0 TWA0 TWPS1
TWHS TWIE TWGCE TWPS0
Page
2-wire Serial Interface Data Register
2-wire Serial Interface Rate Register
Output Compare Register High Byte Timer/Counter1 Output Compare Register Byte Timer/Counter1 Output Compare Register High Byte Timer/Counter1 Output Compare Register Byte Timer/Counter1 Input Capture Register High Byte Timer/Counter1 Input Capture Register Byte Timer/Counter1 Counter Register High Byte Timer/Counter1 Counter Register Byte
FOC1A ICNC1 COM1A1 ADC7D FOC1B ICES1 COM1A0 ADC6D COM1B1 ADC5D WGM13 COM1B0 ADC4D WGM12 ADC3D CS12 ADC2D CS11 WGM11 AIN1D ADC1D CS10 WGM10 AIN0D ADC0D
8008BS-AVR-06/08
Address
(0x7D) (0x7C) (0x7B) (0x7A) (0x79) (0x78) (0x77) (0x76) (0x75) (0x74) (0x73) (0x72) (0x71) (0x70) (0x6F) (0x6E) (0x6D) (0x6C) (0x6B) (0x6A) (0x69) (0x68) (0x67) (0x66) (0x65) (0x64) (0x63) (0x62) (0x61) (0x60) 0x3F (0x5F) 0x3E (0x5E) 0x3D (0x5D) 0x3C (0x5C) 0x3B (0x5B) 0x3A (0x5A) 0x39 (0x59) 0x38 (0x58) 0x37 (0x57) 0x36 (0x56) 0x35 (0x55) 0x34 (0x54) 0x33 (0x53) 0x32 (0x52) 0x31 (0x51) 0x30 (0x50) 0x2F (0x4F) 0x2E (0x4E) 0x2D (0x4D) 0x2C (0x4C) 0x2B (0x4B) 0x2A (0x4A) 0x29 (0x49) 0x28 (0x48) 0x27 (0x47) 0x26 (0x46) 0x25 (0x45) 0x24 (0x44) 0x23 (0x43) 0x22 (0x42) 0x21 (0x41) 0x20 (0x40) 0x1F (0x3F) 0x1E (0x3E) 0x1D (0x3D) 0x1C (0x3C)
Name
Reserved ADMUX ADCSRB ADCSRA ADCH ADCL Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved TIMSK1 TIMSK0 PCMSK2 PCMSK1 PCMSK0 PCMSK3 EICRA PCICR Reserved OSCCAL Reserved Reserved Reserved CLKPR WDTCSR SREG Reserved Reserved Reserved Reserved Reserved Reserved SPMCSR Reserved MCUCR MCUSR SMCR Reserved DWDR ACSR Reserved SPDR SPSR SPCR GPIOR2 GPIOR1 Reserved OCR0B OCR0A TCNT0 TCCR0A Reserved GTCCR Reserved EEARL EEDR EECR GPIOR0 EIMSK EIFR
ADEN
REFS0 ACME ADSC
ADLAR ADATE
ADIF
MUX3 ADIE
MUX2 ADTS2 ADPS2
MUX1 ADTS1 ADPS1
MUX0 ADTS0 ADPS0
Page
Data Register High byte Data Register byte PCINT23 PCINT15 PCINT7 PRTWI CLKPCE WDIF SPIF SPIE BPDS ACBG WCOL BPDSE DORD PCINT22 PCINT14 PCINT6 WDIE ICIE1 PCINT21 PCINT13 PCINT5 PRTIM0 WDP3 PCINT20 PCINT12 PCINT4 WDCE CTPB PCINT19 PCINT11 PCINT3 PCINT27 ISC11 PCIE3 PRTIM1 CLKPS3 RFLB WDRF OCIE1B OCIE0B PCINT18 PCINT10 PCINT2 PCINT26 ISC10 PCIE2 PRSPI CLKPS2 WDP2 PGWRT BORF ACIC CPHA OCIE1A OCIE0A PCINT17 PCINT9 PCINT1 PCINT25 ISC01 PCIE1 CLKPS1 WDP1 PGERS EXTRF ACIS1 SPR1 TOIE1 TOIE0 PCINT16 PCINT8 PCINT0 PCINT24 ISC00 PCIE0
Oscillator Calibration Register PRADC CLKPS0 WDP0 SELFPRGEN PORF
debugWire Data Register MSTR ACIE Data Register CPOL
ACIS0
SPI2X SPR0
General Purpose Register General Purpose Register Timer/Counter0 Output Compare Register Timer/Counter0 Output Compare Register Timer/Counter0 (8-bit) CTC0 CS02 CS01 CS00 PSRSYNC
EEPROM Address Register Byte EEPROM Data Register EEPM1 EEPM0 EERIE EEMPE EEPE INT1 INTF1 EERE INT0 INTF0 General Purpose Register
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
Address
0x1B (0x3B) 0x1A (0x3A) 0x19 (0x39) 0x18 (0x38) 0x17 (0x37) 0x16 (0x36) 0x15 (0x35) 0x14 (0x34) 0x13 (0x33) 0x12 (0x32) 0x11 (0x31) 0x10 (0x30) 0x0F (0x2F) 0x0E (0x2E) 0x0D (0x2D) 0x0C (0x2C) 0x0B (0x2B) 0x0A (0x2A) 0x09 (0x29) 0x08 (0x28) 0x07 (0x27) 0x06 (0x26) 0x05 (0x25) 0x04 (0x24) 0x03 (0x23) 0x02 (0x22) 0x01 (0x21) 0x00 (0x20)
Name
PCIFR Reserved Reserved Reserved Reserved TIFR1 TIFR0 Reserved Reserved PORTCR Reserved Reserved Reserved PORTA DDRA PINA PORTD DDRD PIND PORTC DDRC PINC PORTB DDRB PINB Reserved Reserved Reserved
BBMD PORTD7 DDD7 PIND7 PORTC7 DDC7 PINC7 PORTB7 DDB7 PINB7
BBMC PORTD6 DDD6 PIND6 PORTC6 DDC6 PINC6 PORTB6 DDB6 PINB6
ICF1 BBMB PORTD5 DDD5 PIND5 PORTC5 DDC5 PINC5 PORTB5 DDB5 PINB5
BBMA PORTD4 DDD4 PIND4 PORTC4 DDC4 PINC4 PORTB4 DDB4 PINB4
PCIF3 PUDD PORTA3 DDA3 PINA3 PORTD3 DDD3 PIND3 PORTC3 DDC3 PINC3 PORTB3 DDB3 PINB3
PCIF2 OCF1B OCF0B PUDC PORTA2 DDA2 PINA2 PORTD2 DDD2 PIND2 PORTC2 DDC2 PINC2 PORTB2 DDB2 PINB2
PCIF1 OCF1A OCF0A PUDB PORTA1 DDA1 PINA1 PORTD1 DDD1 PIND1 PORTC1 DDC1 PINC1 PORTB1 DDB1 PINB1
PCIF0 TOV1 TOV0 PUDA PORTA0 DDA0 PINA0 PORTD0 DDD0 PIND0 PORTC0 DDC0 PINC0 PORTB0 DDB0 PINB0
Page
Note:
compatibility with future devices, reserved bits should written zero accessed. Reserved memory addresses should never written. Registers within address range 0x00 0x1F directly bit-accessible using instructions. these registers, value single bits checked using SBIS SBIC instructions. Some Status Flags cleared writing logical them. Note that, unlike most other AVRs, instructions will only operate specified bit, therefore used registers containing such Status Flags. instructions work with registers 0x00 0x1F only. When using specific commands OUT, addresses 0x00 0x3F must used. When addressing Registers data space using instructions, 0x20 must added these addresses. ATtiny48/88 complex microcontroller with more peripheral units than supported within location reserved Opcode instructions. Extended space from 0x60 0xFF SRAM, only ST/STS/STD LD/LDS/LDD instructions used.
8008BS-AVR-06/08
Instruction Summary
Mnemonics
ADIW SUBI SBCI SBIW ANDI RJMP IJMP RCALL ICALL RETI CPSE SBRC SBRS SBIC SBIS BRBS BRBC BREQ BRNE BRCS BRCC BRSH BRLO BRMI BRPL BRGE BRLT BRHS BRHC BRTS BRTC BRVS BRVC BRIE BRID Rd,Rr Rd,Rr Rd,Rr Rd,K
Operands
Rdl,K Rdl,K Rd,K Rd,K Registers
Description
Operation
Flags
Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,C,N,V Z,C,N,V,H Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V None None None None None None None N,V,C,H N,V,C,H N,V,C,H None None None None None None None None None None None None None None None None None None None None None None None None None None Z,C,N,V Z,C,N,V Z,C,N,V
#Clocks
1/2/3 1/2/3 1/2/3 1/2/3 1/2/3
ARITHMETIC LOGIC INSTRUCTIONS with Carry Registers Immediate Word Subtract Registers Subtract Constant from Register Subtract with Carry Registers Subtract with Carry Constant from Reg. Subtract Immediate from Word Logical Registers Logical Register Constant Logical Registers Logical Register Constant Exclusive Registers One's Complement Two's Complement Bit(s) Register Clear Bit(s) Register Increment Decrement Test Zero Minus Clear Register Register Relative Jump Indirect Jump Relative Subroutine Call Indirect Call Subroutine Return Interrupt Return Compare, Skip Equal Compare Compare with Carry Compare Register with Immediate Skip Register Cleared Skip Register Skip Register Cleared Skip Register Branch Status Flag Branch Status Flag Cleared Branch Equal Branch Equal Branch Carry Branch Carry Cleared Branch Same Higher Branch Lower Branch Minus Branch Plus Branch Greater Equal, Signed Branch Less Than Zero, Signed Branch Half Carry Flag Branch Half Carry Flag Cleared Branch Flag Branch Flag Cleared Branch Overflow Flag Branch Overflow Flag Cleared Branch Interrupt Enabled Branch Interrupt Disabled Register Clear Register Logical Shift Left Logical Shift Right Rotate Left Through Carry Rdh:Rdl Rdh:Rdl Rdh:Rdl Rdh:Rdl 0xFF 0x00 (0xFF 0xFF STACK STACK (Rr(b)=0) (Rr(b)=1) (P(b)=0) (P(b)=1) (SREG(s) then PCPC+k (SREG(s) then PCPC+k then then then then then then then then then then then then then then then then then then I/O(P,b) I/O(P,b) Rd(n+1) Rd(n), Rd(0) Rd(n) Rd(n+1), Rd(7) Rd(0)C,Rd(n+1) Rd(n),CRd(7)
BRANCH INSTRUCTIONS
BIT-TEST INSTRUCTIONS
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
Mnemonics
SWAP BSET BCLR DATA TRANSFER INSTRUCTIONS MOVW PUSH SLEEP BREAK Rd,Y+q Y+q,Rr Z+q,Rr Move Between Registers Copy Register Word Load Immediate Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Direct from SRAM Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Direct SRAM Load Program Memory Load Program Memory Load Program Memory Post-Inc Store Program Memory Port Port Push Register Stack Register from Stack Operation Sleep Watchdog Reset Break (see specific descr. Sleep function) (see specific descr. WDR/timer) On-chip Debug Only Rd+1:Rd Rr+1:Rr (X), (Y), (Z), (Z), R1:R0 STACK STACK None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None
Operands
Arithmetic Shift Right Swap Nibbles Flag Flag Clear
Description
Rotate Right Through Carry
Operation
Rd(7)C,Rd(n) Rd(n+1),CRd(0) Rd(n) Rd(n+1), n=0.6 Rd(3.0)Rd(7.4),Rd(7.4)Rd(3.0) SREG(s) SREG(s) Rr(b) Rd(b)
Flags
Z,C,N,V Z,C,N,V None SREG(s) SREG(s) None
#Clocks
Store from Register load from Register Carry Clear Carry Negative Flag Clear Negative Flag Zero Flag Clear Zero Flag Global Interrupt Enable Global Interrupt Disable Signed Test Flag Clear Signed Test Flag Twos Complement Overflow. Clear Twos Complement Overflow SREG Clear SREG Half Carry Flag SREG Clear Half Carry Flag SREG
CONTROL INSTRUCTIONS
8008BS-AVR-06/08
Ordering Information
ATtiny48
Speed (MHz) Power Supply Ordering Code ATtiny48-AU ATtiny48-MMU ATtiny48-MU ATtiny48-PU Package(1) 28M1 32M1-A 28P3 Operational Range Industrial (-40°C 85°C)
Note:
This device also supplied wafer form. Please contact your local Atmel sales office detailed ordering information minimum quantities. Pb-free packaging alternative, complies European Directive Restriction Hazardous Substances (RoHS directive).Also Halide free fully Green. Maximum frequency. Figure 22-1 page 200.
Package Type 28M1 32M1-A 28P3 32-lead, Thin (1.0 Plastic Quad Flat Package (TQFP) 28-pad, body, Lead Pitch 0.45 Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 32-pad, body, Lead Pitch 0.50 Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 28-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
ATtiny88
Speed (MHz) Power Supply Ordering Code ATtiny88-AU ATtiny88-MMU ATtiny88-MU ATtiny88-PU Package(1) 28M1 32M1-A 28P3 Operational Range Industrial (-40°C 85°C)
Note:
This device also supplied wafer form. Please contact your local Atmel sales office detailed ordering information minimum quantities. Pb-free packaging alternative, complies European Directive Restriction Hazardous Substances (RoHS directive).Also Halide free fully Green. Maximum frequency. Figure 22-1 page 200.
Package Type 28M1 32M1-A 28P3 32-lead, Thin (1.0 Plastic Quad Flat Package (TQFP) 28-pad, body, Lead Pitch 0.45 Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 32-pad, body, Lead Pitch 0.50 Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 28-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8008BS-AVR-06/08
Packaging Information
IDENTIFIER
0°~7°
COMMON DIMENSIONS (Unit Measure SYMBOL 0.05 0.95 8.75 6.90 8.75 6.90 0.30 0.09 0.45 1.00 9.00 7.00 9.00 7.00 0.80 1.20 0.15 1.05 9.25 7.10 9.25 7.10 0.45 0.20 0.75 Note Note NOTE
Notes:
This package conforms JEDEC reference MS-026, Variation ABA. Dimensions include mold protrusion. Allowable protrusion 0.25 side. Dimensions maximum plastic body size dimensions including mold mismatch. Lead coplanarity 0.10 maximum.
10/5/2001 2325 Orchard Parkway Jose, 95131 TITLE 32A, 32-lead, Body Size, Body Thickness, Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) DRAWING REV.
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
28M1
SIDE VIEW
VIEW
0.45
COMMON DIMENSIONS (Unit Measure SYMBOL 0.80 0.00 0.17 0.90 0.02 0.22 0.20 3.95 2.35 3.95 2.35 4.00 2.40 4.00 2.40 0.45 0.35 0.00 0.20 0.40 0.45 0.08 4.05 2.45 4.05 2.45 1.00 0.05 0.27 NOTE
0.20
BOTTOM VIEW
Note:
terminal Laser-marked Feature.
9/7/06 2325 Orchard Parkway Jose, 95131 TITLE 28M1, 28-pad, Body, Lead Pitch 0.45 Exposed Pad, Micro Lead Frame Package (MLF) DRAWING 28M1 REV.
8008BS-AVR-06/08
28P3
SEATING PLANE
PLACES)
SYMBOL
COMMON DIMENSIONS (Unit Measure 0.508 34.544 7.620 7.112 0.381 1.143 0.762 3.175 0.203 4.5724 34.798 8.255 7.493 0.533 1.397 1.143 3.429 0.356 10.160 Note Note NOTE
Note:
Dimensions include mold Flash Protrusion. Mold Flash Protrusion shall exceed 0.25 (0.010").
2.540
09/28/01 2325 Orchard Parkway Jose, 95131 TITLE 28P3, 28-lead (0.300"/7.62 Wide) Plastic Dual Inline Package (PDIP) DRAWING 28P3 REV.
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
32M1-A
SIDE VIEW
VIEW
0.08
COMMON DIMENSIONS (Unit Measure 0.80 0.90 0.02 0.65 0.20 0.18 4.90 4.70 2.95 4.90 4.70 2.95 0.23 5.00 4.75 3.10 5.00 4.75 3.10 0.50 0.30 0.20 0.40 0.50 0.60 0.30 5.10 4.80 3.25 5.10 4.80 3.25 1.00 0.05 1.00 NOTE
SYMBOL
Notch (0.20
BOTTOM VIEW
Note: JEDEC Standard MO-220, Fig. (Anvil Singulation), VHHD-2.
5/25/06 2325 Orchard Parkway Jose, 95131 TITLE 32M1-A, 32-pad, Body, Lead Pitch 0.50 3.10 Exposed Pad, Micro Lead Frame Package (MLF) DRAWING 32M1-A REV.
8008BS-AVR-06/08
Errata
Errata ATtiny48
errata.
Errata ATtiny88
errata.
ATtiny48/88
8008BS-AVR-06/08
ATtiny48/88
Datasheet Revision History
Please note that page references this section refer current revision this document.
Rev. 8008B 06/08
Updated introduction "I/O-Ports" page Updated Characteristics(1)" page 198. Added "Typical Charateristics" page 212.
Rev. 8008A 06/08
Initial revision.
8008BS-AVR-06/08
Headquarters
Atmel Corporation 2325 Orchard Parkway Jose, 95131 Tel: 1(408) 441-0311 Fax: 1(408) 487-2600
International
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Product Contact
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Literature Requests www.atmel.com/literature
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8008BS-AVR-06/08

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