Description ATA6824 designed motor control application automotive

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Description ATA6824 designed motor control application automotive

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Direction-controlled Driving Four Externally-powered NMOS Transistors High Temperature Capability 200° Junction Programmable Dead Time Included Avoid Peak Currents Within H-bridge Integrated Charge Pump Provide Gate Voltages High-side Drivers Supply Gate External Battery Reverse Protection NMOS 5V/3.3V Regulator Current Limitation Function Reset Derived From 5V/3.3V Regulator Output Voltage Programmable Window Watchdog Battery Overvoltage Protection Battery Undervoltage Management Overtemperature Warning Protection (Shutdown) High Voltage Serial Interface Communication QFN32 Package
Description
ATA6824 designed motor control application automotive high temperature environment like mechatronic assemblies vicinity engine, e.g. turbo charger. With maximum junction temperature 200°C, ATA6824 suitable applications with ambient temperature 150°C. includes driver stages control external power MOSFETs. external microcontroller provides direction signal frequency. operation, high-side switches permanently while low-side switches activated frequency. ATA6824 contains voltage regulator supply microcontroller; input VMODE output voltage 3.3V respectively. on-chip window watchdog timer provides pin-programmable time window. watchdog internally trimmed accuracy with maximum data rate kBaud.
High Temperature H-bridge Motor Driver ATA6824
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Figure 1-1.
Block Diagram
CVRES
VRES CPLO RGATE RGATE RGATE RGATE PGND Charge Pump CPIH Regulator Supervisor timer Driver Driver Driver Driver VBAT
VBAT
PBAT VINT Vint Regulator
Logic Control
Oscillator
CVINT
timer
VBAT VBATSW Regulator Serial Interface
RRWD
Bandgap
CSIO
VMODE
/RESET
CVCC
Battery
Microcontroller
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Configuration
Figure 2-1. Pinning QFN32
VBATSW VBAT PGND PBAT VMODE VINT /RESET Atmel ATA6824 ZZZZZ-AL CPLO CPHI VRES
Note:
ATA6824 ZZZZZ
Date code Year above 2000, week number) Product name Wafer number Assembly sub-lot number
Table 2-1.
Description
Symbol VMODE VINT /RESET VRES Function Selector interface logic voltage level Blocking capacitor nF/10V/X7R Resistor defining watchdog interval combination adjust cross conduction time Reset signal microcontroller Watchdog trigger signal Ground chip core High Voltage (HV) serial interface Transmit signal serial interface from microcontroller Defines rotation direction motor input controls motor speed Test connected Receive signal from serial interface microcontroller Diagnostic output Diagnostic output Diagnostic output Source voltage H-bridge, high-side Gate voltage H-bridge, high-side Source voltage H-bridge, high-side Gate voltage H-bridge, high-side Gate voltage reverse protection NMOS, blocking capacitor nF/25V/X7R
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Table 2-1.
Description (Continued)
Symbol CPHI CPLO PBAT PGND VBAT VBATSW Function Charge pump capacitor nF/25V/X7R Blocking capacitor nF/25V/X7R Power supply (after reverse protection) charge pump H-bridge Gate voltage H-bridge, low-side Gate voltage H-bridge, low-side Power ground H-bridge charge pump 5V/100 supply microcontroller, blocking capacitor µF/10V/X7R Supply voltage core (after reverse protection) PMOS switch from VBAT Test connected
General Statement Conventions
Parameter values given without tolerances indicative only tested production Parameters given with tolerances without parameter number first column parameter table "guaranteed design" (mainly covered measurement other specified parameters). These parameters tested production. tolerances given knowledge parameter tolerances important application lowest power supply voltage named voltage specifications referred otherwise stated Sinking current means that current flowing into (value positive) Sourcing current means that current flowing (value negative)
Related Documents
Qualification integrated circuits according Atmel® procedure based AEC-Q100 AEC-Q100-004 JESD78 (Latch-up) S5.1-1998 801-2 (only information regarding requirements PCB)
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Application
General Remark
This chapter describes principal application which ATA6824 designed. Because Atmel cannot considered understand fully aspects system, application environment, warranties fitness particular purpose given.
Table 4-1.
Component CVINT CVCC CVRES RRWD CSIO
Typical External Components (See also Figure page
Function Blocking capacitor VINT Blocking capacitor Cross conduction time definition capacitor Cross conduction time definition resistor Blocking capacitor Charge pump capacitor Reservoir capacitor Watchdog time definition resistor Filter capacitor serial interface Value 10V, 10V, Typical 100V, Typical 25V, 25V, 25V, Typical Typical 100V Tolerance
Functional Description
5.1.1
Power Supply Unit with Supervisor Functions
Power Supply supplied reverse-protected battery voltage. prevent from destruction, proper external protection circuitry added. recommended least capacitor combination storage caps behind reverse protection circuitry closed VBAT (see Figure page internal low-power drop regulator (VINT), stabilized external blocking capacitor, provides necessary low-voltage supply internal blocks except digital pins. This voltage also needed wake-up process. low-power band reference trimmed used bigger regulator, too. internal blocks supplied internal regulator.
Note: internal supply voltage VINT must used other supply purpose!
Nothing inside except logic interface microcontroller supplied 5V/3.3V regulator. power-good comparator checks output voltage VINT regulator keeps whole chip reset long voltage low. There high-voltage switch which brings battery voltage VBATSW measurement purposes. This switch switched HIGH stays case watchdog reset. signal used switch external voltage regulators, etc.
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5.1.2
Voltage Supervisor This block intended protect external power transistors against overvoltage battery level manage undervoltage Function: case both overvoltage alarm (VTHOV) undervoltage alarm (VTHUV) external NMOS motor bridge transistors will switched off. failure state will flagged DG2. other actions will carried out. voltage supervision block connected VBAT filtered first-order pass with corner frequency typical kHz.
5.1.3
Temperature Supervisor There temperature sensor integrated on-chip prevent from overheating failure external circuitry protect external NMOSFET transistors. case detected overtemperature (180°C), diagnostic will switched signalize this event microcontroller. should undertake actions reduce power dissipation case detected overtemperature (200°C), regulator drivers including serial interface will switched immediately /RESET will LOW. Both temperature thresholds correlated. absolute tolerance ±15°C there built-in hysteresis about 10°K avoid fast oscillations. After cooling down below 170°C threshold; will into Active mode.
5V/3.3V Regulator
5V/3.3V regulator fully integrated on-chip. requires only ceramic capacitor stability current capability. Using VMODE pin, output voltage selected either 3.3V. Switching output voltage during operation intended supported. VMODE must hard-wired either VINT 3.3V. logic HIGH level microcontroller interface will adapted regulator voltage. output voltage accuracy general ±3%; mode with VVBAT limited prevent destruction current delivered regulator limited maximum delivered voltage will break down reset occur. Please note that this regulator main heat source chip. maximum output current maximum battery voltage high ambient temperature only guaranteed mounted efficient heat sink. power-good comparator checks output voltage regulator keeps external microcontroller reset long voltage low.
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Figure 5-1. Correlation between Output Voltage Reset Threshold
5.15V 4.9V VCC1 4.85V VtHRESH 4.1V
VCC1-VtHRESH VCC1 VtHRESH
voltage difference between regulator output voltage upper reset threshold voltage bigger than
Reset Watchdog Management
timing basis watchdog provided trimmed internal oscillator. period TOSC adjustable external resistor RWD. watchdog expects triggering signal rising edge) from microcontroller input within period time window TWD.
Figure 5-2.
Timing Diagram Watchdog Function
tres tresshort
/RESET
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5.3.1
Timing Sequence example, with external resistor following typical parameters watchdog. TOSC 12.32 12.1 9.61 16.88 ±10% times tres fixed values with tolerance 10%. After ramp-up battery voltage (power-on reset), regulator switched reset output, /RESET, stays time tres (typically ms), then switches high. initial lead time (typically setups controller) watchdog waits rising edge start normal window watchdog sequence. rising edge detected, watchdog will reset microcontroller tres wait rising edge Times (close window) (open window) form window watchdog sequence. avoid receiving reset from watchdog, triggering signal from microcontroller must timeframe 9.61 trigger event will restart watchdog sequence. Figure 5-3. versus
(ms)
triggering fails, /RESET will pulled ground shortened reset time typically watchdog start sequence similar power-on reset. internal oscillator trimmed tolerance ±10%. This means that also vary ±10%. following calculation shows worst case calculation watchdog period which microcontroller provide. t1min 0.90 10.87 t1max 1.10 13.28 t2min 0.90 8.65ms, t2max 1.10 10.57 Twdmax t1min t2min 10.87 8.65 19.52 Twdmin t1max 13.28 16.42 ±3.15 (±19.1%) Figure page shows typical watchdog period depending value external resistor ROSC. reset will active VtHRESx; level VtHRESx realized with hysteresis (HYSRESth).
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High Voltage Serial Interface
bi-directional interface implemented data transfer between hostcontroller local microcontroller (SIO). transceiver consists side driver (1.2V with slew rate control, wave shaping, current limitation, high-voltage comparator followed debouncing unit receiver. case active reset shown /RESET switched low. 5.4.1 Transmit Mode During transmission, data will transferred driver generate signal SIO. pull-down resistor included. minimize electromagnetic emission line, driver integrated slew rate control wave-shaping unit. Transmission will interrupted following cases: Thermal shutdown active Figure 5-4. Definition Timing Parameters
tBit
(input transmitting Node)
tBit
tBit
tBus_dom(max)
tBus_rec(min)
THRec(max)
(Transceiver supply transmitting node)
Thresholds receiving node Signal
THDom(max) Thresholds receiving node
THRec(min) THDom(min)
tBus_dom(min)
(output receiving Node
tBus_rec(max)
trx_pdf(1)
(output receiving Node
trx_pdr(1)
trx_pdr(2)
trx_pdf(2)
recessive level generated from integrated pull-up resistor series with active diode. This diode prevents reverse current VBUS during differential voltage between VSUP (VBUS VSUP).
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5.5.1
Control Inputs
Logical input control direction external motor controlled internal pull-down resistor included.
5.5.2
Logical input information delivered external microcontroller. Duty cycle frequency this passed through H-bridge. internal pull-down resistor included.
Table 5-1.
Status Depending Control Inputs Detected Failures
Driver Stage External Power /PWM /PWM Standby mode Motor forward Motor reverse Comments
Control Inputs
internal signal high when least valid trigger been accepted (SYNC VBAT inside specified range charge pump reached minimum voltage (CPOK device overheated (OT2 case short circuit, appropriate transistor switched after debounce time about order avoid cross current through bridge, cross conduction timer implemented. time constant programmable means combination.
Table 5-2.
CPOK Note:
Status Diagnostic Outputs
Device Status Diagnostic Outputs Charge pump failure Overtemperature warning Overvoltage Undervoltage Short circuit Comments
represents: don't care effect) OT1: Overtemperature warning Overvoltage VBAT Undervoltage VBAT Short circuit CPOK: Charge pump
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Regulator
regulator used generate gate voltage low-side driver. output voltage will used input charge pump, which generates gate voltage high-side driver. purpose regulator limit gate voltage external power transistors 12V. needs ceramic capacitor stability. output voltage reduced supply voltage VBAT falls below 12V.
Charge Pump
integrated charge pump needed supply gates external power transistors. needs shuffle capacitor reservoir capacitor Without load, output voltage reservoir capacitor VBAT plus charge pump clocked with dedicated internal oscillator KHz. charge pump designed reach good level.
Thermal Shutdown
There thermal shutdown block implemented. With rising junction temperature, first warning level will reached 180°C. this point stays fully functional warning will sent microcontroller. junction temperature 200°C regulator will switched reset occurs.
H-bridge Driver
includes push-pull drivers control external power NMOS used high-side drivers push-pull drivers control external power NMOS used low-side drivers. drivers able used with standard logic-level power NMOS. drivers high-side control charge pump voltage supply gates with voltage above battery voltage level. low-side drivers supplied directly. possible control external load (motor) forward reverse direction (see Table page 10). duty cycle controls speed. duty cycle 100% possible both directions.
5.9.1
Cross Conduction Time prevent high peak currents H-bridge, non-overlapping phase switching external power NMOS realized. external combination defines cross conduction time following way: (µs) 0.41 (nF) (tolerance: ±0.15 combination charged switching level internal comparator start level. resistor must greater than should close possible value capacitor material recommended. time measurement triggered signal crossing level.
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Figure 5-5.
Timing Drivers
tLxHL tLxf tLxLH tLxr
tHxLH tHxr tHxHL tHxf
delays tHxLH tLxLH include cross conduction time tCC.
5.10
Short Circuit Detection
detect short H-bridge circuitry, internal comparators detect voltage difference between source drain external power NMOS. transistors switched source-drain voltage difference higher than value with tolerances) time (typically signal (short circuit) will drivers will switched immediately. diagnostic will "H". With next transition PWM, will cleared corresponding drivers, depending pin, will switched again. There PBAT supervision block implemented detect possible voltage drop PBAT during short circuit. voltage PBAT falls under VSCPB (5.6V with tolerances) time drivers will switched immediately will "H". will cleared above.
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Absolute Maximum Ratings
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Description Ground Power ground Reverse protected battery voltage Reverse protected battery voltage Digital output Digital output 4.9V output, external blocking capacitor Cross conduction time capacitor/resistor combination Digital input coming from microcontroller Watchdog timing resistor Digital input direction control Digital input control Test mode regulator output Digital input output, external blocking capacitor Digital output Digital input Serial interface data Source external high-side NMOS Gates external low-side NMOS Gates external high-side NMOS Charge pump Charge pump Charge pump output Switched VBAT Power dissipation Storage temperature Soldering temperature (10s) Notes: VVBAT 13.5V additionally limited external thermal resistance Name PGND VBAT PBAT /RESET DG1, DG2, VINT VMODE CPLO CPHI VRES VBATSW Ptot STORE SOLDERING -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3
+0.3 VVCC VVCC +5.5 VVCC VVCC VVCC VVCC VVCC +5.5 VVINT VVCC VVCC VVBAT VPBAT VVRES VVBAT
Unit
VPGND -0.3 -0.3 -0.3 -0.3
+200
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Thermal Resistance
Parameters Thermal resistance junction heat slug Thermal resistance junction ambient when heat slug soldered Symbol Rthjc Rthja Value Unit
Operating Range
operating conditions define limits functional operation parametric characteristics device. Functionality outside these limits implied unless otherwise stated explicitly. Parameters Operating supply voltage Operating supply voltage
Symbol VVBAT1 VVBAT2 VVBAT3 VVBAT4 VVBAT5
+200 +150
Unit
Operating supply voltage(3) Operating supply voltage(4) Operating supply voltage Normal functionality Normal functionality, overtemperature warning Drivers switched OFF, regulator Note: Full functionality
Junction temperature range under bias
H-bridge drivers switched (undervoltage detection) H-bridge drivers switched off, 5V/3.3V regulator with reduced parameters, RESET works correctly H-bridge drivers switched off, regulator working, RESET correct H-bridge drivers switched
Noise Surge Immunity
Parameters Conducted interferences Interference suppression (Human Body Model) (Charge Device Model) Note: Test pulse Vvbmax Test Conditions 7637-1 IEC-CISPR25 STM5.3. Value Level 4(1) Level 500V
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Electrical Characteristics
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol Power Supply Supervisor Functions IVBAT1 Current consumption VBAT VVBAT 13.5V(1) Internal power supply VINT 4.94 1.235 Band voltage Overvoltage threshold VTHOV 19.8 22.3 VBAT Overvoltage threshold VTOVhys hysteresis VBAT Undervoltage threshold VTHUV VBAT Measured during Undervoltage threshold VTUVhys qualification only hysteresis VBAT resistance VBAT RON_VBATSW VVBAT 13.5V switch 5V/3.3V Regulator VVBAT 40V, Regulated output voltage 4.85 (3.2) 5.15 (3.4) VCC1 Iload VVBAT 40V, 2.1a Regulated output voltage Iload VCC1 4.85 (3.2) 5.15 (3.4) 125°C VVBAT Regulated output voltage 4.75 (3.2) 5.25 (3.4) VCC2 Iload line Line regulation Iload regulation load Load regulation Iload regulation Output current limitation VVBAT IOS1 Serial inductance CVCC including Serial resistance CVCC including (2), CVCC Blocking HIGH threshold VMODE VMODE 2.10 threshold VMODE VMODE Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
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Electrical Characteristics (Continued)
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol Regulator PBAT Regulated output voltage 11.9 Imax PBAT Regulated output voltage Imax Reset Watchdog threshold voltage VMODE (3.25) VtHRESH level /RESET (VMODE "L") Tracking reset VMODE 4.1a thres-hold with regulated VVCC1-VtHRESH (70) (VMODE "L") output voltage VMODE threshold voltage VtHRESL (2.86) level /RESET (VMODE "L") Hysteresis /RESET VMODE HYSRESth (220) level (VMODE "L")(4) Length pulse tres 6800 /RESET Length short pulse tresshort /RESET Wait first 6800 trigger Time VtHRESL tdelayRESL before activating /RESET Resistor defining internal bias currents watchdog RRWD oscillator Watchdog oscillator RRWD TOSC 11.09 13.55 period Watchdog oscillator 4.10 period with internal TOSC_start resistor Watchdog input 4.11 VILWD VVCC low-voltage threshold Watchdog input 4.12 VIHWD VVCC high-voltage threshold Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
T100 T100 T100
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Electrical Characteristics (Continued)
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol Hysteresis watchdog 4.13 VhysWD input voltage threshold 4.14 Close window TOSC 4.15 Open window TOSC Output low-voltage VOLRES 4.16 IOLRES /RESET Internal pull-up resistor 4.17 RPURES /RESET High Voltage Serial Interface Normal mode; Low-level output current ILRX VSIO 0.4V Normal mode; VSIO VBAT IHRX High-level output current 0.4V Driver recessive output VSIOrec VTXD ISIO VBAT voltage Driver dominant voltage VVAT 7.3V V_LoSUP Rload VBUSdom_DRV_LoSUP Driver dominant voltage VVAT V_HiSUP Rload VBUSdom_DRV_HiSUP Driver dominant voltage VVAT 7.3V V_LoSUP_1k Rload 1000 VBUSdom_DRV_LoSUP Driver dominant voltage VVAT V_HiSUP_1k_ Rload 1000 VBUSdom_DRV_HiSUP serial diode Pull resistor RLIN mandatory Current limitation VBUS VBAT_max IBUS_LIM Input leakage current Input leakage current receiver including driver 5.10 ISIO_PAS_dom pull-up resistor VSIO VBAT specified Driver Leakage current VBAT 5.11 ISIO_PAS_rec recessive VSIO VSIO VBAT Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
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Electrical Characteristics (Continued)
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol Leakage current ground loss Control unit disconnected GNDDevice ISIO_NO_gnd 5.12 from ground VBAT =12V Loss local ground must VSIO affect communication residual network Node sustain current that flow VBAT disconnected 5.13 under this condition. VSUP_Device ISIO must remain operational VSIO under this condition Center receiver VSIO_CNT VSIO_CNT 5.14 0.475 0.525 (Vth_dom Vth_rec)/2 threshold 5.15 Receiver dominant state VSIOdom VSIOrec 5.16 Receiver recessive state 5.17 Receiver input hysteresis VHYS Vth_rec Vth_dom VSIOhys 0.175 THRec(max) 0.744 VBAT THDom(max) 0.581 VBAT 5.18 Duty cycle 0.380 VBAT 7.3V tBit tbus_rec(min) tBit(11) THRec(min) 0.422 VBAT THDom(min) 0.284 VBAT 5.19 Duty cycle 0.600 VBAT 7.3V tBit tbus_rec(max) tBit(11) Propagation delay 5.20 trx_pd trec_pd max(trx_pdr, trx_pdf)(11) receiver Symmetry receiver trx_sym 5.21 trx_sym trx_pdr trx_pdf(11) propagation delay Control Inputs DIR, PWM, Input low-voltage VVCC threshold Input high-voltage VVCC threshold Hysteresis Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
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Electrical Characteristics (Continued)
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol Pull-down resistor DIR, PWN, Rise/fall time Charge Pump VVBAT Charge pump voltage Load Load VVBAT Charge pump voltage Period charge pump T100 oscillator load current Load IVGCPz without load load current with Load IVGCP load H-bridge Driver Low-side driver HIGH VLxH output voltage ON-resistance sink RDSON_LxL, stage pins ON-resistance source RDSON_LxH, stage pins Output peak current ILxL, pins switched Output peak current ILxH, pins switched -100 HIGH Pull-down resistance RPDLx pins ON-resistance sink RDSON_HxL, stage pins RDSON_HxH, ON-resistance source VVBAT stage pins VVBAT 13.5V Output peak current IHxL, VVBAT pins switched VVBAT Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
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Electrical Characteristics (Continued)
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol VVBAT 13.5V Output peak current IHxH, -100 8.10 VVBAT pins switched HIGH VVBAT Static high-side switch VHxL, 8.11 output low-voltage pins Static high-side switch VVBAT VVBAT 8.12 output high-voltage pins VHxHstat1(7) (PWM static) Sink resistance between RHxsleep 8.13 ground Sleep mode Dynamic Parameters Dynamic high-side switch VVBAT VVBAT VHxHdyn1 8.14 output high-voltage pins fPWM Propagation delay time, Figure page 8.15 low-side driver from high tLxHL VVBAT 13.5V Propagation delay time, 8.16 low-side driver from tLxLH high VVBAT 13.5V tLxf 8.17 Fall time low-side driver CGx=5 8.18 Rise time low-side driver tLxr Propagation delay time, Figure page 8.19 high-side driver from high tHxHL VVBAT 13.5V Propagation delay time, 8.20 high-side driver from tHxLH high VVBAT 13.5V, 8.21 Fall time high-side driver tHxf 8.22 Rise time high-side driver tHxr 8.23 Cross conduction time 8.24 External resistor 8.25 External capacitor Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
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ATA6824
Electrical Characteristics (Continued)
parameters given valid VBAT -40°C ambient 150°C unless stated otherwise. Parameters Test Conditions Symbol switching 8.26 RONCC transistor 0.653 0.667 0.68 Switching level 8.27 Vswtcc comparator VVCC VVCC VVCC Short circuit detection 8.28 voltage Short circuit detection (10) 8.29 time Diagnostic Outputs DG1, DG2, level output current 0.4V(6) High level output current 0.4V(6) Type: 100% tested, 100% correlation tested, Characterized samples, Design parameter Notes: DIR, high material recommended higher values, stability zero load guaranteed Tested during qualification only Value depends T100; function tested with digital test pattern Tested during characterization only Supplied charge pump section "Cross Conduction Time" Voltage between source-drain external switching transistors active case short-circuit message will never generated switch-on time Figure page "Definition Timing Parameters" Unit Type*
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Ordering Information
Extended Type Number ATA6824-PHQW Package QFN32 Remarks Pb-free
Package Information
Package: Exposed Dimensions indicated tolerances 0.05 0.9±0.1
0.05-0.05
technical drawings according specifications
0.65 nom. 4.55
Drawing-No.: 6.543-5097.01-4 Issue: 24.02.03
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Revision History
Please note that following page numbers referred this section refer specific revision mentioned, this document. Revision History Section "5V/3.3V Regulator" pages changed Section "High Voltage Serial Interface" page changed Section "Electrical Characteristics" numbers 4.1a page changed datasheet template Section "Description" page changed Figure "Block Diagram" page changed Figure "Pinning QFN32" page changed Table "Pin Description" pages changed Table title Table renamed Section 5.1.1 "Power Supply" page changed Section 5.1.3 "Temperature Supervisor" page changed Section "Reset Watchdog Management" page changed Section "High Voltage Serial Interface" page changed Section "Absolute Maximum Ratings" page changed Section "Operating Range" page changed Section "Noise Surge Immunity" page changed Section "Electrical Characteristics" pages changed
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4931E-AUTO-01/08

Description ATA6824 designed motor control application automotive

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