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PROs Ai1003 Vertical Clock Driver Camera System Descrip


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PROs
PROs
Ai1003
Vertical Clock Driver Camera System
Description
Ai1003 vertical clock driver with levels output voltage processed standard CMOS
Configuration
VP1(+15V) VSUB VSS(-8.5V) VP0(0V)
XSUB
Feature
Levels output voltage, 15V, -8.5V 3.3V input voltage
XSG1 XSG2
TSSOP View
Absolute Maximum Ratings
Rating Parameter Symbol
Supply Voltage Input Voltage Output Voltage Operating Ambient Temperature Storage Temperature VSUB -0.3 VSS-0.3 -0.3 VSS-0.3 VSS-0.3
Unit
VSS+30 VP1+0.3 VP1+0.3 VP1+0.3
NOTE Stress above those listed under "Absolute Maximum Rating" cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods time affect device reliability.
Ai1003
VSS(-8.5V) VP1(+15V)
Block Diagram
VSUB
VP0(0V)
XSG2
XSUB
Logic Truth Table
Input
XV1, XSG1, XV2, XSUB V1,3
Output
V2,4 VSUB
high impedance.
Description
Symbol
XSUB XSG1 XSG2 VSUB
Description
Input signal control VSUB Input signal control Input signal control Input signal control Input signal control Input signal control Input signal control Output signal level VP0, VSS) Output signal level VP1, VP0, VSS) Power supply (0V) Output signal level VP1, VP0, VSS) Output signal level VP0, VSS) Power supply (-8.5V) Output signal level VP1, VSS) Power supply (+15V)
Ai1003
Characteristics
(TA=25, -8.5V, =GND, 15V)
Value Parameter Symbol
Power Supply Supply Current Input Voltage Input Current IOM1 Output Current IOM2 IOSL IOSH 13.5 14.5 -9.5
Unit
-8.5 -4.2
Condition
15.5 -7.5 VIN=0~5V (*2) V1~4 -8.0V V1~4 -0.5V V1,3 -0.5V V1,3 -0.5V VSUB -8.0V VSUB 14.5V (*1)
(*1) Refer measurement circuit. Shutter speed 1/40s (*2) XV1~4, XSG1,2 XSUB pins
Ai1003
Measurement Circuit
1500pF 3300pF
500pF
VP1(15V)
VSS(- 8.5V)
Ai1003
Timing Generator
Ai1003
Characteristics
(TA=25, -8.5V, =GND, 15V)
Value Parameter Symbol
TPLM TPMH Delay Time TPLH TPML TPHM TPHL TTLM TTMH Transition Time TTLH TTML TTHM TTHL Output Noise Voltage VCLH, VCLL VCMH, VCML
Unit
Condition
Load (*1) (*1) (*1) (*1) (*1) (*1) (*1) (*2)
(*1) Refer Timing Diagram (*2) Refer Noise Diagram
Noise Diagram
VCMH VCML VCLH VCLL
Ai1003
Timing Diagram
XSG1,
TPMH TPLM TTLM
TPHM TTHM TTML
TTMH
TPML
V1,3
TPLM
TTHL
TTLM
TPHL
V2,4
XSUB
TTHL TPLH TTLH
TPHL
VSUB
Ai1003
Application Circuit
(15V) 8.5V)
XSUB XSG1 XSG2
VSUB
0.1F
1N4148 VSUB
XSUB XSG1 XSG2
100K
Warning When voltage biased, must keep this flow. don't keep this flow, Negative voltage applied image sensor's SUB.
(VP1) (VP0
10ms
8.5V (VSS
Ai1003
Package Dimension Ai1003 TSSOP
(4X)
NOTE:
PACKAGE BODY SIZES EXCLUDE MOLD FLASH PROTRUSIONS GATE BURRS TOLERANCE ±0.1mm UNLESS OTHERWISE SPECIFIED COPLANARITY 0.1mm CONTROLLOMG DIMENSION MILLIMETER. CONVERTED INCH DIMENSIONS NECESSARILY EXACT. FOLLOWED FROM JEDEC MO-153
DIMENSIONS MILLIMETERS SYMBOLS 0.05 0.80 0.19 0.09 4.90 6.20 4.30 0.45 1.00 5.00 6.40 4.40 0.65 0.60 1.20 0.15 1.05 0.30 0.20 5.10 6.60 4.50 0.75 0.10
DIMENSIONS INCHES 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.018 0.039 0.197 0.252 0.173 0.026 0.024 0.048 0.006 0.041 0.012 0.008 0.201 0.260 0.177 0.030 0.004

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