SCES554C MARCH 2004 REVISED FEBRUARY 2007 Available Texas Instrum
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SN74LVC2G38 DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
SCES554C MARCH 2004 REVISED FEBRUARY 2007
Available Texas Instruments NanoFreePackage Supports Operation Inputs Accept Voltages Power Consumption, 10-µA ±24-mA Output Drive Typical VOLP (Output Ground Bounce) <0.8 25°C
PACKAGE (TOP VIEW)
Typical VOHV (Output Undershoot) 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds JESD Class Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
PACKAGE (BOTTOM VIEW)
PACKAGE (TOP VIEW)
mechanical drawings dimensions.
DESCRIPTION/ORDERING INFORMATION
SN74LVC2G38 designed 1.65-V 5.5-V operation. This device dual two-input NAND buffer gate with open-drain outputs. performs Boolean function positive logic. NanoFreepackage technology major breakthrough packaging concepts, using package. This device fully specified partial-power-down applications using Ioff. Ioff circuitry disables outputs, preventing damaging current backflow through device when powered down. ORDERING INFORMATION
PACKAGE NanoFree- WCSP (DSBGA) Reel 3000 0.23-mm Large Bump (Pb-free) -40°C 85°C SSOP VSSOP Reel 3000 Reel 3000 Reel ORDERABLE PART NUMBER SN74LVC2G38YZPR SN74LVC2G38DCTR SN74LVC2G38DCUR SN74LVC2G38DCUT TOP-SIDE MARKING _D7_ C38_ C38_
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. DCT: actual top-side marking three additional characters that designate year, month, assembly/test site. DCU: actual top-side marking additional character that designates assembly/test site. YZP: actual top-side marking three preceding characters denote year, month, sequence code, following character designate assembly/test site. identifier indicates solder-bump composition SnPb, Pb-free).
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. NanoFree trademark Texas Instruments.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 2004-2007, Texas Instruments Incorporated
SN74LVC2G38 DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
SCES554C MARCH 2004 REVISED FEBRUARY 2007
FUNCTION TABLE (EACH GATE)
INPUTS OUTPUT
LOGIC DIAGRAM (POSITIVE LOGIC)
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Supply voltage range Input voltage range Voltage range applied output high-impedance power-off state Voltage range applied output high Input clamp current Output clamp current Continuous output current Continuous current through package Tstg Package thermal impedance Storage temperature range package package state -0.5 -0.5 -0.5 -0.5 ±100 °C/W UNIT
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. input output negative-voltage ratings exceeded input output current ratings observed. value provided recommended operating conditions table. package thermal impedance calculated accordance with JESD 51-7.
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SN74LVC2G38 DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
SCES554C MARCH 2004 REVISED FEBRUARY 2007
Recommended Operating Conditions
Supply voltage
Operating Data retention only 1.65 1.95 High-level input voltage 1.65 1.95 Low-level input voltage Input voltage Output voltage 1.65 Low-level output current 0.15 Input transition rise fall rate Operating free-air temperature 1.65 0.65
UNIT
0.35 ns/V
unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER Ioff inputs GND, input typical values 25°C. Other inputs TEST CONDITIONS 1.65 1.65 1.65 0.45 0.55 0.55 UNIT
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SN74LVC2G38 DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
SCES554C MARCH 2004 REVISED FEBRUARY 2007
Switching Characteristics
over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER FROM (INPUT) (OUTPUT) 0.15 UNIT
Switching Characteristics
over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER FROM (INPUT) (OUTPUT) 0.15 UNIT
Operating Characteristics
25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT
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SN74LVC2G38 DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
SCES554C MARCH 2004 REVISED FEBRUARY 2007
PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN)
VLOAD From Output Under Test (see Note Open TEST tPZL (see Notes tPLZ (see Notes tPHZ/tPZH VLOAD VLOAD VLOAD
LOAD CIRCUIT INPUTS 0.15 tr/tf VCC/2 VCC/2 VCC/2 VLOAD 0.15 0.15 Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS Output Waveform (see Note Output Waveform VLOAD (see Note tPZH VOLTAGE WAVEFORMS SETUP HOLD TIMES tPZL tPLZ VLOAD/2 tPHZ Data Input
Output Control
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output low, except when disabled output control. Waveform output with internal conditions such that output high, except when disabled output control. input pulses supplied generators have following characteristics: MHz, outputs measured time, with transition measurement. Because this device open-drain outputs, tPLZ tPZL same tPD. tPZL measured tPLZ measured parameters waveforms applicable devices.
Figure Load Circuit Voltage Waveforms
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SN74LVC2G38 DUAL 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS
SCES554C MARCH 2004 REVISED FEBRUARY 2007
PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN)
VLOAD From Output Under Test (see Note Open TEST tPZL (see Notes tPLZ (see Notes tPHZ/tPZH VLOAD VLOAD VLOAD
LOAD CIRCUIT INPUTS 0.15 tr/tf VCC/2 VCC/2 VCC/2 VLOAD 0.15 0.15 Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS Output Waveform (see Note Output Waveform VLOAD (see Note tPZH VOLTAGE WAVEFORMS SETUP HOLD TIMES tPZL tPLZ VLOAD/2 tPHZ Data Input
Output Control
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output low, except when disabled output control. Waveform output with internal conditions such that output high, except when disabled output control. input pulses supplied generators have following characteristics: MHz, outputs measured time, with transition measurement. Because this device open-drain outputs, tPLZ tPZL same tPD. tPZL measured tPLZ measured parameters waveforms applicable devices.
Figure Load Circuit Voltage Waveforms
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PACKAGE OPTION ADDENDUM
5-Dec-2008
PACKAGING INFORMATION
Orderable Device SN74LVC2G38DCTR SN74LVC2G38DCTRE4 SN74LVC2G38DCUR SN74LVC2G38DCURE4 SN74LVC2G38DCURG4 SN74LVC2G38DCUT SN74LVC2G38DCUTE4 SN74LVC2G38DCUTG4 SN74LVC2G38YZPR
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type DSBGA
Package Drawing
Pins Package Plan 3000 Green (RoHS Sb/Br) 3000 Green (RoHS Sb/Br) 3000 Green (RoHS Sb/Br) 3000 Green (RoHS Sb/Br) 3000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
Lead/Ball Finish NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU SNAGCU
Peak Temp Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
3000 Green (RoHS Sb/Br)
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
PACKAGE MATERIALS INFORMATION
4-Dec-2008
TAPE REEL INFORMATION
*All dimensions nominal
Device
Package Package Pins Type Drawing DSBGA
Reel Reel Diameter Width (mm) (mm) 180.0 180.0
(mm)
(mm)
(mm)
(mm)
Pin1 (mm) Quadrant
SN74LVC2G38DCUR SN74LVC2G38YZPR
3000 3000
2.25
3.35
1.05 0.56
Pack Materials-Page
PACKAGE MATERIALS INFORMATION
4-Dec-2008
*All dimensions nominal
Device SN74LVC2G38DCUR SN74LVC2G38YZPR
Package Type DSBGA
Package Drawing
Pins
3000 3000
Length (mm) 202.0 220.0
Width (mm) 201.0 220.0
Height (mm) 28.0 34.0
Pack Materials-Page
MECHANICAL DATA
MPDS049B 1999 REVISED OCTOBER 2002
(R-PDSO-G8)
0,30 0,15
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,13
0,15 2,90 2,70 4,25 3,75
INDEX AREA
0,10 0,00 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion Falls within JEDEC MO-187 variation
3,15 2,75
Gage Plane 0,25 0,60 0,20
1,30
Seating Plane 0,10 4188781/C 09/02
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