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PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 200
Top Searches for this datasheetREMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 FEATURES Standby-Current Consumption Parallel-Port Expander Open-Drain Interrupt Output Compatible With Most Microcontrollers 400-kHz Fast Address Three Hardware Address Pins Eight Devices Latched Outputs With High-Current Drive DBQ, DGV, PACKAGE (TOP VIEW) Capability Directly Driving LEDs Current Source Actively Driving High Output Latch-Up Performance Exceeds JESD Class Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION This 16-bit expander two-line bidirectional (I2C) designed 2.5-V 5.5-V operation. ORDERING INFORMATION SSOP QSOP TVSOP -40°C 85°C SOIC TSSOP PACKAGE Reel 2000 Reel 2500 Reel 2000 Tube Reel 2000 Tube Reel 1200 Reel 3000 ORDERABLE PART NUMBER PCF8575DBR PCF8575DBQR PCF8575DGVR PCF8575DW PCF8575DWR PCF8575PW PCF8575PWR PCF8575RGER TOP-SIDE MARKING PF575 PCF8575 PF575 PCF8575 PF575 PF575 Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 2005-2007, Texas Instruments Incorporated PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 DESCRIPTION/ORDERING INFORMATION (CONTINUED) PCF8575 provides general-purpose remote expansion most microcontroller families interface serial clock (SCL) serial data (SDA). device features 16-bit quasi-bidirectional input/output (I/O) port (P07-P00, P17-P10), including latched outputs with high-current drive capability directly driving LEDs. Each quasi-bidirectional used input output without data-direction control signal. power I/Os high. this mode, only current source (IOH) active. additional strong pullup (IOHT) allows fast-rising edges into heavily loaded outputs. This device turns when output written high switched negative edge SCL. I/Os should high before being used inputs. After power I/Os high, them used inputs. change setting I/Os either input outputs done with write mode. high applied externally that been written earlier low, large current (IOL) will flow GND. PCF8575 provides open-drain interrupt (INT) output, which connected interrupt input microcontroller. interrupt generated rising falling edge port inputs input mode. After time, tiv, signal valid. Resetting reactivating interrupt circuit achieved when data port changed original setting, data read from written port that generated interrupt. Resetting occurs read mode acknowledge (ACK) after rising edge signal write mode after falling edge signal. Interrupts that occur during clock pulse lost very short), resetting interrupt during this pulse. Each change I/Os after resetting detected transmitted INT. Reading from writing another device does affect interrupt circuit. sending interrupt signal this line, remote inform microcontroller there incoming data ports, without having communicate bus. Thus, PCF8575 remain simple slave device. Every data transmission from PCF8575 must consist even number bytes. first data byte every pair refers port (P07-P00), second data byte every pair refers port (P17-P10). write ports (output mode), master first addresses slave device, setting last byte containing slave address logic PCF8575 acknowledges, master sends first data byte P07-P00. After first data byte acknowledged PCF8575, second data byte (P17-P10) sent master. Once again, PCF8575 acknowledges receipt data, after which this 16-bit data presented port lines. number data bytes that sent successively limited. After every bytes, previous data overwritten. When PCF8575 receives pairs data bytes, first byte referred P07-P00 second byte P17-P10. third byte referred P07-P00, fourth byte P17-P10, Before reading from PCF8575, ports desired input should logic read from ports (input mode), master first addresses slave device, setting last byte containing slave address logic data bytes that follow values ports. data input port changes faster than master read, this data lost. When power applied VCC, internal power-on reset holds PCF8575 reset state until reached VPOR. that time, reset condition released, device I2C-bus state machine initializes default state. hardware pins (A0, used program vary fixed address allow eight devices share same SMBus. fixed address PCF8575 same PCF8575C, PCF8574, PCA9535, PCA9555, allowing eight these devices, combination, share same SMBus. Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 TERMINAL FUNCTIONS DBQ, DGV, NAME FUNCTION Interrupt output. Connect through pullup resistor. Address input Connect directly ground. Pullup resistors needed. Address input Connect directly ground. Pullup resistors needed. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. Ground P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. P-port input/output. Push-pull design structure. Address input Connect directly ground. Pullup resistors needed. Serial clock line. Connect through pullup resistor Serial data line. Connect through pullup resistor. Supply voltage Submit Documentation Feedback PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 LOGIC DIAGRAM (POSITIVE LOGIC) PCF8575 Interrupt Logic Filter Input Filter Control Shift Register Bits Port P17-P10 P07-P00 Write Pulse Power-On Reset Read Pulse SIMPLIFIED SCHEMATIC DIAGRAM EACH P-PORT INPUT/OUTPUT Write Pulse Data From Shift Register IOHT Power-On Reset P07-P00 P17-P10 Read Pulse Interrupt Logic Data Shift Register Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Interface bidirectional consists serial clock (SCL) serial data (SDA) lines. Both lines must connected positive supply pullup resistor when connected output stages device. Data transfer initiated only when busy. communication with this device initiated master sending Start condition, high-to-low transition input/output while input high (see Figure After Start condition, device address byte sent, most significant (MSB) first, including data direction (R/W). This device does respond general call address. After receiving valid address byte, this device responds with ACK, input/output during high ACK-related clock pulse. address inputs (A2-A0) slave device must changed between Start Stop conditions. data byte follows address ACK. high, data from this device values read from port. low, data from master, output port. data byte followed sent from this device. other data bytes sent from master, following ACK, they ignored this device. Data output only complete bytes received acknowledged. output data valid time (tpv) after low-to-high transition SCL, during clock cycle ACK. bus, only data transferred during each clock pulse. data line must remain stable during high pulse clock period, changes data line this time interpreted control commands (Start Stop) (see Figure Stop condition, low-to-high transition input/output while input high, sent master (see Figure number data bytes transferred between Start Stop conditions from transmitter receiver limited. Each byte eight bits followed bit. transmitter must release line before receiver send bit. slave receiver that addressed must generate after reception each byte. Also, master must generate after reception each byte that been clocked slave transmitter. device that acknowledges pull down line during clock pulse that line stable during high pulse ACK-related clock period (see Figure Setup hold times must taken into account. master receiver must signal data transmitter generating acknowledge (NACK) after last byte that been clocked slave. This done master receiver holding line high. this event, transmitter must release data line enable master generate Stop condition. Start Condition Stop Condition Figure Definition Start Stop Conditions Submit Documentation Feedback PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Data Line Stable; Data Valid Change Data Allowed Figure Transfer Data Output Transmitter NACK Data Output Receiver from Master Start Condition Clock Pulse Acknowledgment Figure Acknowledgment Interface Definition BYTE slave address data data (MSB) (LSB) Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Figure Figure show address timing diagrams write read modes, respectively. Integral Multiples Bytes Start Condition Slave Address (PCF8575) From Slave Data Port From Slave Data Port From Slave Write Port Data Output Voltage Data Valid Output Voltage Pullup Output Current IOHT Figure Write Mode (Output) From Slave From Master From Master Read From Port Data Into Port low-to-high transition while high defined stop condition (P). transfer data stopped moment stop condition. When this occurs, data present latest phase valid (output mode). Input data lost. Figure Read Mode (Input) Submit Documentation Feedback PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Address Reference INPUTS SLAVE ADDRESS (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range Input voltage range Output voltage range Input clamp current Output clamp current Input/output clamp current Continuous output current Continuous output high current Continuous current through package package Package thermal impedance package package package package Tstg Storage temperature range -0.5 -0.5 -0.5 ±100 °C/W UNIT Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. input negative-voltage output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7. Recommended Operating Conditions IOHT Supply voltage High-level input voltage Low-level input voltage P-port high-level output current P-port transient pullup current P-port low-level output current Operating free-air temperature -0.5 UNIT Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER IOHT Input diode clamp voltage port P-port transient pullup current port IIHL SCL, port Operating mode Standby mode GND, fscl input Other inputs VPOR Power-on reset voltage TEST CONDITIONS GND, High during ACK, GND, fscl Supply current increase port VPOR -0.5 ±400 -1.2 -300 UNIT typical values nominal supply voltage (2.5-V, 3.3-V, VCC) 25°C. power-on reset circuit resets logic with VPOR sets I/Os logic high (with current source VCC). Interface Timing Requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure fscl tsch tscl tsds tsdh ticr ticf tocf tbuf tsts tsth tsps clock frequency clock high time clock time spike time serial data setup time serial data hold time input rise time input fall time output fall time free time between Stop Start start repeated Start condition setup start repeated Start condition hold Stop condition setup output valid Valid-data time capacitive load total capacitance line 10-pF 400-pF 0.1Cb 0.1Cb UNIT Submit Documentation Feedback PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Switching Characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure Figure PARAMETER Interrupt valid time Interrupt reset delay time Output data valid Input data setup time Input data hold time FROM (INPUT) port port port (OUTPUT) port UNIT Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 TYPICAL OPERATING CHARACTERISTICS 25°C (unless otherwise noted) Supply Current Temperature Supply Current (mA) fSCL I/Os unloaded Standby Supply Current Temperature I/Os unloaded Supply Current Supply Voltage I/Os unloaded Supply Voltage fSCL Supply Current (mA) Temperature (5C) Temperature (5C) Sink Current Output Voltage 85_C -40_C 25_C Sink Current Output Voltage ISINK (mA) -40_C 25_C ISINK (mA) Supply Current (mA) Sink Current Output Voltage 85_C -40_C 25_C ISINK (mA) 85_C Output Voltage Temperature (mV) ISINK ISOURCE (mA) Source Current Output High Voltage 85_C Source Current Output High Voltage ISOURCE (mA) 25_C -40_C ISINK ISINK ISINK 25_C -40_C 85_C Temperature (5C) Submit Documentation Feedback PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 Source Current Output High Voltage ISOURCE (mA) High Voltage Temperature -40_C 25_C 85_C Temperature (5C) Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 PARAMETER MEASUREMENT INFORMATION LOAD CONFIGURATION Bytes Complete Device Programming Stop Condition Start Address Address Condition (MSB) tscl tsch ticr tbuf ticf tsth Start Repeat Start Condition VOLTAGE WAVEFORMS BYTE DESCRIPTION address P-port data ticr tsds tsdh Repeat Start Condition tsps Stop Condition ticf tPHL tPLH tsts Address (LSB) Data (MSB) Data (LSB) Stop Condition Figure Interface Load Circuit Voltage Waveforms Submit Documentation Feedback PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 PARAMETER MEASUREMENT INFORMATION (continued) INTERRUPT LOAD CONFIGURATION From Slave Start Condition Slave Address (PCF8575) Bits Data Bytes) From Port Data From Slave Data From Port Data Data Data Into Port Address Data Data tsps Data View View Figure Interrupt Load Circuit Voltage Waveforms Submit Documentation Feedback REMOTE 16-BIT PCF8575 SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 PARAMETER MEASUREMENT INFORMATION (continued) LOAD CONFIGURATION INTERRUPT LOAD CONFIGURATION P-PORT LOAD CONFIGURATION Slave Write-Mode Timing (R/W Read-Mode Timing (R/W Figure P-Port Load Circuits Voltage Waveforms Submit Documentation Feedback Unstable Data Last Stable PCF8575 REMOTE 16-BIT SMBus EXPANDER WITH INTERRUPT OUTPUT SCPS121D JANUARY 2005 REVISED APRIL 2007 THERMAL MECHANICAL DATA (S-PQFP-N24) Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 24-Jun-2009 PACKAGING INFORMATION Orderable Device PCF8575DBQR PCF8575DBQRE4 PCF8575DBQRG4 PCF8575DBR PCF8575DBRE4 PCF8575DBRG4 PCF8575DGVR PCF8575DGVRE4 PCF8575DGVRG4 PCF8575DW PCF8575DWG4 PCF8575DWR PCF8575DWRG4 PCF8575PW PCF8575PWE4 PCF8575PWG4 PCF8575PWR PCF8575PWRE4 PCF8575PWRG4 PCF8575RGER PCF8575RGERG4 Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type SSOP/ QSOP SSOP/ QSOP SSOP/ QSOP SSOP SSOP SSOP TVSOP TVSOP TVSOP SOIC SOIC SOIC SOIC TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP VQFN VQFN Package Drawing Pins Package Plan 2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Lead/Ball Finish NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU Peak Temp Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-2-260C-1 YEAR Level-2-260C-1 YEAR 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 3000 Green (RoHS Sb/Br) 3000 Green (RoHS Sb/Br) marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device. Addendum-Page PACKAGE OPTION ADDENDUM www.ti.com 24-Jun-2009 Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material) MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis. Addendum-Page PACKAGE MATERIALS INFORMATION 11-Mar-2008 TAPE REEL INFORMATION *All dimensions nominal Device Package Package Pins Type Drawing SSOP/ QSOP SSOP TVSOP SOIC TSSOP VQFN Reel Reel Diameter Width (mm) (mm) 330.0 330.0 330.0 330.0 330.0 330.0 16.4 16.4 12.4 24.4 16.4 12.4 (mm) (mm) (mm) (mm) 12.0 12.0 Pin1 (mm) Quadrant 16.0 16.0 12.0 24.0 16.0 12.0 PCF8575DBQR PCF8575DBR PCF8575DGVR PCF8575DWR PCF8575PWR PCF8575RGER 2500 2000 2000 2000 2000 3000 10.75 6.95 15.7 Pack Materials-Page PACKAGE MATERIALS INFORMATION 11-Mar-2008 *All dimensions nominal Device PCF8575DBQR PCF8575DBR PCF8575DGVR PCF8575DWR PCF8575PWR PCF8575RGER Package Type SSOP/QSOP SSOP TVSOP SOIC TSSOP VQFN Package Drawing Pins 2500 2000 2000 2000 2000 3000 Length (mm) 346.0 346.0 346.0 346.0 346.0 346.0 Width (mm) 346.0 346.0 346.0 346.0 346.0 346.0 Height (mm) 33.0 33.0 29.0 41.0 33.0 29.0 Pack Materials-Page MECHANICAL DATA MSSO002E JANUARY 1995 REVISED DECEMBER 2001 (R-PDSO-G**) PINS SHOWN 0,65 0,38 0,22 0,15 PLASTIC SMALL-OUTLINE 0,25 0,09 5,60 5,00 8,20 7,40 Gage Plane 0,25 0,95 0,55 Seating Plane 2,00 0,05 0,10 PINS 6,50 6,50 7,50 8,50 10,50 10,50 12,90 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065 12/01 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,30 0,19 0,10 0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,10 PINS 3,10 5,10 5,10 6,60 7,90 9,80 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153 POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. 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