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OPA827

www.ti.com ....................................................................... SBOS376F ­ NOVEMBER 2006 ­ REVISED MARCH 2009

OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
Low-Noise, High-Precision, JFET-Input OPERATIONAL AMPLIFIER
FEATURES
DESCRIPTION
APPLICATIONS
· · · · · · · · · ADC DRIVERS DAC OUTPUT BUFFERS TEST EQUIPMENT MEDICAL EQUIPMENT PLL FILTERS SEISMIC APPLICATIONS TRANSIMPEDANCE AMPLIFIERS INTEGRATORS ACTIVE FILTERS
0.1Hz to 10Hz NOISE
1 0.1 1 10 100 1k 10k Time (1s / div) Frequency (Hz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
50nV / div
OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE / ORDERING INFORMATION (1)
PRODUCT Standard Grade OPA827AI OPA827AI High Grade OPA827I (2) SO-8 MSOP-8 D DGK OPA827 NSP SO-8 MSOP-8 D DGK OPA827A NSP PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Shaded cells indicate product preview devices.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current-limited to 10mA or less. Short-circuit to VS / 2 (ground in symmetrical dual-supply setups).
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
Shaded cells indicate different specifications from standard grade version of device. High-grade specifications are preview only.
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
PIN CONFIGURATION
D, DGK PACKAGES SO-8, MSOP-8 (TOP VIEW)
-In +In V-
Out NC
NC denotes no internal connection.
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
INTEGRATED INPUT VOLTAGE NOISE vs BANDWIDTH
Input Voltage Noise (mV)
10 VPP 1 VRMS 0.1 Noise Bandwidth: 0.1Hz to indicated frequency.
1 0.1 1 10 100 1k 10k Frequency (Hz)
0.01 1 10 100 1k 10k 100k 1M 10M Bandwidth (Hz)
Figure 1. TOTAL HARMONIC DISTORTION + NOISE RATIO vs FREQUENCY
Figure 2. TOTAL HARMONIC DISTORTION + NOISE RATIO vs AMPLITUDE
Total Harmonic Distortion + Noise (dB)
Output Voltage Amplitude (VRMS)
Figure 3. 0.1Hz to 10Hz NOISE
Figure 4.
50nV / div
Time (1s / div)
Figure 5.
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Population
Offset Voltage (mV)
Figure 6. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
VOS (mV)
50 0 -50 -100 -150 -200 -250 3.0 3.2 3.4 3.6 3.8 4.0 VCM (V) 4.2 4.4 4.6 4.8 5.0
50 0 -50 -100 -150 -200 -250 3 8 13 18 VCM (V) 23 28 33
Figure 8.
VOS WARMUP
VOS Shift (mV)
VOS (mV)
20 Typical Units Shown 200 250 300
Figure 10.
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Offset Voltage Drift (mV / °C)
Figure 7. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
Figure 9. OFFSET VOLTAGE DRIFT vs TEMPERATURE
Specified Temperature Range
Temperature (°C)
Figure 11.
OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
INPUT BIAS CURRENT AND OFFSET CURRENT vs SUPPLY VOLTAGE
0 IOS -5 +IB
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
20 15 Specified Common-Mode 10 Voltage Range 5
IOS, IB (pA)
IB (pA)
-10 -IB -15
Unit 1 0 Unit 3 -5 -10 Unit 2
-20 -18 -15 -12 -9 -6 -3 0 3 6 9 12 15 18 VCM (V)
Figure 12.
Figure 13. NORMALIZED QUIESCENT CURRENT vs TIME
0.05 0 -0.05 -0.10 10 Typical Units Shown
INPUT BIAS CURRENT vs TEMPERATURE
I Q Shift (mA)
IB (pA)
+IB -IB
150 Time (s)
Temperature (°C)
Figure 14. QUIESCENT CURRENT vs TEMPERATURE
Figure 15. QUIESCENT CURRENT vs SUPPLY VOLTAGE
IQ (mA)
23 VS (V)
Temperature (°C)
Figure 16.
Figure 17.
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
-55°C -40°C
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
Output Swing (V)
2 1 0 -1 -2 -3 -4 -5 20 30 40 50 60 70 73 Output Current (mA)
-55°C +150°C +25°C +125°C +85°C -40°C
4 0 -4 -8 -12 -16 48 53 58 63 68 73 Output Current (mA) +150°C +125°C +85°C +25°C -40°C -55°C
Figure 18. POWER-SUPPLY REJECTION RATIO vs FREQUENCY
180 160 140 Positive Referred to Input 140 120 100 80 60 40 20 0 0.1 1 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) 20 0.1 1 10 100
Figure 19. COMMON-MODE REJECTION RATIO vs FREQUENCY
Negative
CMRR (dB)
PSRR (dB)
10M 100M
Frequency (Hz)
Figure 20. POWER-SUPPLY REJECTION RATIO vs TEMPERATURE
Figure 21. COMMON-MODE REJECTION RATIO vs TEMPERATURE
CMRR (mV / V)
PSRR (mV / V)
-0.4 -50 -25 0 25 50 75 100 125 150 -75 -50 -25 0 25 50 75 100 125 150 Temperature (°C) Temperature (°C)
Figure 22.
Figure 23.
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
140 120 100 -45 Phase -90 0
CLOSED-LOOP GAIN vs FREQUENCY
Gain (dB)
80 60 40 20 0 -20 1 10 100 1k 10k
Phase (°)
-135 Gain 100k 1M 10M -180 100M
100k Frequency (Hz)
Frequency (Hz)
Figure 24. OPEN-LOOP GAIN vs TEMPERATURE
Figure 25. OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY
Open-Loop Output Impedance (ZO)
AOL (mV / V)
100k Frequency (Hz)
Temperature (°C)
Figure 26. SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD
Figure 27.
NO PHASE REVERSAL
Output
OPA827
Output
200 300 400 500 600 700 800 900 1000 Capacitive Load (pF)
0.5ms / div
Figure 28.
Figure 29.
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
POSITIVE OVERLOAD RECOVERY
NEGATIVE OVERLOAD RECOVERY
10kW 1kW
OPA827
VIN VOUT
VOUT Time (0.5ms / div) Time (0.5ms / div)
Figure 30. SMALL-SIGNAL STEP RESPONSE
Figure 31. SMALL-SIGNAL STEP RESPONSE
20mV / div
C1 5.6pF R1 1kW R2 1kW +18V
OPA827
Time (0.1ms / div)
Figure 32. LARGE-SIGNAL STEP RESPONSE
Figure 33. LARGE-SIGNAL STEP RESPONSE
Time (0.5ms / div)
Figure 34.
Figure 35.
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
D From Final Value (mV)
Figure 38. SHORT-CIRCUIT CURRENT vs TEMPERATURE
80 60 40 Sourcing
Figure 39.
ISC (mA)
20 0 -20 -40 -60 -80 -75 -25 25 75 125 175 Temperature (°C) Sinking
Figure 40.
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
APPLICATION INFORMATION
OPERATING VOLTAGE
Votlage Noise Spectral Density, EO
OPA211
100 OPA827 10
Resistor Noise
NOISE PERFORMANCE
Source Resistance, RS (W)
Figure 41. Noise Performance of the OPA827 and OPA211 in Unity-Gain Buffer Configuration
BASIC NOISE CALCULATIONS
Low-noise circuit design requires careful analysis of all noise sources. External noise sources can dominate in many cases consider the effect of source resistance on overall op amp noise performance. Total noise of the circuit is the root-sum-square combination of all noise components. The resistive portion of the source impedance produces thermal noise proportional to the square root of the resistance. This function is plotted in Figure 41. The source impedance is usually fixed consequently, select the op amp and the feedback resistors to minimize the respective contributions to the total noise.
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
Figure 42 illustrates both noninverting (A) and inverting (B) op amp circuit configurations with gain. In circuit configurations with gain, the feedback network resistors also contribute noise. The current noise of the op amp reacts with the feedback resistors to create additional noise components.
The feedback resistor values can generally be chosen to make these noise sources negligible. Note that low impedance feedback resistors will load the output of the amplifier. The equations for total noise are shown for both configurations.
A) Noise in Noninverting Gain Configuration
R2 Noise at the output:
en + e1 + e2 + (inR2) + eS + (inRS)
B) Noise in Inverting Gain Configuration
R2 Noise at the output:
Figure 42. Noise Calculation in Gain Configurations
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
TOTAL HARMONIC DISTORTION MEASUREMENTS
of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 101, thus extending the resolution by 101. Note that the input signal and load applied to the op amp are the same as with conventional feedback without R3. The value of R3 should be kept small to minimize its effect on the distortion measurements. The validity of this technique can be verified by duplicating measurements at high gain and / or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an Audio Precision System Two distortion / noise analyzer, which greatly simplifies such repetitive measurements. This measurement technique, however, can be performed with manual distortion measurement instruments.
R2 1kW 1kW
R3 10W 11W
Generator Output
Analyzer Input
Audio Precision System Two(1) with PC Controller
RL 600W
Figure 43. Distortion Test Circuit
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
CAPACITIVE LOAD AND STABILITY
100mV / div 50mV / div
20ms / div
Figure 44. OPA827 Driving 2.2µF Ceramic Capacitor
100mV / div 50mV / div
PHASE-REVERSAL PROTECTION
The OPA827 family has internal phase-reversal protection. Many FET-input op amps exhibit a phase reversal when the input is driven beyond its linear common-mode range. This condition is most often encountered in noninverting circuits when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into the opposite rail. The input circuitry of the OPA827 prevents phase reversal with excessive common-mode voltage instead, the output limits into the appropriate rail (see Figure 29).
20ms / div
Figure 45. OPA827 Driving 2.2µF Tantalum Capacitor
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
TRANSIMPEDANCE AMPLIFIER
Bandwidth (f-3dB) calculated by Equation 2:
These equations result in maximum transimpedance bandwidth. For additional information, refer to Application Bulletin SBOA055, Compensate Transimpedance Amplifiers Intuitively, available for download at www.ti.com.
OPA827 ID CTOT
-VS NOTES: (1) CF is optional to prevent gain peaking. (2) CSTRAY is the stray capacitance of RF (typically, 2pF for a surface-mount resistor).
Figure 46. Transimpedance Amplifier
Figure 47. Equivalent Schematic (Single Channel)
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OPA827
www.ti.com ....................................................................... SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009
PHASE-LOCK LOOP
The OPA827 is well-suited for phase-lock loop (PLL) applications because of the low voltage offset, low noise, and wide gain bandwidth. Figure 48 illustrates an example of the OPA827 in this application. The first amplifier (OPA827) provides the loop low-pass, active filter function, while the second amplifier (OPA211) serves as a scaling amplifier. This second stage amplifies the dc error voltage to the appropriate level before it is applied to the voltage-controlled oscillator (VCO). Operational amplifiers used in PLL applications are often required to have low voltage offset. As with other dc levels generated in the loop, a voltage offset applied to the VCO is interpreted as a phase error.
An operational amplifier with inherently low voltage offset helps reduce this source of error. Also, any noise produced by the operational amplifiers modulates the voltage applied to the VCO and limits the spectral purity of the oscillator output. The VCO generates noise-related, random phase variations of its own, but this characteristic becomes worse when the input voltage source noise is included. This noise appears as random sideband energy that can limit system performance. The very low flicker noise (1 / f) and current noise (In) of the OPA827 help to minimize the operational amplifier contribution to the phase noise.
Offset Voltage Generator (Frequency Adjustment) Scaling Amplifier
Low-Pass Filter Current Source
Input Signal Phase Dector OPA827 OPA211 VCO Output Signal
Current Source Divider 1 / N
Level Adjustment and Buffer Amplifier
Figure 48. PLL Application
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OPA827
SBOS376F - NOVEMBER 2006 - REVISED MARCH 2009 ....................................................................... www.ti.com
OPA827 USED AS AN I / V CONVERTER
The DAC output impedance as seen looking into the IOUT terminal changes versus code. The low offset voltage of the OPA827 minimizes the error propagated from the DAC. For a current-to-voltage design (see Figure 49), the DAC8811 IOUT pin and the inverting node of the OPA827 should be as short as possible and adhere to good PCB layout design. For each code change on the output of the DAC, there is a step function. If the parasitic capacitance is excessive at the inverting node, then gain peaking is possible. For circuit stability, two compensation capacitors, C1 and C2(4pF to 20pF typical) can be added to the design. Some applications require full four-quadrant multiplying capabilities or a bipolar output swing. As shown in Figure 49, the OPA827 is added as a summing amp and has a gain of 2x that widens the output span to 20V. A four-quadrant multiplying circuit is implemented by using a 10V offset of the reference voltage to bias the OPA827.
10kW C2
VDD RFB C1 +10V VREF DAC8811 IOUT GND OPA827
5kW OPA827 VOUT
Figure 49. I / V Converter
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PACKAGE OPTION ADDENDUM
www.ti.com 30-Mar-2009
PACKAGING INFORMATION
Orderable Device OPA827AID OPA827AIDG4 OPA827AIDGKR OPA827AIDGKT OPA827AIDR OPA827AIDRG4
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type SOIC SOIC MSOP MSOP SOIC SOIC
Package Drawing D D DGK DGK D D
Pins Package Eco Plan (2) Qty 8 8 8 8 8 8 75 75 Green (RoHS & no Sb / Br) Green (RoHS & no Sb / Br)
Lead / Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
MSL Peak Temp (3) Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR
2500 Green (RoHS & no Sb / Br) 250 Green (RoHS & no Sb / Br)
2500 Green (RoHS & no Sb / Br) 2500 Green (RoHS & no Sb / Br)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Mar-2009
TAPE AND REEL INFORMATION
All dimensions are nominal
Device
Package Package Pins Type Drawing MSOP MSOP SOIC DGK DGK D 8 8 8
Reel Reel Diameter Width (mm) W1 (mm) 330.0 180.0 330.0 12.4 12.4 12.4
A0 (mm)
B0 (mm)
K0 (mm)
P1 (mm) 8.0 8.0 8.0
W Pin1 (mm) Quadrant 12.0 12.0 12.0 Q1 Q1 Q1
OPA827AIDGKR OPA827AIDGKT OPA827AIDR
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Mar-2009
All dimensions are nominal
Device OPA827AIDGKR OPA827AIDGKT OPA827AIDR
Package Type MSOP MSOP SOIC
Package Drawing DGK DGK D
SPQ 2500 250 2500
Length (mm) 346.0 190.5 346.0
Width (mm) 346.0 212.7 346.0
Height (mm) 29.0 31.8 29.0
Pack Materials-Page 2
IMPORTANT NOTICE