ASSP Power Supply Applications DC/DC Converter with Synchronous R

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ASSP Power Supply Applications DC/DC Converter with Synchronous R

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DS04-27257-2Ea
ASSP Power Supply Applications
DC/DC Converter with Synchronous Rectification
MB39A123
DESCRIPTION
MB39A123 6-channel DC/DC converter using pulse width modulation (PWM) suitable conversion, down conversion, up/down conversion. MB39A123 built channels into BCC-48++/LQFP48P package this control soft-start each channel. MB39A123 suitable power supply high performance potable instruments such digital still camera (DSC).
FEATURES
Supports step-down with synchronous rectification (ch.1) Supports step-down up/down Zeta conversion (ch.2 ch.4) Supports step-up up/down Sepic conversion (ch.5, ch.6) Negative voltage output (Inverting amplifier) (ch.4) voltage start-up (ch.5, ch.6) Power supply voltage range Reference voltage Error amplifier reference voltage (ch.1) 1.23 (ch.2 ch.6) Oscillation frequency range Standby current (Typ) Built-in soft-start circuit independent loads Built-in totem-pole type output Short-circuit detection capability external signal (-INS terminal) types packages (BCC-48 type, LQFP-48 type)
APPLICATIONS
Digital still camera(DSC) Digital video camera(DVC) Surveillance camera etc.
Copyright©2006-2008 FUJITSU MICROELECTRONICS LIMITED rights reserved 2007.3
MB39A123
ASSIGNMENTS
(TOP VIEW)
-INE3
-INE2
-INE1
DTC3
DTC2
CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 -INS VREF
VCCO OUT1-1 OUT1-2 OUT2 OUT3 OUT4 OUT5 OUT6 GNDO -INE6
OUTA
-INE4
-INA
CSCP
-INE5
DTC4
DTC5
(LCC-48P-M08)
DTC6
(Continued)
MB39A123
(Continued) (TOP VIEW)
-INE3
-INE2
-INE1
DTC3
DTC2
CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 -INS VREF
VCCO OUT1-1 OUT1-2 OUT2 OUT3 OUT4 OUT5 OUT6 GNDO -INE6
CSCP
-INE4
OUTA
-INA
-INE5
DTC4
DTC5
(FPT-48P-M26)
DTC6
MB39A123
DESCRIPTIONS
Block name name ch.1 ch.2 ch.3 ch.4 ch.5 ch.6 OUT1-1 OUT1-2 DTC2 -INE2 OUT2 DTC3 -INE3 OUT3 DTC4 -INE4 OUT4 -INA OUTA DTC5 -INE5 OUT5 DTC6 -INE6 OUT6 -INE1 Description Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal P-ch drive output terminal (External main side gate driving) N-ch drive output terminal (External synchronous rectification side gate driving) ch.2 Dead time control terminal ch.2 Error amplifier output terminal ch.2 Error amplifier inverted input terminal ch.2 Soft-start setting capacitor connection terminal ch.2 P-ch drive output terminal ch.3 Dead time control terminal ch.3 Error amplifier output terminal ch.3 Error amplifier inverted input terminal ch.3 Soft-start setting capacitor connection terminal ch.3 P-ch drive output terminal ch.4 Dead time control terminal ch.4 Error amplifier output terminal ch.4 Error amplifier inverted input terminal ch.4 Soft-start setting capacitor connection terminal ch.4 P-ch drive output terminal Inverting amplifier input terminal Inverting amplifier output terminal ch.5 Dead time control terminal ch.5 Error amplifier output terminal ch.5 Error amplifier inverted input terminal ch.5 Soft-start setting capacitor connection terminal ch.5 N-ch drive output terminal ch.6 Dead time control terminal ch.6 Error amplifier output terminal ch.6 Error amplifier inverted input terminal ch.6 Soft-start setting capacitor connection terminal ch.6 N-ch drive output terminal (Continued)
MB39A123
(Continued) Block name Control Power name CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 CSCP -INS VCCO VREF GNDO Description Triangular wave frequency setting capacitor connection terminal Triangular wave frequency setting resistor connection terminal Power supply control terminal ch.1 control terminal ch.2 control terminal ch.3 control terminal ch.4 control terminal ch.5 control terminal ch.6 control terminal Short-circuit detection circuit capacitor connection terminal Short-circuit detection comparator inverted input terminal Drive output block power supply terminal Power supply terminal Reference voltage output terminal Drive output block ground terminal Ground terminal
MB39A123
BLOCK DIAGRAM
Step-down (Synchronous Rectification)
-INE1
priority
VREF
<<ch.1>> Error Amp1
VCCO
Comp.1
(1.0
Reference voltage
Dead Time
VCCO Drive1-1 P-ch
(1.2
OUT1-1
Drive1-2 N-ch
OUT1-2
Step-down
Dead Time
VCCO
<<ch.2>>
(2.5
-INE2
priority
VREF
Error Amp2
Duty VREF priority
Comp.2
Drive2 P-ch
OUT2
1.23 DTC2 -INE3
Reference voltage 1.23 priority
VREF
VCCO
<<ch.3>>
Step-down
(3.3
Error Amp3
Duty VREF
priority
Comp.3
Drive3 P-ch
OUT3
1.23 DTC3 -INA
Reference voltage 1.23
VCCO
<<ch.4>>
OUTA
INVAmp
Inverting
(-7.5
-INE4
priority
V-11
VREF
Error Amp4
priority Duty VREF
Comp.4
Drive4 P-ch
OUT4
1.23 DTC4
Reference voltage 1.23 priority
VREF
VCCO
Step-up
-INE5
Error Amp5
Duty VREF priority
<<ch.5>>
Comp.5
Drive5 N-ch
OUT5
1.23
DTC5 -INE6
Reference voltage 1.23 priority
VREF
VCCO
Transformer <<ch.6>>
Duty VREF priority
Vo6-1 Vo6-2 (5.0
Error Amp6
Comp.6
Drive6 N-ch
OUT6 GNDO
1.23 DTC6
Reference voltage 1.23
VREF
VCCO
Short-circuit detection signal short-circuit) Charge current
-INS
Comp.
H:at
CSCP
Error power supply Comp. power supply
H:UVLO release
H:ON L:OFF
CTL1 CTL2 CTL4 CTL5 CTL6
UVLO1 UVLO2
Error reference
bias
V/1.23 VREF
Precision
CTL3
CHCTL
Power ON/OFF
H:ON (Power L:OFF(Standby mode)
Precision (2.0 MHz)
VREF
Precision
PKG:BCC-48++ :LQFP-48P
MB39A123
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Output current Symbol Conditions VCC, VCCO terminals OUT1-1, OUT1-2, OUT2 OUT6 terminals OUT1-1, OUT1-2, OUT2 OUT6 terminals Duty (BCC-48++) (LQFP-48P) Rating Unit
Peak output current
1670* 2000* +125
Power dissipation Storage temperature
TSTG
When mounted FR-4 boards. WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
MB39A123
RECOMMENDED OPERATING CONDITIONS
Parameter Start power supply voltage Power supply voltage Reference voltage output current Symbol IREF VINE VDTC Control input voltage Output current VCTL Conditions ch.5, ch.6, VCC, VCCO terminals VCC, VCCO terminals VREF terminal -INE1 -INE6 terminals Input voltage -INA terminal -INS terminal DTC2 DTC6 terminals CTL, CTL1 CTL6 terminals OUT1-1, OUT1-2, OUT2 OUT6 terminals OUT1-1, OUT1-2, OUT2 OUT6 terminals connection fosc terminals Value VREF VREF Unit
Total gate charge external
Oscillation frequency Timing capacitor Timing resistor Soft-start capacitor Short-circuit detection capacitor Reference voltage output capacitor Operating ambient temperature
fOSC CSCP CREF
WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their representatives beforehand.
MB39A123
ELECTRICAL CHARACTERISTICS
(VCC VCCO Parameter Symbol VREF1 Output voltage Reference Voltage Block [VREF] Input stability Load stability Temperature stability Short-circuit output current Under voltage lockout protection circuit Block (ch.1 ch.4) [UVLO1] Under voltage lockout protection circuit Block (ch.5, ch.6) [UVLO2] Threshold voltage Hysteresis width Reset voltage Threshold voltage Hysteresis width Reset voltage VREF2 VREF3 Line Load VREF/ VREF VTH1 VRST1 VTH2 VRST2 ICSCP fosc1 fosc2 fOSC/ fOSC fOSC/ fOSC Conditions VREF VREF VREF VREF Value 1.98 2.00 2.02 Unit
1.975 2.000 2.025 1.975 2.000 2.025 0.05 1.55 1.35 0.02 1.27 0.65 -1.4 0.95 0.945 0.20 -130 0.05 1.45 0.70 -1.0 1.85 1.65 1.63 0.75 -0.6 1.05
Threshold Short-circuit voltage detection Block Input source [SCP] current Oscillation frequency Triangular Wave Oscillator Block [OSC] Frequency Input stability Frequency temperature stability Soft-Start Block Charge (ch.1 ch.6) current [CS1 CS6]
1.055
17,20,27, 39,40,47
-1.45
-1.1
-0.75
(Continued)
MB39A123
(VCC VCCO Parameter Symbol VTH1 VTH2 VTH/ ISOURCE ISINK 0.65 0.65 Conditions -INE1 Value Unit
Reference voltage Temperature stability Input bias current
0.990 1.000 1.010 0.988 1.000 1.012 -120
Error Block Voltage gain (ch.1) [Error Amp1] Frequency bandwidth Output voltage Output source current Output sink current
VTH3 Reference voltage VTH4 VTH/
1.217 1.230 1.243
1.215 1.230 1.245
Temperature stability Input bias Error Block current (ch.2 ch.6) [Error Amp2 Error Amp6] Voltage gain
-INE2 -INE6
-120
Frequency bandwidth
Output voltage
(Continued)
MB39A123
(VCC VCCO Parameter Output source Error Block current (ch.2 ch.6) [Error Amp2 Output sink Error Amp6] current Input offset voltage Input bias current Voltage gain Inverting Block (ch.4) [Inv Amp] Frequency bandwidth Output voltage Output source current Output sink current Comparator Block (ch.1) [PWM Comp.1] Comparator Block (ch.2 ch.6) [PWM Comp.2 Comp.6] Symbol Conditions Value Unit
ISOURCE
0.65
ISINK
0.65 OUTA 1.23V OUTA 1.23V OUTA 1.23V Duty cycle Duty cycle 100%
-120 0.35 0.85 0.35 0.85
0.45 0.95 0.45 0.95
ISOURCE ISINK
-130
Threshold voltage
VT100 VT100
Threshold voltage Maximum duty cycle Output source current
Duty cycle Duty cycle 100% Duty Duty
ISOURCE ISINK
Output Block (ch.1 ch.6) Output [Drive1 Drive6] resistor
Output sink current
OUT2 OUT1 OUT1 OUT2
Dead time
(Continued)
MB39A123
(Continued) (VCC VCCO Parameter Short-Circuit Detection Comparator Block [SCP Comp.] Threshold voltage Input bias current Output condition Output condition Input current Standby current Power supply current Standard design value Symbol ICTLH ICTLL ICCS ICCSO -INS CTL, CTL1 CTL6 CTL, CTL1 CTL6 CTL, CTL1 CTL6 CTL, CTL1 CTL6 CTL, CTL1 CTL6 Conditions Value 0.97 1.00 1.03 Unit
Control Block (CTL, CTL1 CTL6) [CTL, CHCTL]
General
MB39A123
TYPICAL CHARACTERISTICS
Power Supply Current Power Supply Voltage
Reference Voltage Power Supply Voltage
Power Supply Current (mA)
Reference Voltage VREF
VREF
Power Supply Voltage Reference Voltage Operating Ambient Temperature
2.05
Power Supply Voltage
Reference Voltage VREF
2.04 2.03 2.02 2.01 2.00 1.99 1.98 1.97 1.96 1.95
VREF
Operating Ambient Temperature Reference Voltage Terminal Voltage
+100
Terminal Current Terminal Voltage
Terminal Current ICTL (µA)
Reference Voltage VREF
VREF
Terminal Voltage VCTL
Terminal Voltage VCTL (Continued)
MB39A123
Triangular Wave Oscillation Frequency Timing Resistor
10000
Triangular Wave Oscillation Frequency Timing Capacity
10000
Triangular Wave Oscillation Frequency fOSC (kHz)
1000
Triangular Wave Oscillation Frequency fOSC (kHz)
1000
1000
1000
10000
Timing Resistor Triangular Wave Upper Lower Limit Voltage Triangular Wave Oscillation Frequency Triangular Wave Upper Lower Limit Voltage
1.20 1.10 1.00 0.90 0.80 0.70 0.60 0.50 0.40 Lower limit 0.30 0.20 1000 1200 1400 1600 1800 2000 2200
Timing Capacity (pF) Triangular Wave Upper Lower Limit Voltage Operating Ambient Temperature Triangular Wave Upper Lower Limit Voltage
1.20 1.10 1.00 0.90 0.80 0.70 0.60 0.50 0.40 Lower limit 0.30 0.20 +100
Upper limit
Upper limit
Triangular Wave Oscillation Frequency fOSC (kHz) Triangular Wave Oscillation Frequency Operating Ambient Temperature
1100
Operating Ambient Temperature
Triangular Wave Oscillation Frequency fOSC (kHz)
1080 1060 1040 1020 1000
+100
Operating Ambient Temperature (Continued)
MB39A123
Duty Cycle Terminal Voltage
fosc
Maximum Duty Cycle Oscillation Frequency
Maximum Duty Cycle
Duty Cycle
Open
fosc
fosc
1000 1200 1400 1600 1800 2000 2200
0.65
0.75
0.85
Terminal Voltage VDTC Maximum Duty Cycle Power Supply Voltage
Oscillation Frequency fOSC (kHz) Maximum Duty Cycle Operating Ambient Temperature Maximum Duty Cycle
fosc
Maximum Duty Cycle
fosc fosc
open
fosc
fosc
fosc
open +100
Power Supply Voltage Start Power Supply Voltage Timing Resistor
Operating Ambient Temperature
Start Power Supply Voltage
evaluating Fujitsu board system VCTL
Timing Resistor (Continued)
MB39A123
(Continued) Error Voltage Gain, Phase Frequency Error Voltage Gain (dB)
Phase (deg)
-135 -180 -225
Error Amp1 same other channels
Frequency (Hz) Maximum Power Dissipation Operating Ambient Temperature (for BCC-48++) Maximum Power Dissipation (mW) Maximum Power Dissipation (mW)
2250 2000 1800 1600 1400 1200 1000 +100 2250 2000 1800 1600 1400 1200 1000 +100
Maximum Power Dissipation Operating Ambient Temperature (for LQFP-48P)
Operating Ambient Temperature
Operating Ambient Temperature
MB39A123
FUNCTIONAL DESCRIPTION
DC/DC Converter Function
Reference voltage block (VREF) reference voltage circuit uses voltage supplied from terminal (pin generate temperature compensated reference voltage (2.0 Typ) used reference voltage internal circuits also possible supply load current external circuits reference voltage through VREF terminal (pin Triangular wave oscillator block (OSC) triangular wave oscillator block generates triangular wave oscillation waveform width lower limit amplitude timing resistor connected terminal (pin timing capacitor (CT) connected terminal (pin triangular wave input comparator circuits Error amplifier block (Error Amp1 Error Amp6) error amplifier detects output voltage DC/DC converter outputs control signals. arbitrary loop gain connecting feedback resistor capacitor from output terminal inverted input terminal error amplifier, enabling stable phase compensation system. prevent surge currents when turned connecting soft-start capacitors terminal (pin terminal (pin which noninverting input terminals error amplifier. started constant soft-start time intervals independent output load DC/DC converter. comparator block (PWM Comp.1 Comp.6) comparator block voltage-pulse width converter that controls output duty depending input/output voltage. output transistor turned during intervals when error amplifier output voltage voltage (ch.2 ch.6) higher than triangular wave voltage. Output block (Drive1 Drive6) output circuit uses totem-pole configuration capable driving external P-ch (main side ch.1, ch.2, ch.3 ch.4) N-ch (synchronous rectification side ch.1, ch.5 ch.6).
MB39A123
Channel Control Function
terminal (pin CTL1 terminal (pin CTL2 terminal (pin CTL3 terminal (pin CTL4 terminal (pin CTL5 terminal (pin CTL6 terminal (pin ON/OFF main each channels. ON/OFF setting conditions each channel CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 Power ch.1 ch.2 ch.3 ch.4 ch.5 ch.6
Note Note that current which over standby current flows into terminal when terminal level terminals between CTL1 CTL6 terminals level. (Refer following circuit) CTL1 CTL6 terminals equivalent circuit
CTL1
CTL6 protection element
MB39A123
Protection Function
Timer-latch short-circuit protection circuit (SCP, Comp.) short-circuit detection comparator (SCP) detects output voltage level each channel. output voltage channel lower than short-circuit detection voltage, timer circuit actuated start charging capacitor (Cscp) externally connected CSCP terminal (pin 13). When capacitor (Cscp) voltage becomes about output transistor turned dead time 100%. short-circuit detection from external input capable using -INS terminal (pin short-circuit detection comparator (SCP Comp.) When protection circuit actuated, power supply rebooted terminal (pin level, resetting latch voltage VREF terminal (pin becomes 1.27 (Min) less (Refer "SETTING TIME CONSTANT TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT") Under voltage lockout protection circuit block (UVLO) transient state momentary decrease power supply voltage, which occurs when power supply turned cause control malfunction, resulting breakdown degradation system. prevent such malfunctions, under voltage lockout protection circuit detects decrease internal reference voltage level with respect power supply voltage, turns output transistor, sets dead time 100% while holding CSCP terminal (pin level. system returns normal state when power supply voltage reaches reference voltage under voltage lockout protection circuit. Protection circuit operating function table following table shows output state that protection circuit operating. Operation circuit OUT1-1 OUT1-2 OUT2 OUT3 OUT4 Short-circuit protection circuit Under voltage lockout protection circuit OUT5 OUT6
MB39A123
SETTING OUTPUT VOLTAGE
ch.1
-INE1
Error
1.00
1.00
prevent error amp's response from decreasing using above formula.
ch.2 ch.6
-INEX
Error
1.23
1.23
Each channel number
prevent error amp's response from decreasing using above formula.
MB39A123
ch.4 (Negative voltage output)
-INA OUTA INVAmp -1.23
Error
-INE4
1.23
MB39A123
SETTING TRIANGULAR WAVE OSCILLATION FREQUENCY
triangular wave oscillation frequency connecting timing resistor terminal (pin timing capacitor (CT) terminal (pin 12). Triangular wave oscillation frequency fOSC 680000 (pF)
fOSC (kHz)
MB39A123
SETTING SOFT-START TIME
prevent rush currents when turned soft-start connecting soft-start capacitors (CS1 CS6) terminal (pin terminal (pin respectively. illustrated below, when each CTLX from "L", soft-start capacitors (CS1 CS6) externally connected terminals charged about error amplifier output (FB1 FB6) determined comparison between lower voltage noninverted input terminal voltage (1.23 (ch.1 terminal voltage) inverted input terminal voltage (-INE1 -INE6) terminal voltage decided soft-start period terminal voltage 1.23 (ch.1 comparison between -INE terminal voltage terminal voltage. DC/DC converter output voltage rises proportion terminal voltage soft-start capacitor externally connected terminal charged. soft-start time obtained from following formula Soft-start time (time until output voltage 100%) ch.1 0.91 (µF) ch.2 ch.6 1.12 (µF) Each channel number
-INEX VREF
priority
Error AmpX
1.23 (ch.1
charged when CTLX normal operation selected discharged when CTLX protective operation selected
CTLX
CHCTL
Each channel number
MB39A123
PROCESSING WHEN USING TERMINAL
When soft-start function used, leave terminal (pin 39), terminal (pin 40), terminal (pin 47), terminal (pin 17), terminal (pin terminal (pin open. When setting soft-start time "Open"
"Open"
"Open"
"Open"
"Open"
"Open"
MB39A123
SETTING TIME CONSTANT TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
Each channel uses short-circuit detection comparator (SCP) always compare error amplifier's output level reference voltage. While DC/DC converter load conditions stable channels, short-circuit detection comparator output remains level, CSCP terminal (pin held level. load condition channel changes rapidly short-circuit load, causing output voltage drop, output short-circuit detection comparator that channel goes level. This causes external short-circuit protection capacitor CSCP connected CSCP terminal (pin charged Short-circuit detection time tCSCP tCSCP 0.70 CSCP (µF) When capacitor CSCP charged threshold voltage (VTH 0.70 latch external turned (dead time 100%) this time, latch input closed CSCP terminal (pin held level. short-circuit detection from external input capable using -INS terminal (pin this case, shortcircuit detection operates when -INS terminal voltage becomes level threshold voltage (VTH less. Note that latch reset voltage VREF terminal (pin decreased 1.27 (Min) less either recycling power supply setting terminal (pin level.
MB39A123
Timer-latch short-circuit protection circuit
-INEX
Error AmpX
1.23 (ch.1
Comp.
each channel drive
CSCP VREF CSCP Latch UVLO
Each channel number
MB39A123
PROCESSING WHEN USING CSCP TERMINAL
disable timer-latch short-circuit protection circuit, connect CSCP terminal (pin shortest distance. Processing when using CSCP terminal
CSCP
MB39A123
SETTING DEAD TIME (ch.2 ch.6)
When device step-up inverted output based step-up, step-up/down Zeta method, step down Sepic method, flyback method, terminal voltage reach exceed triangular wave voltage load fluctuation. this case, output transistor fixed full-ON state duty 100%). prevent this, maximum duty output transistor. When terminal opened, maximum duty (Typ) because this built-in resistor which sets terminal voltage. This based following setting: 1MHz 6.8k/CT 100pF). disable terminal, connect VREF terminal (pin illustrated below (when dead time set). When dead time set: (Setting with built-in resistor: 1MHz 6.8k/CT 100pF] 92%) When dead time set:
VREF
"Open"
DTCX
DTCX
ch.2 ch.6
ch.2 ch.6
change maximum duty using external resistors, terminal voltage dividing resistance using VREF voltage. Refer When dead time (Setting external resistors)". possible without regard built-in resistance value (including tolerance) when setting external resistance value 1/10 built-in resistance less. Note that VREF load current must such that total current channels does exceed When terminal voltage higher than triangular wave voltage, output transistor turned formula calculating maximum duty follows, assuming that triangular wave amplitude triangular wave lower limit voltage about respectively.
DUTY (ON)
VREF (condition
Note DUTY obtained above-mentioned formula calculated value. setting, refer Duty cycle terminal voltage". maximum duty varies depending oscillation frequency, regardless settings built-in external resistors. (This dependency peak value triangular wave oscillation frequency Therefore, greater, maximum duty decreases, even when same frequency used.)
MB39A123
Furthermore, maximum duty increases when power supply voltage temperature high. therefore recommended duty, based TYPICAL CHARACTERISTICS" data, that does exceed under worst conditions. duty cycle terminal voltage
fosc
duty cycle
0.65
fosc
Calculated value
fosc
fosc
0.75
0.85
terminal voltage VDTC
When dead time (Setting external resistors)
VREF
DTCX
131.9
Comp.X
97.5
ch.2 ch.6
MB39A123
Setting example (for maximum duty (Vdt with 13.7 Calculation using external resistors only VREF 0.80
DUTY (ON) Max=
Calculation taking account built-in resistor (tolerance 20%) also (Rb, Combined resistance) (Ra, Combined resistance) (Rb, Combined resistance) 0.2% VREF 0.80 0.13%
DUTY (ON)
Based above, selecting external resistances 1/10th less built-in resistance enables built-in resistance ignored. duty dispersion, please expect (fosc MHz) dispersion triangular wave amplitude.
PROCESSING WHEN USING ch.4
Short-circuit terminal (pin OUTA terminal (pin shortest distance when using ch.4 Amp. When using ch.4
-INA OUTA
MB39A123
OPERATION EXPLANATION WHEN TURNING
When turned internal reference voltage VREF generate. When VREF exceeds each threshold voltage (VTH) UVLO (under voltage lockout protection circuit) UVLO released, operation output drive circuit each channel becomes possible. When off, CSCP terminals always soon output drive circuit each channel fixed full even UVLO released. When VREF fall VREF decreases threshold voltage (VRST) UVLO (under voltage lockout protection circuit), output drive circuit becomes UVLO state. block equivalent circuit
UVLO1 UVLO release circuit Possible operate CSCP terminal ch.1 ch.4 output drive circuit Possible operate Forced stop charge/discharge circuit Possible charge Forced discharge ch.5, ch.6 output drive circuit Possible operate Forced stop CS5, charge/discharge circuit Possible charge Forced discharge Error reference V/1.23 bias Power ON/OFF
UVLO2 UVLO release
VREF
VREF
MB39A123
Operation waveform when turning
1.23 VREF UVLO1 UVLO state UVLO2 ch.1 ch.4 Output Drive circuit control ch.5, ch.6 Output Drive circuit control UVLO state Fixed full Fixed full Possible operate Possible operate UVLO release UVLO release VTH1 VTH2
VRST1 VRST2
UVLO state
UVLO state
Fixed full
Fixed full
shown sequence above figure, when turning while each CHCTL turned intermission state generated noise around threshold voltage. prevent this, recommended turn with slope V/50 higher that voltage does remain specified threshold voltage range (0.5 above slope setting difficult achieve, recommended turn after turning CHCTLs. Moreover, voltage remains terminal, when turned same time CHCTL, when turned same time while each CHCTL still turned this lead overshoot upon restart, recommended turn after turning CHCTLs reduce Likewise, recommended turn CHCTL with slope V/50 higher. When CHCTL turned same time, when turned while each CHCTL turned there exists period (approx. when error output voltage (FB) higher than triangular wave voltage (CT) upon startup VREF. result, when UVLO released then Output Drive circuit each channel becomes operable, output transistor turned generating voltage converter output. voltage generated (Vop) depends VIN. (See characteristics (Vop) when turning CHCTL ON.) should noted that above event does occur when turned while CHCTL turned off. Therefore, recommended turn each CHCTL after turning CTL.
MB39A123
characteristics (Vop) when turning CHCTL
evaluating Fujitsu board system
CTL[V] Vo[V]
Generated voltage
CS[V]
Step-down operation Load CHCTL
t[ms]
Generated output voltage Output capacitor value
evaluating Fujitsu board system
Generated output voltage (mV)
When load applied
This energy moves
Output capacitor value (µF)
MB39A123
ABOUT VOLTAGE OPERATION
more necessary terminal (pin VCCO terminal (pin self-power supply type step-up circuit start voltage. Even thereafter voltage decreases operation possible terminal (pin voltage VCCO terminal (pin voltage rise more after start-up. However, necessary exceed maximum duty value duty decrease. Including other channels, execute enough operation margin confirmation when using
VREF
<<ch.5>>
Step-up
-INE5
1.23
Error Amp5
Comp.5 Drive5 N-ch
VCCO OUT5
Duty DTC5
MB39A123
EQUIVALENT CIRCUIT
Reference voltage block
1.23
Control block (CTL, CTL1 CTL6)
protection element
VREF
CTLX
protection element
protection element
Soft-start block
VREF (2.0
Short-circuit detection block
Short-circuit detection comparator block
VREF (2.0
-INS CSCP
VREF (2.0
Triangular wave oscillator block (RT)
VREF (2.0 0.64
Triangular wave oscillator block (CT)
VREF (2.0
Error amplifier block (ch.1 ch.6)
VREF (2.0 -INEX (ch.1) 1.23 (ch.2 ch.6)
Each channel number (Continued)
MB39A123
(Continued) Inverting amplifier block
VREF (2.0 OUTA -INA
comparator block
Output block
VCCO
VREF (2.0 DTCX
131.9 OUTX
97.5 GNDO
Each channel number
7.20 7.10 6.75 6.80
0.50 49-0.52
0.55 0.70 0.80 0.90 0.70 0.80
0.70
LAND MASK PATTERN (BCC-48++)
6.80
7.20
6.75
0.55 0.30 Mounting Terminal Dimension
0.23 0.24 Mask Dimension 0.15
0.50
MB39A123
Unit
7.10
MB39A123
USAGE PRECAUTIONS
Printed circuit board ground lines should with consideration common impedance. Take appropriate static electricity measures. Containers semiconductor materials should have anti-static protection made conductive material. After mounting, printed circuit boards should stored shipped conductive bags containers. Work platforms, tools, instruments should properly grounded. Working personnel should grounded with resistance between body ground. apply negative voltages. negative voltages below -0.3 create parasitic transistors lines, which cause abnormal operation.
ORDERING INFORMATION
Part number MB39A123PMT-E1 MB39A123PVK-E1 Package 48-pin plastic LQFP (FPT-48P- M26) 48-pin plastic (LCC-48P-M08) Remarks Lead Free version Lead Free version
BOARD ORDERING INFORMATION
board part MB39A123EVB-02 board version Board Rev.1.0 Remarks LQFP-48P
RoHS COMPLIANCE INFORMATION LEAD (Pb) FREE VERSION
products Fujitsu Microelectronics with "E1" compliant with RoHS Directive observed standard lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) polybrominated diphenyl ethers (PBDE) product that conforms this standard added "E1" part number.
MB39A123
MARKING FORMAT (LEAD FREE VERSION)
9A123 XXXX
INDEX
LQFP-48P (FPT-48P-M26)
Lead Free version
INDEX
APAN XXXX
Lead Free version
BCC-48++ (LCC-48P-M08)
MB39A123
LABELING SAMPLE (LEAD FREE VERSION)
Lead-free mark JEITA logo JEDEC logo
MB123456P
(3N) 1MB123456P-789-GE1 1000
(3N)2 1561190005 107210
PASS
1,000 MB123456P
2006/03/01
ASSEMBLED JAPAN
MB123456P
0605 Z01A 1000
1561190005
Lead Free version
MB39A123
MB39A123PMT-E1, MB39A123PVK-E1 RECOMMENDED CONDITIONS MOISTURE SENSITIVITY LEVEL
Item Mounting Method Mounting times Before opening Storage period From opening reflow When storage period after opening exceeded Storage conditions Condition (infrared reflow) Manual soldering (partial heating method) times Please within years after Manufacture. Less than days Please processes within days after baking (125 24H)
70%RH less (the lowest possible humidity)
[Temperature Profile Standard Reflow] (infrared reflow) rank
(d')
Temperature Increase gradient Preliminary heating Temperature Increase gradient Actual heating (d')
Cooling
Average °C/s °C/s Temperature Average °C/s °C/s Temperature Max; more, less Temperature more, less Temperature more, less Temperature more, less Natural cooling forced cooling
Note Temperature package body Manual soldering (partial heating method) Conditions Temperature Times max/pin
MB39A123
PACKAGE DIMENSIONS
48-pin plastic Lead pitch Package width package length Sealing method Mounting height Weight 0.50 7.00 7.00 Plastic mold 0.80 0.07
(LCC-48P-M08)
48-pin plastic (LCC-48P-M08)
7.00±0.10(.276±.004) 0.80(.031)MAX Mount height 0.50(.020) 6.20(.244)TYP 6.10(.240)TYP 0.50±0.10 (.020±.004)
0.50(.020) 6.20(.244) 6.10(.240) 0.50±0.10 (.020±.004)
5.00±0.06 (.197±.002) 4.60(.181) 4.60(.181) 5.00±0.06 (.197±.002) 6.25(.246) 5.00(.197) 0.09(.004) 0.14(.006)
7.00±0.10 (.276±.004) INDEX AREA
0.075±0.025 (.003±.001) (Stand off)
5.00(.197)REF 6.25(.246)REF
Details part 0.14(.006) 0.05(.002)
Details part 0.70±0.06 (.028±.002) 0.55±0.06 (.022±.002)
Details part C0.20(.008) 0.55±0.06 (.022±.002)
0.60±0.06 (.024±.002)
0.30±0.06 (.012±.002)
0.55±0.06 (.022±.002)
0.55±0.06 (.022±.002)
2004 FUJITSU LIMITED C48061S-c-1-1
Dimensions (inches). Note: values parentheses reference values.
(Continued)
MB39A123
(Continued)
48-pin plastic LQFP Lead pitch Package width package length Lead shape Sealing method Mounting height Weight 0.50 Gullwing Plastic mold 1.70 0.17
(FPT-48P-M26)
Code (Reference)
48-pin plastic LQFP (FPT-48P-M26)
Note These dimensions include resin protrusion. Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
9.00±0.20(.354±.008)SQ
7.00 -0.10 .276 -.004
+0.40
+.016
0.145±0.055 (.006±.002)
0.08(.003) INDEX
Details part 1.50 -0.10 .059 -.004
+0.20 +.008
(Mounting height)
0°~8° LEAD 0.50(.020)
0.10±0.10 (.004±.004) (Stand off)
0.20±0.05 (.008±.002)
0.08(.003)
0.25(.010) 0.60±0.15 (.024±.006)
2003 FUJITSU LIMITED F48040S-c-2-2
Dimensions (inches). Note: values parentheses reference values.
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ further information please contact: North South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 Arques Avenue, Sunnyvale, 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 Korea FUJITSU MICROELECTRONICS KOREA LTD. KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA LTD. Lorong Chuan, #05-08 Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw
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ASSP Power Supply Applications DC/DC Converter with Synchronous R

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