ASSP Power Supply Applications (General Purpose DC/DC Converter)

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ASSP Power Supply Applications (General Purpose DC/DC Converter)

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DS04-27235-2Ea
ASSP Power Supply Applications (General Purpose DC/DC Converter)
2-Channel DC/DC Converter
with Overcurrent Protection Symmetrical-Phase Type
MB39A106
DESCRIPTION
MB39A106 symmetrical-phase type two-channel, DC/DC converter using pulse width modulation (PWM) incorporating overcurrent protection circuit (requiring current sense resistor) overvoltage protection circuit. Providing high output driving capabilities, MB39A106 suitable down-conversion. MB39A106 adopts both synchronous rectification provide high efficiency symmetrical phasing (two anti-phase triangular waves) which contributes making input capacitor small. MB39A106 contains Bootstrap diode resulting reduced number components used. also contains variety protection features which output protection status upon detection overvoltage overcurrent while reducing number external protective devices required. result ideal built-in power supply driving products with high speed CPU's such home game devices notebook PC's.
FEATURES
Built-in bootstrap diode Built-in timer-latch overcurrent protection circuit (requiring current sense resistor) Built-in timer-latch overvoltage protection circuit Synchronous rectification system providing high efficiency Power supply voltage range: PWRGOOD terminals (open-drain) output protection status Symmetrical-phase system reducing input capacitor loss Built-in channel control function type package (TSSOP-30pin type) Reference voltage: Error amplifier threshold voltage: 1.23 Support frequency setting using external resistor (Frequency setting capacitor integrated) Oscillation frequency range: Standby current (Typ) Built-in circuit load-independent soft-start discharge control Built-in totem-pole output N-ch type package (TSSOP-30 type)
APPLICATION
Home Video Game phone Printer etc.
Copyright©2002-2008 FUJITSU MICROELECTRONICS LIMITED rights reserved 2006.8
MB39A106
ASSIGNMENT
(TOP VIEW)
-INE1 SGND VREF CTL1 CTL2 CSCP PWRGOOD -INE2
OUT1-1 OUT2-1 PGND1 ILIM1 ILIM2 PGND2 OUT2-2 OUT1-2
(FPT-30P-M04)
MB39A106
DESCRIPTION
Symbol -INE1 SGND VREF CTL1 error output terminal soft-start capacitor connection terminal connection Triangular waveform oscillation frequency setting resistor connection terminal Power supply control terminal level operating mode level Standby mode Ground terminal Reference voltage output terminal control terminal level state level state protection status reset control terminal level state level state protection status reset Timer-latch short-circuit protection capacitor connection terminal CH1, protection status output terminal soft-start capacitor connection terminal error output terminal error inverted input terminal boot capacitor connection terminal Connect capacitor between terminals. totem-pole output terminal (External main-side gate drive) external main-side source connection terminal totem-pole output terminal (External synchronous-rectification-side gate drive) Ground terminal connection Output circuit bias output terminal overcurrent detection resistor connection terminal Reference voltage, control circuit power supply terminal overcurrent detection resistor connection terminal Ground terminal totem-pole output terminal (External synchronous-rectification-side gate drive) external main-side source connection terminal totem-pole output terminal (External main-side gate drive) boot capacitor connection terminal Connect capacitor between terminals. Descriptions error inverted input terminal
CTL2 CSCP PWRGOOD -INE2 OUT1-2 OUT2-2 PGND2 ILIM2 ILIM1 PGND1 OUT2-1 OUT1-1
MB39A106
BLOCK DIAGRAM
Reg.
priority priority
Dead Time Modulation Comp.1 Duty OUT1-1 OUT2-1 PGND1 Current Protection Logic ILIM1
-INE1 VREF Buff CTL1 Open CTL1
1.23 Comp.1 1.38
Error Amp1
priority
priority
-INE2 VREF Buff CTL2 Open CTL2
Error Amp2 1.23 Comp.2 1.38
Dead Time Modulation
Comp.2 Duty
OUT1-2 Comp.2 OUT2-2 PGND2
Current Protection Logic
ILIM2
priority
Comp.
UVLO release Latch1
protection operation
CTL1 CTL2 CTL1 CTL2 Latch Latch2
PWRGOOD Protection control signal
CSCP
VREF UVLO
Error reference 1.23 bias VREF
Power ON/OFF SGND
VREF
(Power (Standby mode)
MB39A106
ABSOLUTE MAXIMUM RATINGS
Parameter Power-supply voltage Boot voltage Output current Peak output current Power dissipation Storage temperature Symbol TSTG Condition terminal Duty fOSC Duty) Rating 1390* +125 Unit
packages mounted dual-sided epoxy board WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
MB39A106
RECOMMENDED OPERATING CONDITIONS
Parameter Power-supply voltage Boot voltage Reference voltage output current Bias output current Input voltage Output voltage Output current Peak output current Oscillation frequency Timing resistor Boot capacitor Reference voltage output capacitor Bias output capacitor Soft-start capacitor Short-circuit detection capacitor Overcurrent detection setting resistor Operating ambient temperature Symbol VCTL fOSC CREF CSCP RLIM Condition terminal VREF terminal terminal -INE terminal CTL1, CTL2 terminal terminal PWRGOOD terminal Duty fOSC Duty) VREF terminal terminal Value 0.01 VREF +100 +700 Unit
WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their representatives beforehand.
MB39A106
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
(VCC VREF Conditions VREF VREF Value 3.465 5.88 VREF 0.65 1.35 -730 3.500 0.5* 6.00 0.2* 0.70 1.38 -110 3.535 6.12 0.75 1.41
Unit
VREF Reference Voltage Block [REF] Output voltage VREF/ VREF Input stability Load stability Short-circuit output current Bias Voltage Block [VB] Triangular Waveform Oscillator Block [OSC] Output voltage Oscillation frequency Frequency/ temperature variation Line Load fOSC
fOSC/ fOSC VRST ICSCP ILIM -INE -INE PWRGOOD VREF
Threshold Undervoltage voltage (VCC) Hysteresis Lockout Circuit width Block [UVLO] Reset voltage Short-circuit Protection Circuit Block [SCP] Overcurrent Protection Circuit Block [OCP] Overvoltage Protection Circuit Block [OVP] Protection Status Output Circuit Block [PWRGOOD] Soft-start Circuit Block [CS] Threshold voltage Input source current ILIM terminal input current Offset voltage Threshold voltage Input bias current Output leakage current Output level voltage Charge current
ILEAK
PWRGOOD
(Continued)
MB39A106
(VCC VREF Parameter
Symbol
Conditions
Value 1.221 1.218 1.230 1.230 1.5* 2.86 1.239 1.242 3.00
Unit
Threshold voltage Input bias current Error Block [Error Amp] Voltage gain Frequency bandwidth Output voltage Output source current Output sink current Comparator Block [PWM Comp.] Dead Time Control Block [DTC]
VTH1 VTH2 VFBH VFBL
-INE
ISOURCE ISINK Duty cycle Duty cycle OUT1 Duty fOSC Duty) OUT1 Duty fOSC Duty) OUT1 OUT1 OUT2 fOSC Duty)
Threshold voltage Maximum duty cycle
ISOURCE1
700*
Output current (main side) ISINK1
900* 750*
Output Block [Drive]
Output voltage (main side)
VOH1 VOL1
Output current (synchronous rectification side)
ISOURCE2 Duty
ISINK2
OUT2 Duty fOSC Duty)
900*
(Continued)
MB39A106
(Continued) Parameter Output voltage (synchronous rectification side) Output Block [Drive] Diode voltage
Symbol
(VCC VREF Value Unit Conditions OUT1 OUT2 VREF
VOH2 VOL2
OUT2 OUT2
OUT1 OUT2 OPEN,
Dead time Output condition Output condition Control Block [CTL, CTL1, CTL2] Output condition Output condition Input current Standby current Power-supply current VOFF VOFF ICTL ICCS
OUT2
OUT1 OUT2 OPEN,
OUT1
CTL1 CTL2
General
Standard design value
MB39A106
TYPICAL CHARACTERISTICS
Power Supply Current Power Supply Voltage
Reference Voltage Power Supply Voltage
VREF
Power Supply current (mA)
Reference voltage VREF
Power supply voltage Reference Voltage Load Current
Power supply voltage Reference Voltage Ambient Temperature
VREF
Reference voltage VREF
Reference voltage VREF
-0.5 -1.0 -1.5 -2.0
+100
Load current IREF (mA) Terminal Current, Reference Voltage Terminal Voltage
Ambient temperature (°C) Triangular Wave Oscillation Frequency Timing Resistor
1000
terminal current ICTL (µA)
VREF
Reference voltage VREF
Triangular wave oscillation frequency fOSC (kHz)
VREF
ICTL
1000
terminal voltage VCTL
Timing resistor (Continued)
MB39A106
Triangular Wave Oscillation Frequency Power Supply Voltage
Triangular Wave Oscillation Frequency Ambient Temperature
-0.5 -1.5 +100
Triangular wave oscillation frequency fosc (kHz)
Triangular wave oscillation frequency fOSC/fOSC
Power supply voltage Error Amplifier Threshold Voltage Ambient Temperature
1.244 1.242 1.240 1.238 1.236 1.234 1.232 1.230 1.228 1.226 1.224 1.222 1.220 1.218
Ambient temperature
Error amplifier threshold voltage
+100
Ambient temperature Error Amplifier, Gain, Phase Frequency
(15) (13)
Phase (deg)
Gain (dB)
(14)
-180
1.23
Error Amp1 (Error Amp2)
Frequency (Hz) (Continued)
MB39A106
(Continued)
Power Dissipation Ambient Temperature
1600
Power dissipation (mW)
1400 1390 1200 1000 +100
Ambient temperature
MB39A106
FUNCTIONS
DC/DC Converter Functions
Reference voltage block (Ref) reference voltage circuit generates temperature-compensated reference voltage (typically using voltage supplied from power supply terminal (pin voltage used reference voltage IC's internal circuit. reference voltage used supply load current external device through VREF terminal (pin Triangular-wave oscillator block (OSC) triangular waveform oscillator incorporates triangular oscillation frequency setting capacitor connected respectively terminal (pin generate triangular oscillation waveforms (amplitude (amplitude antiphase with CT1). symmetrical-phase system using opposite-phase triangular waves reduces input ripple current, resulting smaller input capacitor. triangular oscillation waveforms input IC's internal comparator. Error amplifier block (Error Amp1, Error Amp2) error amplifier detects DC/DC converter output voltage outputs control signals. connecting feedback resistor capacitor between output terminal inverted input terminal, possible create desired level loop gain, thereby providing stable phase compensation system. Also, possible prevent rush current power supply start-up connecting soft-start capacitor terminal (pin terminal (pin 13), non-inverted input terminal Error Amp. Error soft-start detection makes possible system operate fixed soft-start time that independent output load converter. comparator block (PWM Comp.) comparator voltage-pulse width modulator that controls output duty depending input/output voltage. Main side Turns output transistor intervals which error amplifier output voltage higher than triangular wave voltage. Synchronous rectification side Turns output transistor intervals which error amplifier output voltage lower than triangular wave voltage. Output block output circuits main side synchronous rectification side both totem pole configuration, capable driving external N-ch FET. addition, because output drive ability (700 Duty high, gate source capacity large resistor used.
MB39A106
Channel Control Function
Channels, main, PWRGOOD turned depending voltage levels terminal (pin CTL1 terminal (pin CTL2 terminal (pin 10). Channel On/Off Setting Conditions CTL1 CTL2 Power PWRGOOD Undefined
Protective Functions
Undervoltage lockout protection circuit (UVLO) transient state momentary drops supply voltage, which occurs when power supply turned cause control malfunction, resulting breakdown degradation system. prevent such malfunctions, undervoltage lockout protection circuit detects internal reference voltage level with respect power supply voltage, turns output transistor, sets dead time 100% while holding CSCP terminal (pin level setting PWRGOOD terminal (pin level. system restored when supply voltage reaches threshold voltage undervoltage lockout protection circuit. Timer-latch overcurrent protection circuit block (OCP) timer-latch overcurrent protection circuit actuated upon completion soft-start period. When overcurrent flows, circuit detects increase voltage between main-side FET's drain source using main-side resistor, actuates timer circuit, starts charging capacitor CSCP connected CSCP terminal (pin 11). overcurrent remains flowing beyond predetermined period time, circuit sets latch turn FETs main side synchronous rectification side each channel while setting PWRGOOD terminal (pin level. detection current value resistor RLIM1 connected between main-side FET's drain ILIM1 terminal (pin resistor RLIM2 connected between drain ILIM2 terminal (pin 23). reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level. (Refer Setting TimerLatch Overcurrent Detection Current" ABOUT TIMER-LATCH PROTECTION CIRCUIT.) Timer-latch short-circuit protection circuit (SCP) short-circuit detection comparator (SCP Comp.) detects output voltage level and, error amplifier output voltage either channel reaches short-circuit detection voltage (typically timer circuit actuated start charging external capacitor Cscp connected CSCP terminal (pin 11). When capacitor voltage reaches about circuit turns output transistor sets dead time 100%. PWRGOOD terminal (pin fixed level. reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level. (Refer Setting Time Constant Timer-Latch Short-Circuit Protection Circuit" ABOUT TIMER-LATCH PROTECTION CIRCUIT.)
MB39A106
Timer-latch overvoltage protection circuit block (OVP) When overvoltage detection comparator (OVP Comp.) provided each channel detects DC/DC converter's output voltage level exceeding threshold voltage, timer-latch overvoltage protection circuit actuates timer circuit starts charging capacitor CSCP connected CSCP terminal (pin 11). overvoltage remains applied beyond predetermined period time, circuit sets latch turn main side each channel while setting PWRGOOD terminal (pin level. reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level. (Refer Setting Overvoltage Detection Timer-Latch Overvoltage Protection Circuit" ABOUT TIMER-LATCH PROTECTION CIRCUIT.) Protection status output circuit block (PWRGOOD) protection status output circuit outputs level signal PWRGOOD terminal (pin when each protection circuit actuated.
MB39A106
SETTING OUTPUT VOLTAGE
(-INE2) -INE1
Error
1.23
(CS2)
1.23
CH1,
SETTING TRIANGULAR OSCILLATION FREQUENCY
triangular oscillation frequency determined timing resistor (RT) connected terminal (pin Triangular oscillation frequency: fOSC fOSC (kHz) 14100
MB39A106
SETTING SOFT-START DISCHARGE TIMES
prevent rush currents when turned soft-start connecting soft-start capacitors (CS1 CS2) terminal (pin channel terminal (pin channel respectively. Setting each control terminals (CTL1 CTL2) from "OPEN" switches from charge external soft-start capacitors (CS1 CS2) connected terminals error amplifier output (FB1 FB2) determined comparison between lower potentials noninverted input terminals (1.23 terminal voltages) inverted input terminal voltage (-INE). terminal voltage during soft-start period therefore determined comparison between -INE terminal terminal voltages. DC/DC converter output voltage rises proportion terminal voltage soft-start capacitor connected terminal charged. soft-start time obtained from following equation: Soft-start time: (time output 100%) 0.41 (µF) Setting each control terminals (CTL1 CTL2) from "OPEN" switches from Then discharges soft-start capacitors (CS1 CS2) charged about using internally discharge resistor lowers output voltage regardless DC/DC converter load current. discharge time obtained from following equation: Discharge time: toff (time output 10%) toff 0.020 (µF)
terminal voltage 1.23 0.123
OPEN
Error block comparison voltage -INE voltage
Soft-start time (ts)
Discharge time (toff)
signal
MB39A106
-INE1 (CS2)
priority
Error 1.23 VREF
CTL2 CTL1 Open CTL1 Buff (SW2) Soft-start Discharge
<Soft-start circuit>
TREATMENT UNUSED TERMINALS
When soft-start function used, terminal (pin terminal (pin should left open.
"OPEN"
"OPEN"
Operation Without Soft-start Setting
MB39A106
ABOUT TIMER-LATCH PROTECTION CIRCUIT
Setting Timer-Latch Overcurrent Detection Current
overcurrent protection circuit actuated upon completion soft-start period. When overcurrent flows, circuit detects increase voltage between main-side FET's drain source using main-side resistor (RON), actuates timer circuit, starts charging capacitor CSCP connected CSCP terminal (pin 11). overcurrent remains flowing beyond predetermined period time, circuit sets latch turn FETs main side synchronous rectification side each channel while setting PWRGOOD terminal (pin level. detection current value resistors (RLIM1 RLIM2) connected between main-side FET's drain ILIM1 terminal (pin between drain ILIM2 terminal (pin 23), respectively. internal current (ILIM) timing resistor (RT) connected terminal (pin Internal current value: ILIM ILIM (µA) 5546
Detection current value: IOCP IOCP ILIM(A) RLIM() (VIN(V) VO(V)) VO(V) VIN(V) fOSC(Hz) L(H)
RLIM: Overcurrent detection resistor RON: Main-side resistor VIN: Input voltage DC/DC converter output voltage fOSC: Oscillation frequency Coil inductance reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level.
(VS2)
Current Protection Logic
(ILIM2) ILIM1
PWRGOOD CTL1 CTL2 VREF UVLO
CSCP
Latch Latch2
<Overcurrent detection circuit>
MB39A106
Setting Time Constant Timer-Latch Short-Circuit Protection Circuit
Each channel uses short-circuit detection comparator (SCP Comp.) always compare error amplifier's output level reference voltage. While DC/DC converter load conditions stable both channels, short-circuit detection comparator keeps output level CSCP terminal (pin remains level. load condition changes rapidly short-circuit load, causing output voltage drop, shortcircuit detection comparator changes output level. This causes external short-circuit protection capacitor Cscp connected CSCP terminal charged Short-circuit detection time (tSCP) tSCP 0.070 CSCP (µF) When capacitor Cscp charged threshold voltage (VTH 0.70 protection circuit sets latch turns external (setting dead time 100%). this time, latch input closed. result, CSCP terminal held level PWRGOOD terminal level. protection circuit closes both channels even when short-circuit detected only either. reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level.
(FB2)
(-INE2) -INE1
Error
1.23 Comp.
PWRGOOD
CTL1 CTL2 VREF UVLO
CSCP
Latch Latch2
<Timer-latch short-circuit protection circuit>
MB39A106
Setting Overvoltage Detection Timer-Latch Overvoltage Protection Circuit
overvoltage output from DC/DC converter detected connecting external resistors from converter output noninverted input terminal (-INE1 terminal (pin -INE2 terminal (pin 15)) overvoltage comparators (OVP Comp. Comp. When DC/DC converter output voltage exceeds overvoltage detection level, output overvoltage comparator (OVP Comp. Comp. becomes level overvoltage protection circuit actuates timer circuit start charging external capacitor Cscp connected CSCP terminal (pin 11). overvoltage remains applied beyond setting time, circuit sets latch turn main side each channel while setting PWRGOOD terminal (pin level. protection circuit closes both channels even when overvoltage detected only either. Overvoltage detection voltage VOVP VOVP 1.38 1.12 reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level.
(-INE2) -INE1 Error
1.23 Comp. 1.38
PWRGOOD CTL1 CTL2 VREF UVLO
CSCP
Latch Latch2
<Timer-latch overvoltage protection circuit>
MB39A106
TREATMENT UNUSED ILIM TERMINALS
When overcurrent protection circuit used, ILIM1 terminal (pin ILIM2 terminal (pin should shorted SGND terminal.
ILIM1
ILIM2
SGND
<Operation Without Using ILIM Terminals>
PROCESSING WITHOUT USING CSCP TERMINAL
When timer-latch short-circuit protection circuit used, CSCP terminal (pin should shorted SGND using shortest possible connection.
SGND
CSCP
<Operation Without Using CSCP Terminal>
TREATMENT UNUSED PWRGOOD TERMINALS
When PWRGOOD terminal used, PWRGOOD terminal (pin should shorted open SGND terminal.
SGND
"Open" PWRGOOD PWRGOOD
<Operation Without Using PWRGOOD Terminals>
MB39A106
OUTPUT STATES DURING PROTECTION CIRCUIT OPERATION
table below lists output states with each protection circuit actuated. Output terminal Protection circuit OUT1-1 OUT2-1 OUT1-2 OUT2-2 Overcurrent protection circuit Overvoltage protection circuit Short-circuit protection Under voltage lockout protection circuit PWRGOOD
RESETTING LATCH EACH PROTECTION CIRCUIT
When overvoltage, overcurrent, short-circuit protection circuit detects each abnormality, sets latch output level. PWRGOOD terminal (pin fixed level upon abnormality detection each protection circuit. reset actuated protection circuit, either power supply turn again terminal (pin level lower VREF terminal (pin voltage (Min) less. also reset setting both CTL1 terminal (pin CTL2 terminal (pin level.
MB39A106
NOTE IC'S INTERNAL POWER CONSUMPTION
oscillation frequency total gate charge FETs largely affects internal dissipation attention following point with respect internal power consumption when applications used. (mean current) obtained from following equation, assuming total gate charges applied gate capacitors (Ciss1, Ciss2, Crss1, Crss2) external FETs Current channel Ibias1 Ibias2 (Ibias1 Ibias2
current consumption excluding about power consumption obtained from following equation Power consumption 0.015
Crss1 OUT1-1 Ciss1 Ciss2 Crss2
Drive
Drive
OUT2-1 PGND1
VOUT1-1
VOUT2-1
Bias current Ibias1 Bias current Ibias2
Refer "Power Consumption Input Voltage" next page reference above method obtaining power consumption design your application taking account "Power Dissipation Ambient Temperature" characteristic TYPICAL CHARACTERISTICS.
MB39A106
Power Consumption Input Voltage Parameter)
Power consumption
fOSC
Input voltage
Power Consumption Input Voltage (fOSC Parameter)
Power consumption
fOSC
fOSC fOSC fOSC fOSC
Input voltage
MB39A106
EQUIVALENT CIRCUIT <Reference voltage block>
1.23
Control block>
Channel control block>
VREF (3.5
Protection Element
VREF
46.6
Protection Element
CTLX
Protection Element
24.6
SGND
SGND
SGND VREF (3.5
Soft-start block>
Short-circuit protection circuit block>
VREF (3.5
Triangular wave oscillator block (RT)
VREF (3.5 1.40
CSCP
SGND VREF (3.5 PWRGOOD SGND SGND
Overcurrent protection circuit block (CH1, CH2)
ILIMX
Protection status output circuit block>
SGND SGND
Error amplifier block (CH1, CH2)
VREF (3.5 -INEX 1.23
Output block main side>
OUT1-X SGND
Output block synchronous rectification side (CH1, CH2)
SGND
OUT2-X
Each channel
PGNDX
MB39A106
APPLICATION EXAMPLE
Reg. 0.022 -INE1
priority priority
OUT1-1 OUT2-1 PGND1
Dead Time Modulation
VREF Buff
Error Amp1 1.23 Comp.1 1.38
Comp.1 Duty
V/10
CTL1
Open CTL1 0.022 -INE2
priority priority
Current Protection Logic
ILIM1
Dead Time Modulation
OUT1-2 OUT2-2
VREF Buff
AC/DC Converter CTL2
Error Amp2 1.23 Comp.2 1.38
Comp.2
Duty
PGND2
Open CTL2
priority
Current Protection Logic UVLO release
ILIM2
Comp.
Latch1 CTL1 CTL2 CSCP 0.01 CTL1 CTL2 Latch Latch2
protection operation
PWRGOOD Protection control signal
VREF UVLO
Error reference 1.23 bias VREF Power ON/OFF
(Power/ON) (Standby mode)
VREF
SGND
MB39A106
PARTS LIST
COMPONENT ITEM SPECIFICATION Main sides: (Max) Synchronous sides: 20.7 (Max) SBD: 0.52 (Max) 0.022 0.022 0.01 31.6 VENDOR PARTS
Dual FETKY
IRF7901D1
C11, C15, C17, C25,
Coil Ceramics Condenser OS-CONCeramics Condenser OS-CONCeramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser OS-CONResistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor
SANYO SANYO SANYO
SLF12565T220M3R5 C1608JB1H104K 6SVP150M C1608JB1H104K 6SVP150M C3216JB1A475M C1608JB1H223K C1608JB1H104K C1608JB1H223K C1608JB1H103K C1608JB1H104K C1608JB1H104K 16SVP82M RR0816P132D RR0816P104D RR0816P473D RR0816P133D RR0816P103D RR0816P622D RR0816P434D RR0816P133D RR0816P103D RR0816P124D RR0816P332D
Note International Rectifier Corp. Corporation SANYO SANYO Electric Co., Ltd. SUSUMU Electronics Corp. Dual FETKY trademark International Rectifier Corp. OS-CON trademark SANYO Electric Co., Ltd.
MB39A106
SELECTION COMPONENTS
N-ch
N-ch switching should rated least more than maximum input voltage. minimize continuity loss, with RDS(ON) between drain source. high input voltage high frequency operation, on/off-cycle switching loss will higher that power dissipation must considered. this application, IRF7901D1 used. Continuity loss, on/off switching loss, total loss determined following formulas. selection must ensure that peak drain current does exceed rated values, also must accordance with overcurrent detection levels. Continuity loss (ON) Duty On-cycle switching loss (ON) (Max) fOSC (ON) Off-cycle switching loss (OFF) (Max) (Max) fOSC (OFF) Total loss (ON) (OFF) Example: Using IRF7901D1 Main side Input voltage (Max) output voltage drain current Oscillation frequency fOSC kHz, drain-source resistance (ON) 13.8 Drain current (Max) (Max) (Max) (Max) 15-3.3 10-6
0.22
3.20 Drain current (Min) (Min) (Max) (Min) 15-3.3 10-6
0.22
2.80
MB39A106
(ON) Duty (ON)
0.033 0.22
(ON)
0.065 (Max) fOSC 13.8 10-9
0.031 (Max) (Max) fOSC 10-9
(OFF)
0.019
(ON) (OFF) 0.065 0.031 0.019 0.115 (Synchronous rectification side) Input voltage (Max) output voltage drain current oscillation frequency fOSC kHz, drain-source resistance (ON) 16.4 Drain current (Max) (Max) (Max) toff 10-6 (1-0.22)
3.20 Drain current (Min) (Min) (Min) toff 10-6 (1-0.22)
2.80
MB39A106
(ON) Duty (OFF) 0.028 (1-0.22) 0.197 (ON) (Max) fOSC 16.4 10-9
0.037 (OFF) (Max) (Max) fOSC 10-9
0.012 (ON) (OFF) 0.197 0.037 0.012 0.246 0.115 0.246 0.361
above power dissipation figures IRF7901D1 satisfied with ample margin +100
MB39A106
(Main side) Input voltage (Max) output voltage drain current Oscillation frequency fOSC kHz, drain-source resistance (ON) 13.8 Drain current (Max) (Max) (Max) (Max) 15-5 10-6 0.33
3.25 Drain current (Min) (Min) (Max) (Min) 15-5 10-6 0.33
2.75
(ON) Duty (ON) 0.033 0.33 0.098
(ON) (OFF)
(Max) fOSC 13.8 10-9 0.031 (Max) (Max) fOSC 3.25 10-9 0.020
(ON) (OFF) 0.098 0.031 0.020 0.149
MB39A106
(Synchronous rectification side) Input voltage (Max) output voltage drain current Oscillation frequency fOSC kHz, drain-source resistance (ON) 16.4 Drain current (Max) (Max) toff (Max) 10-6 (1-0.33)
3.25
(Min)
toff (1-0.33)
10-6
2.75 (ON) Duty (OFF) 0.028 (1-0.33) 0.169 (ON) (Max) fOSC 16.4 10-9
0.037 (OFF) (Max) (Max) fOSC 3.25 10-9
0.013 (ON) (OFF) 0.169 0.037 0.013 0.219 (OFF) 0.149 0.219 0.368 above power dissipation figures IRF7901D1 satisfied with ample margin +100
MB39A106
Inductors
selecting inductors, course essential apply more current than rated capacity inductor, also note that lower limit ripple current critical point that reached will cause discontinuous operation considerable drop efficiency. This prevented choosing higher inductance value, which will enable continuous operation under light loads. Note that inductance value high, however, direct current resistance (DCR) increased this will also reduce efficiency. inductance must point where efficiency greatest. Note also that superimposition characteristics become worse load current value approaches rated current value inductor, that inductance value reduced ripple current increases, causing loss efficiency. selection rated current value inductance value will vary depending where point peak efficiency lies with respect load current. Inductance values determined following formulas. value load current condition that peak peak value ripple current load current less. Inductance value (VIN-VO) Example: (VIN (Max) -VO) (15-3.3) 0.22
(VIN (Max) -VO) (15-5) 0.33
Inductance values derived from above formulas values that provide sufficient margin continuous operation maximum load current, which continuous operation possible light loads. therefore necessary determine load level which continuous operation becomes possible. this application, SLF12565T-220M3R5 used. load current value under continuous operating conditions determined following formula. Load current value under continuous operating conditions toff Example Using SLF12565T-220M3R5 (allowable tolerance ±20%) rated current
MB39A106
toff (1-0.22)
10-6
toff (1-0.33)
10-6
determine whether current through inductor within rated values, necessary determine peak value ripple current well peak-to-peak values ripple current that affect output ripple voltage. peak value peak-to-peak value ripple current determined following formulas. Peak value
Peak-to-peak value Example: Using SLF12565T-220M3R5 (allowable tolerance ±20%) rated current Peak value 3.20 3.25 (Max) 15-5 10-6 0.33 (Max) 15-3.3 10-6 0.22
MB39A106
Peak-to-peak value: (Min) 15-3.3 10-6 0.22
0.39 (Max) 15-5 10-6 0.33
Smoothing Capacitor
smoothing capacitor indispensable element reducing ripple voltage output. selecting smoothing capacitor essential consider equivalent series resistance (ESR) allowable ripple current. Higher means higher ripple voltage, that reduce ripple voltage necessary select capacitor with ESR. However, capacitor with have substantial effects loop phase characteristics, therefore requires attention system stability. Care should also taken capacity with sufficient margin allowable ripple current. This application uses 6SVP150M (OS-CON: SANYO) ESR, capacitance value, ripple current calculated from following formulas. Equivalent Series Resistance 2fCL Capacitance value ESR) Ripple current ICLrms (VIN ICLrms
Example: Using 6SVP150M Rated voltage maximum allowable ripple current 2.35 Arms Equivalent series resistance 0.033 0.39 2fCL 10-6
81.1
MB39A106
0.05 2fCL 10-6
96.5 Capacitance value ESR) (0.05 0.035) ESR) 0.39 (0.033 0.39 0.035) 10.7
Ripple current ICLrms (VIN (Max)
3.3) 0.22 10-6
112.6 mArms ICLrms (VIN (Max) 0.33 10-6
114.3 mArms
MB39A106
REFERENCE DATA
Conversion Efficiency Load Current (CH1)
Conversion efficiency
output CTL1 Open CTL2 level
0.10 1.00 10.00
0.01
Load current Conversion Efficiency Load Current (CH2)
Conversion efficiency
output CTL1 level CTL2 Open
0.10 1.00 10.00
0.01
Load current
(Continued)
MB39A106
Switching Waveform (CH1)
output CTL1 Open CTL2 "L"level
(µs)
Expansion
Expansion
(ns)
(ns)
(Continued)
MB39A106
Switching Waveform (CH2)
output CTL1 "L"level CTL2 Open
(µs)
Expansion
Expansion
(ns)
(ns)
(Continued)
MB39A106
(Continued) Soft-start Operating Waveform (CH1)
CTL1 Open CTL2 "L"level
VCTL VCTL
(ms)
Soft-start Operating Waveform (CH2)
VCTL VCTL
CTL1 "L"level CTL2 Open 1.67
(ms)
MB39A106
NOTES
Take account common impedance when designing earth line printed wiring board. Take measures against static electricity. semiconductors, antistatic conductive containers. When storing carrying printed circuit board after chip mounting, conductive container. work table, tools, measuring instruments must grounded. worker must grounding device containing resistors series. apply negative voltage. Applying negative voltage -0.3 less generate parasitic transistor, resulting malfunction.
PRECAUTIONS HANDLING THIS PRODUCT
This product obtained patents patent numbers 6,147,477.
ORDERING INFORMATION
Part number MB39A106PFT-E1 Package 30-pin plastic TSSOP (FPT-30P-M04) Remarks Lead Free version
BOARD ORDERING INFORMATION
board part MB39A106EVB board version Board Rev. Remarks TSSOP-30P
RoHS COMPLIANCE INFORMATION LEAD (Pb) FREE VERSION
products Fujitsu Microelectronics with "E1" compliant with RoHS Directive, observed standard lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) polybrominated diphenyl ethers (PBDE) product that conforms this standard added "E1" part number.
MARKING FORMAT (LEAD FREE VERSION)
XXXX
INDEX
Lead Free version
MB39A106
LABELING SAMPLE (LEAD FREE VERSION)
Lead-free mark JEITA logo JEDEC logo
MB123456P
(3N) 1MB123456P-789-GE1 1000
(3N)2 1561190005 107210
PASS
1,000 MB123456P
2006/03/01
ASSEMBLED JAPAN
MB123456P
0605 Z01A 1000
1561190005
Lead Free version
MB39A106
MB39A106PFT-E1 RECOMMENDED CONDITIONS MOISTURE SENSITIVITY LEVEL
Item Mounting Method Mounting times Before opening Storage period From opening reflow When storage period after opening exceeded Storage conditions Condition (infrared reflow) Manual soldering (partial heating method) times Please within years after Manufacture. Less than days Please processes within days after baking (125 24H)
70%RH less (the lowest possible humidity)
[Temperature Profile Standard Reflow] (infrared reflow) rank
(d')
Temperature Increase gradient Preliminary heating Temperature Increase gradient Actual heating (d')
Cooling
Average °C/s °C/s Temperature Average °C/s °C/s Temperature Max; more, less Temperature more, less Temperature more, less Temperature more, less Natural cooling forced cooling
Note Temperature package body Manual soldering (partial heating method) Conditions Temperature Times max/pin
MB39A106
PACKAGE DIMENSION
30-pin plastic TSSOP
Lead pitch Package width package length Lead shape Sealing method Mounting height
0.50 4.40 7.80 Gullwing Plastic mold 1.10
(FPT-30P-M04)
30-pin plastic TSSOP (FPT-30P-M04)
7.80±0.10(.307±.004) Details part 0~8° 1.10(.043) 4.40 -0.10 6.40±0.10 +.008 .173 -.004 (.252±.004) 0.25(.010)
+0.20
0.60±0.10 (.024±.004)
INDEX
0.10±0.05 (.004±.002)
0.50(.020)
0.20±0.03 (.008±.001)
0.3865(.0152)
0.127±0.03 (.005±.001)
0.10(.004) 7.00(.276)
0.90±0.05 (.035±.002) 0.3865(.0152)
2001 FUJITSU LIMITED F30007SC-1-1
Dimensions (inches). Note: values parentheses reference values.
MB39A106
MEMO
MB39A106
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ further information please contact: North South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 Arques Avenue, Sunnyvale, 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 Korea FUJITSU MICROELECTRONICS KOREA LTD. KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA LTD. Lorong Chuan, #05-08 Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw
Rights Reserved. contents this document subject change without notice. Customers advised consult with sales representatives before ordering. information, such descriptions function application circuit examples, this document presented solely purpose reference show examples operations uses FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does warrant proper operation device with respect based such information. When develop equipment incorporating device based such information, must assume responsibility arising such information. FUJITSU MICROELECTRONICS assumes liability damages whatsoever arising information. information this document, including descriptions function schematic diagrams, shall construed license exercise intellectual property right, such patent right copyright, other right FUJITSU MICROELECTRONICS third party does FUJITSU MICROELECTRONICS warrant non-infringement third-party's intellectual property right other right using such information. FUJITSU MICROELECTRONICS assumes liability infringement intellectual property rights other rights third parties which would result from information contained herein. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that FUJITSU MICROELECTRONICS will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. Exportation/release products described this document require necessary procedures accordance with regulations Foreign Exchange Foreign Trade Control Japan and/or export control laws. company names brand names herein trademarks registered trademarks their respective owners.
Edited Strategic Business Development Dept.

ASSP Power Supply Applications (General Purpose DC/DC Converter)

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