Single Power Supply Audio Interface Unit (AIU) MB86435 DESCR

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Single Power Supply Audio Interface Unit (AIU) MB86435 DESCR

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DS04-23004-1Ea
Single Power Supply Audio Interface Unit (AIU)
MB86435
DESCRIPTION
FUJITSU MICROELECTRONICS MB86435 (audio interface unit) single-power source digital telephone devices, manufactured using CMOS process technology. codec transmission filter characteristics meet G.712 standards, handle input output A-Law, µ-Law linear conversion modes. MB86435 also contains necessary DTMF, microphone receiver amps telephone devices.
FEATURES
single power supply power consumption: muting settings each operating mode Normal operation (speaker mute) Tone generation (speaker mute) Standby mode On-chip codec filter meets G.712 standards Selection codec conversion methods (A-law, µ-law, linear) On-chip low-noise microphone (2-channel) amplification) On-chip receiver speaker amps type: MIN) On-chip tone speaker type: MIN) On-chip earphone speaker amps single type: MIN) (Continued)
PACKAGE
pin, Plastic LQFP
(FPT-64P-M03) Copyright©1997-2008 FUJITSU MICROELECTRONICS LIMITED rights reserved 1997.3
MB86435
(Continued) On-chip electronic volume gain adjustments (sending, receiving, tone) On-chip accessory input/output circuits DTMF generator function Service tone generation CMOS compatible input/output
ASSIGNMENT
(TOP VIEW) Index
(FPT-64P-M03)
MB86435
DESCRIPTION
Symbol VDDAC SYNC Description Bypass capacitor connector reference voltage generator circuit. Place capacitor between pins. Bypass capacitor connector signal ground potential generator circuit. Place capacitor between pins. Analog power supply codec block. within range codec send/receive synchronization signal input pin. Operating clock frequency kHz. CMOS interface. Constant level signal will cause part codec block power-down. Send/receive signal series rate setting input pin. Data rate µ-law, A-law modes level range 3.152 MHz, linear mode range 3.152 MHz. Constant level signal will cause part codec block power-down. CMOS interface. signal input pin. This signal picked internally fall signal. CMOS interface. signal output pin. Data output sync with rise signal. After data output, loses synchronization, power-down this signal fixed level. CMOS interface. Digital power supply pin. within range Digital ground pin. Power-down control signal input pin. CMOS interface. Used with PSC1,2 pins power-down settings. Power-down control signal input pin. CMOS interface. Used with PSC0,2 pins power-down settings. Power-down control signal input pin. CMOS interface. Used with PSC0,1 pins power-down settings.
DOUT PSC0
PSC1
Full power-down VREF operating Tone operating operations available value determined)
PSC2 XPRST
9-bit serial data input pin. CMOS interface. Data written rise signal from this pin. Clock input 9-bit serial data writing. CMOS interface. Data written rise this pin. Serial data latch strobe signal. Data latched level signal. CMOS interface. Digital reset signal input pin. CMOS interface. level: internal latch initialization level: normal operation External control latch output pin. Outputs value address 1000. CMOS interface. External control latch output pin. Outputs value address 1000. CMOS interface. (Continued)
MB86435
Symbol TCLK TONC DSCK EXSD TAUD DSDT TONEO RAUD VDDSP1 JEAR XEAR SPG1 SPG2 XTONE TONE IMTON VDDSP2
Description External control latch output pin. Outputs value address 1000. CMOS interface. External control latch output pin. Outputs value address 1000. CMOS interface. Tone generator clock input pin. used tone signal using address 1110 D4D3 subdivide internal clock signal factors 1/1, 1/2, 1/4. CMOS interface. Tone generator cycle control input pin. CMOS interface. Hlevel signal outputs tone. Ring control output pin. CMOS interface. connected EXSD TAUD switching bus. connected DSCK TAUD switching bus. connected EXSD DSCK switching bus. connected RAUD switching bus. Tone signal output pin. Output external speaker, audio test signal. connected DSDT switching paths. Speaker power supply pin. within range Earphone speaker output pin. Capable output load. Receiver speaker output pin. Internally connected BTL. Maximum output obtained load connecting speaker between XEAR. Receiver speaker output pin. Connected XEAR BTL. Speaker ground pin. Speaker ground pin. Speaker tone output pin. Internally connected TONE BLT. Maximum output obtained load connecting speaker between TONE XTONE. Speaker tone output pin. When speaker used tone, TONE should shorted IMTON. Speaker drive inverted signal input pin. used adjust gain connecting resistance TONE IMTON. Speaker power supply pin. within range AMP3 output pin. Should included together with IM3, prevent offset from entering speakers. AMP3 inverted signal input pin. Receiving volume adjustment circuit output pin. (Continued)
MB86435
(Continued) Symbol PTBO VDDAB XJMIC JMIC JMICO XMICI MICO BTPI BTPO Description AMP2 output pin. AMP2 used, should shorted OP2. AMP2 inverted signal input pin. form circuit with sidetone tone. Melody circuits, used, alsobe connected here. AMP1 output pin. form circuit with include receiving block. AMP1 used, should shorted OP1. AMP1 inverted signal input pin. receiver output pin. Analog ground sending, receiving blocks. Analog power supply sending, receiving blocks. within range Microphone non-inverted signal input pin. Microphone inverted signal input pin. Microphone output pin. Microphone non-inverted signal input pin. Microphone inverted signal input pin. Microphone output pin. Sending block signal ground potential output pin. Buffers voltage. Sending analog signal output pin. ENCODE block input negative input pin. ENCODE block input output pin. Analog ground codec block. connected. left open.
MB86435
BLOCK DIAGRAM
SGO(58) SGC(2) VRH(1) BTPO(63) BTPI(62) BBO(59)
VREF generator
(TYP) 5bit
VREF generator block DOUT SYNC PTBO (49) (47) (48) (45) (46) (44) (43) (42) TONEO (30) TCLK (23) 512K 5bit
Microphone
MICO (57) (56) XMIC (55) JMICO (54) JMIC (53) XJMIC (52) TAUD (28) EXSD (27) DSCK (26) DSDT (29)
Codec block (TYP) -7.5 0.5dB step
-7.5 0.5dB step Sending block
Microphone
SW10 SW11
AMP1
(TYP) 12dB 4.0dB step 3bit Accessory block
SW12 -10.32 SW14
RAUD (31)
AMP2
AMP3
(35) -4.3 XEAR (34)
Receiving block cycle cycle TONC cycle cycle TONC TONE generator TONE generator (TYP) -8.5dB Single-14 dual -7.5 0.5dB step 5bit
Receiver speaker drive block -2.5
JEAR (33)
TONC (24) (51) VDDAB VDDAC (32) VDDSP1 (41) VDDSP2 (10) (36) SPG1 (37) SPG2 (64) (50) (11)
TONC
Earphone speaker drive block IMTON (40) Tone speaker drive block (25)
Tone generator block
TONE (39)
DATA LATCH Control block
SAVE
XTONE (38)
XPRST (15) (16) (17) (18) (19) (20) (21) (22)
Digital input Digital output Analog input
PSC0 PSC1 PSC2 (12) (13) (14)
Analog output
Input/output
MB86435
FUNCTIONAL DESCRIPTION
Register Settings MB86435 chip controls electronic volume, switching, tone generator circuits power-down control circuits means SRD, data input signals. MB86435 uses 9-bit serial data format consisting 4-bit address followed data bits. Data picked rise signal, latched L-level signal. 9-bits serial data preceding signal considered valid. These register settings reset power-down. They reset when data initialized XPRST L-level signal. Mode Settings Control segment TX-MUTE RX-MUTE Address Data Setting description Sending audio level adjustment. Adjusts gain. Sending audio level adjustment. Adjusts gain. Sending audio level adjustment. Adjusts gain. Sending audio mute on/off control. Mute: Unmute: Sending audio mute control. Mute: Unmute: TAUD mute on/off control. Mute: Unmute: JMIC mute on/off control. Mute: Unmute: mute on/off control. Mute: Unmute: RAUD mute on/off control. Mute: Unmute: EAR, XEAR mute on/off control. Mute: Unmute: TONE, XTONE mute on/off control. Mute: Unmute: JEAR mute on/off control. Mute: Unmute: JEAR attenuation level switch. -2.5 -8.5
Initial data setting reset) Remarks
(Continued)
MB86435
(Continued) Control segment SW10 Address Data Setting description EXSD selection on/off control. Off: DSDT selection on/off control. Off: DSCK selection on/off Off: TONEO mute on/off control. Mute: Unmute: TONE sending on/off control. Off: Parallel output LO3, LO2, LO1,
Initial data setting reset) Remarks
SW12 SW11 SW14 Serial/ parallel converter
Frequency control TONE control
Output control
Master clock control
Tone level adjustment. Adjusts gain. Tone frequency control, 8-bit value output trapezoidal wave, output sine wave. Tone frequency control, 8-bit value output trapezoidal wave, output sine wave. Tone generator control tone on/off control. off: tone on/off control. off: output on/off control. off: Tone TCLK1/1 frequency selected TCLK1/2 frequency selected TCLK1/4 frequency selected Prohibited control µ-law mode selected A-law mode selected linear mode selected write test mode.
*11,
*13,
TEST
(Continued)
MB86435
*10: *11: *12: *13: *14: Electronic Volume Controls Sending Audio Mute Setting Power Saving Modes Receiving Audio Mute Settings Analog Input Accessory Input Analog Output Accessory Output Tone Generator Circuit Tone Generator Control Output Level Parallel Output Tone Generator Circuit Tone Frequency Control Registers Tone Generator Circuit Tone Output Waveforms Tone Generator Circuit Tone Output Controls Tone Generator Circuit Output Controls Codec Input/Output Codec SYNC
MB86435
Sending Audio Mute Settings Switches have following functions. Address 0100 signals have priority. Setting Address Data muted, Switching setting
unmuted, determined
Receiving Audio Mute Settings Switches have following functions. Address 0100 signals have priority. Setting Address Switching setting
Data muted,
unmuted, determined
MB86435
Electronic Volume Controls There four different electronic volume controls, through EV3, with following specifications. Electronic volume control settings made SRD, signals, setting values reset XPRST signal. However, settings reset PSC0, PSC1, PSC2 power-down mode operations. Table Data value Relation Volume Control Data Values Gain sending gain adjustment Typ. -7.5 -7.0 -6.5 -6.0 -5.5 -5.0 -4.5 -4.0 -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 sending gain adjustment Typ. -7.5 -7.0 -6.5 -6.0 -5.5 -5.0 -4.5 -4.0 -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 sending gain adjustment Typ. sending gain adjustment Typ. -7.5 -7.0 -6.5 -6.0 -5.5 -5.0 -4.5 -4.0 -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5
Step
Unit
Note: Each setting value determined relation initial setting value. Returns initial value reset parts) data bits Table Volume control Condition Gain deviation, with respect reference value shown Table1 Input frequency 1020 Input level Volume Gain Deviation Min. Reference value Reference value Typ. Reference value Reference value Max. Reference value Reference value Unit
MB86435
Tone Generator Circuit Tone Frequency Control Registers tone generator uses clock signal obtained subdividing TCLK clock signal input 1/1, according data address 1110. Table Address 1110 Tone Clock Frequency Register Control Tone generator clock signal (fIN) TCLK input clock signal TCLK input clock signal subdivided TCLK input clock signal subdivided Prohibited
Frequency settings available through tone frequency control register determined following formula. Frequency setting fIN/(12*(1+n)), n=1, 255. (where fIN: tone generator clock signal frequency). Therefore available frequency setting range when between fmin fmax 21333 Frequency settings corresponding each DTMF rated reference frequency shown following table.
Table Rated reference frequency (generator frequency) Service tone (single tone) 2000 2600 tone High tone 1209 1336 1477 1633
Tone Frequency Register Control (Condition: kHz) Address 1010/1100 Data Address 1011/1101 Data Error
Tone type
Frequency setting 261.7 384.4 398.7 2031.7 2666.7 699.4 775.7 853.3 948.1 1219.0 1333.3 1471.3 1641.0
-0.11% 0.10% -0.32% 1.56% 2.50% 0.34% 0.74% 0.15% 0.75% 0.82% -0.20% -0.38% 0.48%
Note: Setting values display values Error represents frequency setting error with respect rated reference frequency.
MB86435
Tone Output Waveform data address 1010, 1100 used select either sine-wave trapezoidal waveforms tone output.
Sine wave output
Trapezoidal wave
output
Tone Output Control Tone output controlled address through external tone control input TONC. addition, tone control offers choice sine trapezoidal waveforms.
Address 1110
DATA (Tone control) Address 1110 DATA (Tone control)
TONC
TONEO
Single tone
Output Controls Output from output pins controlled TONC signal address 1110 data When TONC signal H-level, address 1110 data value L-level, output level will high. Output levels CMOS levels.
Address 1110 DATA TONC
Dual tone
Single tone
Disable
Disable
MB86435
Tone Generator Control Output Level (Condition: External pins Tone generator Address Address circuit 0111 1110 operating data bits data bits mode Tone Tone Output mode TONEO Single tone output Single tone output Dual tone output
Remarks
PSC2 PSC1 PSC0 TONC (SW2)
Operational,
Power down, High-impedance, L-level fixed, SGC: fixed
Note: When TONC signal L-level, tone generator circuit counters will reset. When dual tone generated time reset, initial phase settings tone tone will phase. Example: When Tone (1), Tone same frequency:
TONE
Tone
Tone
TONEO
MB86435
Codec Input/Output Both µ-law A-law coding/decoding conversion processes used MB86435 codec compatible with CCITT Recommendation G.711. addition, linear coding form 14-bit two's complement code output starting with values.
SYNC Din, Dout
Code
PTBO reference voltage 0.7354 1.4991 1.5000 1.5009 2.2647
Codec SYNC codec block requires input sampling clock signal SYNC pin, well data transfer clock pin. order conserve power consumption, whenever SYNC signal inactive, system goes into SYNC power-down mode stops code conversion. Also, either SYNC pins encounters jitter greater, system into power-down mode.Table 1.10 shows status output pins SYNC power-down mode. symbol DOUT PTBO BTPO Operation Normal operation (1.5 Normal operation (1.5 Normal operation (2.5 H-level fixed High impedance
MB86435
Parallel Output pins carry latched output external controls. data written address 1000 output through these pins. Output CMOS output.
Address 1000
(Inside
Analog Input Analog input signals MB86435 include microphone inputs three accessory input. Microphone Amps microphone amps take incoming signal from microphones amplify desired level gain. microphone lines low-noise types with piezoelectric-ceramic capacitor microphones, capable wide range amplification. microphones amps must coupled with capacitors prevent amplification offset signals.
Piezoelectric-ceramic type MICO
XMIC
(Inside
Capacitor type MICO
XMIC
(Inside
MB86435
Table Parameter Gain measurement range Minimum load level Maximum output level Accessory Input Direct input from TAUD codec unit possible through SW5, without passing through microphone amp. Care must taken with input signal this case, however, because input resistance highimpedance level. Microphone output added signal using switching controls. this case, result will additional output level. addition, SW10 SW11 used transmit digital data from TAUD EXSD DSCK, allowing sending data without modification.
TAUD CODEC
Microphone Characteristics Characteristics (typ) 0.75
SW10 EXSD SW11 (Inside DSCK
Note: TAUD, EXSD, DSCK contain digital buffers. used, TAUD, EXSD DSCK should connected SGC.
Analog Output MB86435 total four analog output circuits, including three speaker drive circuits (receiver, earphone tone) accessory output. Speaker Drive speaker drive amps include circuits (receiver tone) with output system (earphone) with single output. Because speaker requires relatively high levels power, connected speaker selection switches (sw6-sw9) power-down mode selection. systems (receiver earphone) have fixed gain levels, while other system (tone) allows gain adjustment means external resistors. Table Parameter Output type Load resistance Load resistance Load capacity Final stage gain Maximum output power Speaker Drive Output Standards Earphone speaker (JEAR) Single (typ) (typ) -2.5 dB/-8.5 (JEAR) (min) Tone speaker amps (TONE, XTONE) (typ) (typ) (between TONE-XTONE) (min)
Receiver speaker amps (EAR, XEAR) (typ) (typ) -4.3 (between EAR-XEAR) (min)
Dynamic-type speaker Piezoelectric-ceramic type speaker
MB86435
Analog Output Connection Example
Receiver speaker Dynamic type: (typ) Piezoelectric-ceramic type: (typ)
XEAR
-2.5dB
JEAR -8.5dB
Earphone speaker Dynamic type: (typ) Piezoelectric-ceramic type: (typ)
IMTON TONE
XTONE (Inside
Tone speaker Dynamic type: (typ) Piezoelectric-ceramic type: (typ) G=20 (2*R [dB]
Note: should given respective values 0.01 order prevent unwanted oscillation. piezoelectric-ceramic type microphone used, should given respective values order prevent unwanted oscillation.
Tone Speaker Used
IMTON
TONE
(Inside XTONE
Note: When tone speaker used, input IMTON output TONE should shorted together.
MB86435
Accessory Output accessory output (RAUD pin) carry either digital analog output signals, controlled address 0101 data address 0111 data 12). When both position, accessory outputline (high impedance) state. Caution: never place both position same time. This cause MB86435 function improperly. SW12 Position
DSDT Digital signal input RAUD Digital signal output (digital signal buffered) (Inside
Address
Data
Position
Analog input
RAUD Analog output
(Inside
driven with load resistance greater
Address
Data
MB86435
Receiver Connections possible tones adjust sidetones using electronic volume control. When using however, necessary include avoid interference from speaker Tone Sidetone Addition Inclusion Secondary Primary HPF.
AMP1 TONEO (tone) (sidetone) AMP2 Signal addition R4=R5=R6=R7=100 C3=C4=0.1µF PTBO (receiving)
Secondary -R2/R3 /Q=1/C2 (1/R1+1/R2+1/R3) 2=1/(R1
IMTON AMP3 (Inside following settings necessary comply with CCITT Recommendation R8=R9=100 C5=0.039µF Primary -R9/R8 fc=1/(2C5 C6=0.1µF
Amp1, Amp2 used
AMP2 AMP1 (Inside open
(Inside
Note: When amps used, input output should shorted together.
MB86435
Tone Sidetone Addition Inclusion Third-Order
AMP1 TONEO(tone) BBO(sidetone) AMP2 Signal addition 0.1µF PTBO (receiving) Secondary -C8/C9 1/(R10 1/(R10
IMTON AMP3 (Inside Primary -R9/R8 1/(2C16 0.1µF
MB86435
Power Saving Modes Mode Selection MB86435 power saving modes controlled using external control signal lines lines). also possible apply power saving modes speaker amps with high power consumption levels writing changes register settings. Whenever MB86435 changes directly from power-down mode normal operating mode, there possibility that speaker tones produced. recommended sequence coding changes into normal mode (VREF mode) (Tone mode) (Normal mode). Power Saving Modes
AdExternal Adpins dress dress Address 0110
Output status
TONE XTONE MICO JMICO CODEC XEAR RAUD DOUT JEAR PTBO BTPO
Operating circuit status
TONE generator VREF generator
Receiving
Mode
PSPS
Power supply current (mA) (typ)
Sending
Power- down VREF Tone Normal
Accessory
Receiving
Earphone
Tone
0.0005 0.41 10.2 10.2 18.2
Note:
Operational, Power-down, H-Z: High impedance, H-level fixed High impedance applied, depending status SW6, SW7, SW8. XEAR floating, however high resistance connection between XEAR. TONE XTONE floating, however, high resistance connection between TONE XTONE, between XTONE. Floating, however high resistance connection between BTO. Codec [Normal] mode operates with SYNC kHz, 2048 kHz. When RAUD operating, address 0111 data value should (SW12 off). tone mode, address 0111 data should (SW2 on), address 0111 data should (SW14 off). When SYNC signals fixed either L-level H-level, part codec unit will into power-down mode. this time PTBO signal will level, BTPO will H-Z, output will approximately
MB86435
TIMING CHART
Codec-Related Signals
SYNC
viii
DOUT
[Enlarged view]
SYNC
DOUT
tWCH viii
DOUT
From first Down second Down, SYNC
MB86435
Microcomputer Data-Related Signals
XPRST
SCLK
[Enlarged view]
MB86435
ABSOLUTE MAXIMUM RATINGS (See WARNING)
Parameter Power supply voltage Analog input voltage Digital input voltage Storage temperature Symbol VAIN VDIN Vstg Rating Min. -0.3 -0.3 -0.3 Max. +125 Unit
WARNING: Permanent device damage occur above Absolute Maximum Ratings exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Operating temperature Power supply voltage Digital input voltage Analog output load resistance Analog output load capacity Analog output load resistance* Analog output load capacity*2 Analog output load resistance*1 Analog output load capacity*
Symbol VAOUT VAIN
name VDD, VDDAB, VDDAC, VDDSP1 VDDSP2 digital input pins BBO, PTBO, TONEO, BTO, BTPO Between EAR-XEAR
Value Min. 0.45 Typ. Max. VDD-0.45
Unit
JEAR
Analog output load resistance*1 Analog output load capacity*2 Analog output load resistance Analog output load capacity Analog output load resistance*3 Analog output load capacity*3 Analog output voltage Analog input voltage Dynamic speakers Piezoelectric type speakers When SW12
Between TONE-XTONE MICO, JMICO, SGO, BBI, OP1, RAUD analog output pins analog input pins
MB86435
ELECTRICAL CHARACTERISTICS
Characteristics Parameter Power supply current full power-down mode Power supply current with VREF operating Power supply current with TONE operating Power supply current normal operation (only speaker ampmute) Receiver amps EAR, XEAR Speaker power supply voltage Symbol IVSST1 Conditions PSC0 PSC1 PSC2 PSC0 PSC1 PSC2 SGC, PSC0 PSC1 SGC, PSC0 SGC, pins lVSST5 PSC0 PSC1 SGC, ICN, Power supply current differential when on/off. PSC0 PSC1 SGC, ICN, Power supply current differential when on/off. PSC0 PSC1 SGC, ICN, Power supply current differential when on/off. digital input pins Between MIC-XMIC, between JMIC-XJMIC Value Min. Typ. Max. Unit
IVSST2
lVSST3
IVSST4
Earphone JEAR
lVSST6
Tone amps TONE, XTONE
lVSST8
Digital input voltage Digital input current
Input offset voltage
(Continued)
MB86435
(Continued) Parameter Symbol RAUD Between EAR-XEAR Conditions SW12 SW12 Value Min. Typ. Max. Unit
Output offset voltage
IMTON Between TONE-XTONE SW12 PTBO Between MIC0-BBO Between JMIC0-BBO digital output pins digital output pins Between DSTD-RAUD Between TAUD-EXSD Between TAUD-DSCK ICN, SW12 SW10 SW11 SW11 SW10
-100 -100 1.40 1.40
1.50 1.50
1.60 1.60
output voltage output voltage output voltage Digital output voltage Digital output voltage Resistance between pins TAUD DSCK Resistance between pins TAUD EXSD Resistance between pins DSTD RAUD
VSGC VSGO lVRH
Note: Measurement conditions: Standard Test Circuit
MB86435
Characteristics Codec-Related Signals Parameter Digital input rise time Digital input fall time Shift clock frequency Shift clock pulse width Shift clock pulse width Sync frequency Sync pulse width SYNC setup time SYNC hold time hold time setup time SYNC DOUT delay time DOUT delay time DOUT disable time DOUT fall time Symbol tWCH tWCL tWSH Conditions µ-law A-law Linear Value Min. 1/fC Typ. Max. 3152 3152 Unit
Microcomputer Data-Related Signals Parameter data setup time data hold time setup time pulse width pulse width pulse width hold time delay time Shift clock frequency Reset pulse width Symbol tSSC tHSC tSCB tHCB fSCLK tWRE SRD, SRC, STB, XPRST Value Min. Typ. Max. 2048 Unit
MB86435
Transmission Characteristics Microphone System Parameter Gain (between MIC0 BBO) Gain (between JMIC0 BBO) Signal noise ratio (between BBO) (between XMIC BBO) Signal noise ratio (between JMIC BBO) (between XJMIC BBO) Symbol Conditions MICO dBv, 1020 SW14 JMICO dBv, 1020 SW14 Ain1 dBgain) SW14 1020 message Ain2 dBgain) SW14 1020 message Value Min. -1.5 Typ. Max. Unit
-1.5
Note: Measurement conditions: Standard Test Circuit Speaker System Parameter Gain (between XEAR) Gain (between JEAR) Gain (between RAUD) Symbol GBJ6 Output power Conditions dBv, 1020 dBv, 1020 -2.5 dBv, 1020 dBv, 1020 SW12 between EAR-XEAR between TONE-XTONE gain JEAR, -2.5 Value Min. 10.0 Typ. -4.3 -2.5 -8.5 Max. Unit
Note: Measurement conditions: Standard Test Circuit TONE System Parameter Symbol Conditions tone generated, 948.1 tone generated, 948.1 kHz, 1219.1 Value Min. Typ. -14.0 -14.0 Max. Unit
TONE output level (TONE0)
Note: Measurement conditions: Standard Test Circuit
MB86435
Electric Volume System Parameter Volume gain error (between TAUD-BBO) Volume gain error (between DIN-PTBO) Volume gain error (between 2-BTO) Volume gain error (TONEO) Symbol Conditions SW14 TAUD dBv, 1020 dBm0, 1020 Value Min. -0.7 Typ. Max. Unit
-0.8
dBv, 1020 tone generated 948.1
-1.0
-0.5
Note: Measurement conditions: Standard test circuit Sending/Receiving System (Codec, Analog Block) Parameter Crosstalk (send receive) Crosstalk (send receive) Power supply noise reduction ratio Symbol Conditions Ain1 1020 dBgain) Measured RAUD 1020 dBm0 Measured DOUT kHz, mVOP message SGC, Value Min. Typ. Max. Unit
PSRR
Note: Measurement conditions: Standard test circuit
MB86435
Codec Parameter Gain tracking BTPO DOUT Gain tracking PTBO Gain tracking (Linear) BTPO DOUT Gain tracking (Linear) PTBO Symbol Conditions dBm0 1020 dBm0 Reference value 1020 dBm0 Reference value 1020 AFST-3 Reference value 1020 AFST-3 Reference value dBm0 dBm0 dBm0 dBm0 dBm0 AFST AFST-43 GTXL
AFST-43 AFST-53 AFST-53 AFST-53 AFSR AFSR-43 AFSR-43 AFSR-53 AFSR-53 AFSR-53
Value Min. -0.2 -0.4 -0.8 -0.4 -0.6 -1.0 -0.2 -0.4 -0.8 -0.4 -0.6 -1.0 24.0 Typ. ±0.02 ±0.001 ±0.04 ±0.002 0.7647 Max. 0.20 0.30 1.10 -1.0 1.20
Unit dB/°C dB/°C
GTRL
Sending frequency characteristics BTPO DOUT dBm0 (Linear AFST-3 1020 Reference value
-0.20 3000 -0.20 3000 3400 -0.20 3400 4600 4600 32.0
-0.30 Receiving frequency characteristics PTBO dBm0 (Linear AFSR-3 1020 Reference value 3000 -0.30 3000 3400 -0.30 3400 4600 4600 Sending absolute gain BTPO DOUT Receiving absolute gain PTBO Absolute level 1020 dBm0 (Linear AFST-3 +25°C Power supply variation Temperature variation 1020 dBm0 (Linear AFSR-3 +25°C Power supply variation Temperature variation VABS Over load level µ-Law 3.17 A-Law 3.14 32.0 -1.0 -1.20
(Continued)
MB86435
(Continued) Parameter Sending signal noise ratio BTPO DOUT Receiving signal noise ratio DOUT Sending signal noise ratio BTPO DOUT (Linear) Recieving signal noise ratio BTPO DOUT (Linear) Symbol 1020 message 1020 message 1020 message 1020 message message message 1020 dBm0, +25°C µ-law 1020 dBm0, +25°C µ-law 1020 dBm0, +25°C A-law 1020 dBm0, +25°C A-law +25°C Linear +25°C Linear 1544 (DOUT-DIN short) BTPO (DOUT-DIN short) 4.6-200 BTPO dBmO, 4.6-200 (DOUT-DIN short) Second third harmonic,BTPO dBmO 700-1100 (DOUT-DIN short) Conditions dBm0 dBm0 dBm0 dBm0 dBm0 dBm0
AFST-3 AFST-33
Value Min. 34.0 28.0 23.0 34.0 28.0 23.0 34.0 28.0 23.0 34.0 28.0 23.0 Typ. Max.
Unit
dBm0C
SDXL
AFST-43 AFST-45
AFSR-3 AFSR-33
SDRL
AFSR-43 AFSR-45
Sending no-talk noise ICNX BTPO DOUT Receiving no-talk noise PTBO Analog input level BTPO Analog output level PTBO Analog input level BTPO Analog output level PTBO ICNR AILU AOLU AILA AOLA
dBm0C
0.3290 0.3739 0.4195 Vrms 0.3290 0.3739 0.4195 Vrms 0.3315 0.3767 0.4227 Vrms 0.3315 0.3767 0.4227 Vrms 0.6729 0.7647 0.8581
Analog input fullscale level AFST BTPO Analog output fullscale level PTBO AFSR
0.6729 0.7647 0.8581
dBm0 dBm0
Overall absolute delay (BTPO PTBO) Single frequency noise (BTPO PTBO) Discrimination (BTPO PTBO) In-band spurious response (BTPO PTBO) 14.5 SFNA DISA IBSA (4000 1200
MB86435
STANDARD TEST CIRCUIT
0.1µF 0.1µF 0.1µF 0.1µF Dout DOUT SYNC PTBO TAUD 0.1µF 0.039µF 0.1µF TONEO 22µF TCLK TONE TONC IMTON TONE DATA LATCH SAVE 0.1µF XPRST PSC0 PSC1 PSC2 XTONE JEAR XEAR AMP3 RAUD DSDT AMP1 EXSD AMP2 DSCK CODEC JMICO JMIC XJMIC Ain2 XMIC BTPO BTPI MICO Ain1
Digital input
Digital output
Analog input
Analog output
Input/output
Note: Sufficient path capacitance must placed between VDDAB-BAG, VDDAC-CAG, VDDSP1-SPG1, VDDSP2-SPG2, VDD-AG.
MB86435
ORDERING INFORMATION
Part number MB86435PFV Package pins, Plastic LQFP (FPT-64P-M03) Remarks
MB86435
PACKAGE DIMENSION
Plastic LQFP (FPT-64P-M03)
12.00±0.20(.472±.008)SQ
10.00±0.10(.394±.004)SQ
1.50 -0.10 (MOUNTING HEIGHT) +.008 .059 -.004
+0.20
7.50 (.295) INDEX
11.00 (.433)
+0.08
Details part 0.127 -0.02 +.002 .005 -.001
+0.05
LEAD
0.50±0.08 (.0197±.0031)
0.18 -0.03 +.003 .007 -.001
0.10±0.10 (STAND OFF) (.004±.004)
0.50±0.20 (.020±.008) 0.10(.004)
1995 FUJITSU LIMITED F64009S-2C-5
Dimensions (inches)
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ further information please contact: North South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 Arques Avenue, Sunnyvale, 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 Korea FUJITSU MICROELECTRONICS KOREA LTD. KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA LTD. Lorong Chuan, #05-08 Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw
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Single Power Supply Audio Interface Unit (AIU) MB86435 DESCR

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