Single Power Supply Audio Interface Unit (AIU) MB86434 DESCR

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Single Power Supply Audio Interface Unit (AIU) MB86434 DESCR

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DS04-23003-1Ea
Single Power Supply Audio Interface Unit (AIU)
MB86434
DESCRIPTION
FUJITSU MICROELECTRONICS MB86434 (audio interface unit) single-power source digital telephone devices, manufactured using CMOS process technology. codec transmission filter characteristics meet G.712 standards, handle input output A-Law, µ-Law linear conversion modes. MB86434 also contains necessary DTMF, microphone receiver amps telephone devices.
FEATURES
single power supply power consumption: muting settings each operating mode Normal operation (speaker mute) Tone generation (speaker mute) Standby mode On-chip codec filter meets G.712 standards Selection codec conversion methods (A-law, µ-law, linear) On-chip low-noise microphone (2-channel) (unity gain frequency: 1MHz) On-chip receiver speaker amps type: MIN) On-chip tone speaker type: MIN) On-chip earphone speaker amps single type: MIN) (Continued)
PACKAGE
pin, Plastic
(FPT-64P-M07) Copyright©1997-2008 FUJITSU MICROELECTRONICS LIMITED rights reserved 1997.2
MB86434
(Continued) On-chip electronic volume gain adjustments (sending, receiving, tone) On-chip accessory output circuits DTMF generator function Service tone generation CMOS compatible input/output
ASSIGNMENT
(TOP VIEW)
INDEX
(FPT-64P-M07)
MB86434
DESCRIPTION
Symbol VDDAC N.C. N.C. SYNC Description Analog ground codec block. Bypass capacitor connector reference voltage generator circuit. Place capacitor between pins. Bypass capacitor connector signal ground potential generator circuit. Place capacitor between pins. Analog power supply codec block. within range 4.75 5.25 connected. left open. connected. left open. codec send/receive synchronization signal input pin. Operating clock frequencies kHz. CMOS interface. Other frequencies cause codec block power-down. Send/receive signal series rate setting input pin. Data rate µ-law, A-law modes level range 3.152 MHz, linear range 3.152 MHz. Constant level signal will cause part codec block power-down. CMOS interface. signal input pin. This signal picked internally fall signal. CMOS interface. signal output pin. Data output sync with rise signal. After data output, loses synchronization, power-down this signal fixed level. CMOS interface. Digital power supply pin. within range 4.75 5.25 Digital ground pin. Power-down control signal input pin. CMOS interface. Used with PSC1,2 pins power-down settings. Power-down control signal input pin. CMOS interface. Used with PSC0,2 pins power-down settings. Power-down control signal input pin. CMOS interface. Used with PSC0,1 pins power-down settings.
DOUT
PSC0
PSC1
PSC2
Full power-down VREF operating Tone operating operations available value determined)
XPRST
9-bit serial data input pin. CMOS interface. Data written rise signal from this pin. Clock input 9-bit serial data writing. CMOS interface. Data written rise this pin. Serial data latch strobe signal. Data latched level signal. CMOS interface. On-chip pull-down resistance. Digital reset signal input pin. CMOS interface. level: internal latch initialization level: normal operation (Continued)
MB86434
Symbol TCLK
Description External control latch output pin. Outputs value address 1000. CMOS interface. External control latch output pin. Outputs value address 1000. CMOS interface. External control latch output pin. Outputs value address 1000. CMOS interface. External control latch output pin. Outputs value address 1000. CMOS interface. Tone generator clock input pin. used tone signal using address 1110 D4D3 subdivide internal clock signal factors 1/1, 1/2, 1/4. CMOS interface. Tone generator cycle control input pin. CMOS interface. Hlevel signal outputs tone. Ring control output pin. CMOS interface. used generate tone envelope, placing capacitor between grounds turning SW11 on/off. Analog switch input/output pin. Controls address 0111 Analog switch input/output pin. Accessory input. connected RAUD switching paths. Tone signal output pin. Output external speaker, audio test signal. connected DSDT switching paths. Speaker power supply pin. within range 4.75 5.25 Earphone speaker output pin. Capable output load. Receiver speaker output pin. Internally connected BTL. Maximum output obtained load connecting speaker between XEAR. Receiver speaker output pin. Connected XEAR BTL. Speaker ground pin. Speaker ground pin. Speaker tone output pin. Internally connected TONE BLT. Maximum output obtained load connecting speaker between TONE XTONE. Speaker tone output pin. When speaker used tone, TONE should shorted IMTON. Speaker drive inverted signal input pin. used adjust gain connecting resistance TONE IMTON. Speaker power supply pin. within range 4.75 5.25 (Continued)
TONC TENV DSDT TONEO RAUD VDDSP1 JEAR XEAR
SPG1 SPG2 XTONE
TONE IMTON VDDSP2
MB86434
(Continued) Symbol PTBO VDDAB XJMIC JMIC JMICO XMIC MICO N.C. N.C. BTPI BTPO Description AMP3 output pin. Should included together with IM3, prevent offset from entering speakers. AMP3 inverted signal input pin. Receiving volume adjustment circuit output pin. AMP2 output pin. AMP2 used, should shorted OP2. AMP2 inverted signal input pin. form circuit with sidetone tone. Melody circuits, used, also connected here. AMP1 output pin. form circuit with include receiving block. AMP1 used, should shorted OP1. AMP1 inverted signal input pin. receiver output pin. Analog ground sending, receiving blocks. Analog power supply sending, receiving blocks. within range 4.75 5.25 Microphone non-inverted signal input pin. Microphone inverted signal input pin. Microphone output pin. Microphone non-inverted signal input pin. Microphone inverted signal input pin. Microphone output pin. Sending block signal ground potential output pin. Buffers voltage. Sending analog signal output pin. connected. left open. connected. left open. ENCODE block input negative input pin. ENCODE block input output pin.
MB86434
BLOCK DIAGRAM
(59) BTPO (64) BTPI (63) (60)
VREF
generator
(TYP)
VREF generator block DOUT (10) SYNC PTBO (50) (48) (49) (46) (47) (45) (44) (43) TONEO (31) TCLK (24) 512K 5bit
Microphone
5bit Codec block (TYP) -7.5 0.5dB step -7.5 0.5dB step Sending block
Microphone SW10 SW11
TONE generator
MICO (58) (57) XMIC (56) JMICO (55) JMIC (54) XJMIC (53) (29) (28) TENV (27) DSDT (30)
AMP1
(TYP) 12dB 4.0dB step 3bit Accessory block
SW12
RAUD (32)
AMP2 SW14
AMP3
(36)
Receiving block
cycle cycle TONC
Receiver speaker drive block
XEAR (35)
TONE
generator
(TYP)
-6dB
cycle TONC (25) VDDAB VDDAC VDDSP1 VDDSP2 SPG1 SPG2 TONC
cycle TONC
TONE
generator
Single-10dB 5bit dual -10dB -7.5 0.5dB step
JEAR (34)
Earphone speaker drive block IMTON (41) TONE (40)
Tone generator block DATA LATCH
Control block
SAVE
XTONE (39)
Tone speaker drive block (26)
XPRST (16) (17) (18) (19) (20) (21) (22) (23)
Digital input Digital output Analog input
PSC0 PSC1 PSC2 (13) (14) (15)
Analog output
Input/output
MB86434
FUNCTIONAL DESCRIPTION
Register Settings MB86434 chip controls electronic volume, switching, tone generator circuits power-down control circuits means SRD, data input signals. MB86434 uses 9-bit serial data format consisting 4-bit address followed data bits. Data picked rise signal, latched L-level signal. 9-bits serial data preceding signal considered valid. These register settings reset power-down. They reset when data initialized XPRST L-level signal. Mode Settings Control segment TX-MUTE RX-MUTE Address Data Setting description Sending audio level adjustment. Adjusts gain. Sending audio level adjustment. Adjusts gain. Sending audio level adjustment. Adjusts gain. Sending audio mute on/off control. Mute: Unmute: Receiving audio mute on/off control. Mute: Unmute: JMIC mute on/off control. Mute: Unmute: mute on/off control. Mute: Unmute: RAUD mute on/off control. Mute: Unmute: EAR, XEAR mute on/off control. Mute: Unmute: TONE, XTONE mute on/off control. Mute: Unmute: JEAR mute on/off control. Mute: Unmute: JEAR attenuation level switch. -6.0
Initial data setting reset) Remarks
(Continued)
MB86434
(Continued) Control segment SW10 Address Data Setting description SWI-SWO switch on/off control. Off: DSDT selection on/off control. Off: Envelope generator generate envelope (SW11 Off): envelope (SW11 On): TONEO mute on/off control. Mute: Unmute: TONE sending on/off control. Off:
Initial data setting reset) Remarks
SW12
SW11 SW14 Serial/ parallel converter
Parallel output LO3, LO2, LO1,
Frequency control TONE control
Output control
Master clock control
Tone level adjustment. Adjusts gain. Tone frequency control, 8-bit value output trapezoidal wave, output sine wave. Tone frequency control, 8-bit value output trapezoidal wave, output sine wave. Tone generator control tone on/off control. off: tone on/off control. off: output on/off control. off: Tone FTCLK1/1 frequency selected FTCLK1/2 frequency selected FTCLK1/4 frequency selected Prohibited control µ-law mode selected A-law mode selected linear mode selected write test mode.
*10,
*13,
TEST
(Continued)
MB86434
*10: *11: *12: *13: *14: Electronic Volume Controls Sending Audio Mute Setting Power Saving Modes Receiving Audio Mute Settings Analog Output Accessory Output Analog Input Accessory Input Tone Generator Circuit Tone Output Controls Tone Generator Circuit Tone Generator Control Output Level Parallel Output Tone Generator Circuit Tone Frequency Control Registers Tone Generator Circuit Tone Output Waveforms Tone Generator Circuit Output Controls Codec Input/Output Codec SYNC
MB86434
Sending Audio Mute Settings Switches have following functions. Address 0100 signals have priority. Setting Address Data muted, Switching setting Remarks
unmuted, determined
Receiving Audio Mute Settings Switches have following functions. Address 0100 signals have priority. Setting Address Switching setting
Data muted,
unmuted, determined
MB86434
Electronic Volume Controls There four different electronic volume controls, through EV3, with following specifications. Electronic volume control settings made SRD, signals, setting values reset XPRST signal. However, settings reset PSC0, PSC1, PSC2 power-down mode operations. Table Data value Relation Volume Control Data Values Gain sending gain adjustment Typ. -7.5 -7.0 -6.5 -6.0 -5.5 -5.0 -4.5 -4.0 -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 receiving gain receiver volume adjustment adjustment Typ. -7.5 -7.0 -6.5 -6.0 -5.5 -5.0 -4.5 -4.0 -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 Typ. tone gain adjustment Typ. -7.5 -7.0 -6.5 -6.0 -5.5 -5.0 -4.5 -4.0 -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5
Step
Unit
Note: Each setting value determined relation initial setting value. Returns initial value reset parts) data bits Table Volume control Condition Gain deviation, with respect reference value shown Table1 Input frequency 1020 Input level Volume Gain Deviation Min. Reference value Reference value Typ. Reference value Reference value Max. Reference value Reference value Unit
MB86434
Tone Generator Circuit Tone Frequency Control Registers tone generator uses clock signal obtained subdividing TCLK clock signal input 1/1, according data address 1110. Table Address 1110 Tone Clock Frequency Register Control Tone generator clock signal (fIN) TCLK input clock signal TCLK input clock signal subdivided TCLK input clock signal subdivided Prohibited
Frequency settings available through tone frequency control register determined following formula. Frequency setting fIN/(12*(1+n)), 255. (where fIN: tone generator clock signal frequency). Therefore available frequency setting range when between fmin fmax 21333 Frequency settings corresponding each DTMF rated reference frequency shown following table.
Table Rated reference frequency (generator frequency) Service tone (single tone) 2000 2600 tone High tone 1209 1336 1477 1633
Tone Frequency Register Control (Condition: kHz) Addres 1010/1100 Data Address 1011/1101 Data Error
Tone type
Frequency setting 261.7 384.4 398.7 2031.7 2666.7 699.4 775.7 853.3 948.1 1219.0 1333.3 1471.3 1641.0
-0.11% 0.10% -0.32% 1.56% 2.50% 0.34% 0.74% 0.15% 0.75% 0.82% -0.20% -0.38% 0.48%
Note: Setting values display values Error represents frequency setting error with respect rated reference frequency.
MB86434
Tone Output Waveform data address 1010, 1100 used select either sine-wave trapezoidal waveforms tone output.
D4=0 Sine wave output
Trapezoidal wave output
Tone Output Control Tone output controlled address through external tone control input TONC. addition, tone control offers choice sine trapezoidal waveforms.
Address 1110 DATA (Tone control) Address 1110 DATA (Tone control)
TONC
TONEO
Single tone
Dual tone
Single tone
Disable
MB86434
Also, connecting capacitor between TENV ground, possible generate envelope tone waveform. address 0111 data generate. envelope generated, silencing must applied L-level signal from TONC pin. type envelope that generated calculated approximately from following formula.
Time required V0/V1 TENV TONEO
TONC (inside Address0111
Output Controls Output from output pins controlled TONC signal address 1110 data When TONC signal H-level, address 1110 data value L-level, output level will high. Output levels CMOS levels.
Address 1110 DATA TONC
Disable
MB86434
Tone Generator Control Output Level (Condition: External pins Address Address Tone generator 1110 0111 circuit operating data bits data bits mode Tone Tone Output mode TONEO Single tone output Single tone output Dual tone output
Remarks
PSC2 PSC1 PSC0 TONC (SW2)
Operational,
Power down, High-impedance, L-level fixed, SGC: fixed
Note: When TONC signal L-level, tone generator circuit counters will reset. When dual tone generated time reset, initial phase settings tone tone will phase. Example: When Tone (1), Tone same frequency:
TONE
Tone
Tone
MB86434
Codec Input/output Both µ-law A-law coding/decoding conversion processes used MB86434 codec compatible with CCITT Recommendation G.711. addition, linear coding form 14-bit two's complement code output starting with values.
SYNC Din, Dout
Code
PTBO reference voltage 1.1766 2.3986 2.4000 2.4014 3.6235
codec SYNC codec block requires input sampling clock signal SYNC pin, well data transfer clock pin. order conserve power consumption, whenever SYNC signal inactive, system goes into SYNC power-down mode stops code conversion. Also, either SYNC pins encounters jitter greater, system into power-down mode.Table shows status output pins SYNC power-down mode. symbol DOUT PTBO BTPO Operation Normal operation (2.4 Normal operation (2.4 Normal operation (4.0 H-level fixed High impedance
MB86434
Parallel Output pins carry latched output external controls. data written address 1000 output through these pins. Output CMOS output.
Address 1000
(inside
Analog Input Analog input signals MB86434 include microphone inputs general-purpose analog switch. Microphone Amps microphone amps take incoming signal from microphones amplify desired level gain. microphone lines low-noise types with piezoelectric-ceramic capacitor microphones, capable wide range amplification. microphones amps must coupled with capacitors prevent amplification offset signals.
Piezoelectric-ceramic type MICO
XMIC
(inside
Capacitor type MICO
XMIC
(inside
MB86434
Parameter Unity gain frequency Input conversion noise 3400 Maximum output level Minimum load level Analog Switches
Characteristics (typ) 1.25 3.75
analog switches include on-chip general-purpose switches with in-resistance. Switches controlled writing register address 0111 data using H-level make connections. Sidetone addition using analog switches
BTPI BTPO
SW10
PTBO
(inside
SW10 Address Data
MB86434
Analog Output MB86434 total four analog output circuits, including three speaker drive circuits (receiver, earphone tone) accessory output. Speaker Drive speaker drive amps include circuits (receiver tone) with output system (earphone) with single output. Because speaker requires relatively high levels power, connected speaker selection switches (sw6-sw9) power-down mode selection. systems (receiver earphone) have fixed gain levels, while other system (tone) allows gain adjustment means external resistors. addition, tone speaker able large-current power circuit Table Parameter Output type Load resistance Load resistance Load capacity Final stage gain Maximum output power Speaker Drive Output Standards Earphone speaker (JEAR) Single (typ) (typ) dB/-6.0 (JEAR) (min) Tone speaker amps (TONE, XTONE) (typ) (typ) (between TONE-XTONE) (min)
Receiver speaker amps (EAR, XEAR) (typ) (typ) (between EAR-XEAR) (min)
Dynamic-type speaker Piezoelectric-ceramic type speaker
MB86434
Analog Output Connection Example
0.0dB JEAR -6.0dB
Receiver speaker Dynamic type: (typ) Piezoelectric-ceramic type: (typ)
XEAR
Earphone speaker Dynamic type: (typ) Piezoelectric-ceramic type: (typ)
IMTON TONE
XTONE (inside
Tone speaker Dynamic type: (typ) Piezoelectric-ceramic type: (typ) (2*R2/R1) [dB]
Note: should given respective values 0.01 order prevent unwanted oscillation. piezoelectric-ceramic type microphone used, should given respective values order prevent unwanted oscillation.
Tone Speaker Used
IMTON
TONE
(inside
XTONE
Note: When tone speaker used, input IMTON output TONE should shorted together.
MB86434
Accessory Output accessory output (RAUD pin) carry either digital analog output signals, controlled address 0101 data address 0111 data 12). When both position, accessory outputline (high impedance) state. Caution: never place both position same time. This cause MB86434 function improperly. SW12 Position
DSDT Digital signal input RAUD Digital signal output (digital signal buffered) (inside
Address
Data
Position
Analog input
RAUD
Analog output (inside driven with load resistance greater
Address
Data
MB86434
Receiver Connections possible tones adjust sidetones using electronic volume control. When using however, necessary include avoid interference from speaker Tone Sidetone Addition Inclusion Secondary Primary HPF.
PTBO (receiving) Secondary (1/R +1/R +1/R
AMP1
TONEO (tone) (sidetone) Signal addition
AMP2
IMTON AMP3 (inside Primary 1/(2C following settings necessary comply with CCITT Recommendation 0.039
Amp1, Amp2 used
AMP2
AMP1
open (inside
(inside
Note: When amps used, input output should shorted together.
MB86434
Tone Sidetone Addition Inclusion Third-Order
PTBO (receiving) Secondary
AMP1
TONEO (tone) (sidetone) Signal addition
AMP2
IMTON AMP3 (Inside Primary 17/R 1/(2C
MB86434
Power Saving Modes Mode Selection MB86434 power saving modes controlled using external control signal lines lines). also possible apply power saving modes speaker amps with high power consumption levels writing changes register settings. Whenever MB86434 changes directly from power-down mode normal operating mode, there possibility that speaker tones produced. recommended sequence coding changes into normal mode (VREF mode) (Tone mode) (Normal mode). Power Saving Modes
AdExternal Adpins dress dress Address 0110
Output status
TONE XTONE MICO JMICO XEAR RAUD DOUT JEAR PTBO BTPO
CODEC
Operating circuit status
TONE generator VREF generator Receiving
PSPS
Sending
Power- down VREF Tone Normal
Tone
Mode
Power supply current (mA) (typ)
Accessory
Receiving
Earphone
0.0005 0.48 10.3 12.6 12.6 20.9
Note:
Operational, Power-down, H-Z: High impedance, H-level fixed High impedance applied, depending status SW6, SW7, SW8. XEAR floating, however high resistance connection between XEAR. TONE XTONE floating, however, high resistance connection between TONE XTONE, between XTONE. Floating, however high resistance connection between BTO. Codec [Normal] mode operates with SYNC kHz, 2048 kHz. When RAUD operating, address 0111 data value should (SW12 off). tone mode, address 0111 data should (SW2 on), address 0111 data should (SW14 off). When SYNC signals fixed either L-level H-level, part codec unit will into power-down mode. this time PTBO signal will level, BTPO will H-Z, output will approximately
MB86434
TIMING CHART
Codec-Related Signals
SYNC
viii
DOUT
[Enlarged view]
SYNC
DOUT
tWCH viii
DOUT
From first Down second Down, SYNC
MB86434
Microcomputer Data-Related Signals
XPRST
SCLK
[Enlarged view]
MB86434
ABSOLUTE MAXIMUM RATINGS (See WARNING)
Parameter Power supply voltage Analog input voltage Digital input voltage Storage temperature Symbol VAIN VDIN Vstg Rating Min. -0.3 -0.3 -0.3 Max. +125 Unit
WARNING: Permanent device damage occur above Absolute Maximum Ratings exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Operating temperature Power supply voltage Digital input voltage Analog output load resistance Analog output load capacity Analog output load resistance* Analog output load capacity*2 Analog output load resistance*1 Analog output load capacity*
Symbol RLM1 RLM2 VAOUT VAIN
name VDD, VDDAB, VDDAC, VDDSP1 VDDSP2 digital input pins BBO, PTBO, TONEO, BTO, BTPO Between EAR-XEAR
Value Min. 4.75 1.25 1.25 Typ. Max. 5.25 3.75 3.75
Unit
JEAR
Analog output load resistance*1 Analog output load capacity*2 Analog output load resistance Analog output load capacity Analog output load resistance*3 Analog output load capacity*3 Analog output voltage Analog input voltage Dynamic speakers Piezoelectric type speakers When SW12
Between TONE-XTONE MICO, JMICO SGO, BBI, OP1, MICO, JMICO, SGO, BBI, OP1, RAUD analog output pins analog input pins
MB86434
ELECTRICAL CHARACTERISTICS
Characteristics Parameter Power supply current full power-down mode Power supply current with VREF operating Power supply current with TONE operating Power supply current normal operation (only speaker ampmute) Receiver amps EAR, XEAR Speaker Earphone power JEAR supply voltage Tone amps TONE, XTONE Symbol IVSST1 Conditions PSC0 PSC1 PSC2 PSC0 PSC1 PSC2 SGC, PSC0 PSC1 SGC, PSC0 SGC, pins lVSST5 PSC0 PSC1 SGC, ICN, Power supply current differential when off. PSC0 PSC1 SGC, ICN, Power supply current differential when off. PSC0 PSC1 SGC, ICN, Power supply current differential when off. digital input pins Between MIC-XMIC, between JMIC-XJMIC Value Min. Typ. Max. Unit
IVSST2
lVSST3
IVSST4
12.0
lVSST6
lVSST8
Digital input voltage Digital input current
Input offset voltage
(Continued)
MB86434
(Continued) Parameter Symbol RAUD Between EAR-XEAR Conditions SW12 SW12 Value Min. Typ. Max. Unit
Output offset voltage
IMTON Between TONE-XTONE SW12 PTBO Between MIC0-BBO Between JMIC0-BBO digital output pins digital output pins Between SWI-SWO ICN, SW10
-100 -100 2.30 2.25
2.40 2.40
2.50 2.55
output voltage output voltage output voltage Digital output voltage Digital output voltage Resistance between pins
VSGC VSGO lVRH
Note: Measurement conditions: Standard Test Circuit
MB86434
Characteristics Codec-Related Signals Parameter Digital input rise time Digital input fall time Shift clock frequency Shift clock pulse width Shift clock pulse width Sync frequency Sync pulse width SYNC setup time SYNC hold time hold time setup time SYNC DOUT delay time DOUT delay time DOUT disable time DOUT fall time Symbol tWCH tWCL tWSH Conditions µ-law A-law Linear Value Min. 1/fC Typ. Max. 3152 3152 Unit
Microcomputer Data-Related Signals Parameter data setup time data hold time setup time pulse width pulse width pulse width hold time delay time Shift clock frequency Reset pulse width Symbol tSSC tHSC tSCB tHCB fSCLK tWRE SRD, SRC, STB, XPRST Value Min. Typ. Max. 2048 Unit
MB86434
Transmission Characteristics Microphone System Parameter Gain (between MIC0 BBO) Gain (between JMIC0 BBO) Signal noise ratio (between BBO) (between XMIC BBO) Signal noise ratio (between JMIC BBO) (between XJMIC BBO) Symbol Conditions MICO dBV, 1020 CSW4 SW14 JMICO dBV, 1020 SW14 Ain1 dBgain) SW14 1020 message Ain2 dBgain) SW14 1020 message Value Min. -1.5 Typ. Max. Unit
-1.5
Note: Measurement conditions: Standard Test Circuit Speaker System Parameter Gain (between XEAR) Gain (between JEAR) Gain (between RAUD) Symbol GBJ6 Output power Conditions dBV, 1020 dBV, 1020 dBV, 1020 dBV, 1020 SW12 between EAR-XEAR between TONE-XTONE gain JEAR, -2.5 Value Min. 10.0 200.0 Typ. -6.0 Max. Unit
Note: Measurement conditions: Standard Test Circuit TONE System Parameter Symbol Conditions tone generated, 948.1 tone generated, 948.1 kHz, 1219.1 Value Min. Typ. -10.0 -10.0 Max. Unit
TONE output level (TONE0)
Note: Measurement conditions: Standard Test Circuit
MB86434
Electric Volume System Parameter Volume gain error (between MICO-BBO) Volume gain error (between DIN-PTBO) Volume gain error (between 2-BTO) Volume gain error (TONEO) Symbol Conditions SW14 TAUD dBV, 1020 dBm0, 1020 Value Min. -0.7 Typ. Max. Unit
-0.8
dBV, 1020 tone generated 948.1
-1.0
-0.5
Note: Measurement conditions: Standard test circuit Sending/Receiving System (Codec, Analog Block) Parameter Crosstalk (send receive) Crosstalk (send receive) Symbol Conditions Ain1 1020 dBgain) Measured RAUD 1020 dBm0 Measured DOUT Value Min. Typ. Max. Unit
Note: Measurement conditions: Standard test circuit
MB86434
Codec Parameter Gain tracking BTPO DOUT Gain tracking PTBO Gain tracking (Linear) BTPO DOUT Gain tracking (Linear) PTBO Symbol Conditions dBm0 1020 dBm0 Reference value 1020 dBm0 Reference value 1020 AFST-3 Reference value 1020 AFST-3 Reference value dBm0 dBm0 dBm0 dBm0 dBm0 AFST AFST-43 GTXL
AFST-43 AFST-53 AFST-53 AFST-53 AFSR AFSR-43 AFSR-43 AFSR-53 AFSR-53 AFSR-53
Value Min. -0.2 -0.4 -0.8 -0.4 -0.6 -1.0 -0.2 -0.4 -0.8 -0.4 -0.6 -1.0 24.0 Typ. ±0.02 ±0.001 ±0.04 ±0.002 1.2081 Max. 0.20 0.30 1.10 -2.0 2.50
Unit dB/°C dB/°C
GTRL
Sending frequency characteristics BTPO DOUT dBm0 (Linear AFST-3 1020 Reference value
-0.20 3000 -0.20 3000 3400 -0.20 3400 4600 4600 32.0
-0.30 Receiving frequency characteristics PTBO dBm0 (Linear AFSR-3 1020 Reference value 3000 -0.30 3000 3400 -0.30 3400 4600 4600 Sending absolute gain BTPO DOUT Receiving absolute gain PTBO Absolute level 1020 dBm0 (Linear AFST-3 +25°C Power supply variation Temperature variation 1020 dBm0 (Linear AFSR-3 +25°C Power supply variation Temperature variation VABS Over load level µ-Law 3.17 A-Law 3.14 32.0 -2.0 -2.50
(Continued)
MB86434
(Continued) Parameter Sending signal noise ratio BTPO DOUT Receiving signal noise ratio DOUT Sending signal noise ratio BTPO DOUT (Linear) Recieving signal noise ratio BTPO DOUT (Linear) Symbol 1020 message 1020 message 1020 message 1020 message message message 1020 dBm0, +25°C µ-law 1020 dBm0, +25°C µ-law 1020 dBm0, +25°C A-law 1020 dBm0, +25°C A-law +25°C Linear +25°C Linear Conditions dBm0 dBm0 dBm0 dBm0 dBm0 dBm0
AFST-3 AFST-33
Value Min. 34.0 28.0 23.0 33.0 27.0 22.0 34.0 28.0 23.0 34.0 28.0 23.0 Typ. Max.
Unit
dBm0C
SDXL
AFST-43 AFST-45
AFSR-3 AFSR-33
SDRL
AFSR-43 AFSR-45
Sending no-talk noise ICNX BTPO DOUT Receiving no-talk noise PTBO Analog input level BTPO Analog output level PTBO Analog input level BTPO Analog output level PTBO ICNR AILU AOLU AILA AOLA
dBm0C
0.4692 0.5907 0.7437 Vrms 0.4692 0.5907 0.7437 Vrms 0.4728 0.5952 0.7493 Vrms 0.4728 0.5927 0.7493 Vrms 0.9596 1.2081 1.5211
Analog input fullscale level AFST BTPO Analog output fullscale level PTBO 14.5 AFSR (4000 1200
0.9596 1.2081 1.5211
MB86434
STANDARD TEST CIRCUIT
Dout 2MHz DOUT SYNC PTBO 0.039 TONEO TCLK TONE TONC IMTON TONE DATA LATCH SAVE XPRST PSC0 PSC1 PSC2 XTONE JEAR XEAR AMP3 RAUD DSDT AMP1 AMP2 TENV CODEC JMICO
BTPO
BTPI
MICO XMIC Ain1
JMIC XJMIC
Ain2
Digital input
Digital output
Analog input
Analog output
Input/output
Note: Sufficient path capacitance must placed between VDDAB-BAG, VDDAC-CAG, VDDSP1-SPG1, VDDSP2-SPG2, VDD-AG.
MB86434
ORDERING INFORMATION
Part number MB86434PF Package pins, Plastic (FPT-64P-M07) Remarks
MB86434
PACKAGE DIMENSION
Plastic (FPT-64P-M07)
25.70 0.40 (1.012 .016)
3.35 (.132) (Mounting height) 0.05 (.002) (STAND OFF)
20.00 0.20 (.787 .008)
19.70 0.40 (.776 .016) 14.00 0.20 (.551 .008)
16.30 0.40 (.642 .016) 12.00 (.472)
LEAD
1.00 (.0394)
0.40 0.10 (.016 .004)
0.20 (.008) Details part
0.15 0.05 (.006 .002) Details part 0.25 (.010)
0.30 (.012) 0~10° 0.15 (.006) 18.00 (.709) 22.30 0.40 (.878 .016)
0.18 (.007) 0.63 (.025)
1.70 0.20 (.067 .008)
1994 FUJITSU LIMITED F64014S-3C-2
Dimensions (inches).
MB86434
MEMO
MB86434
MEMO
FUJITSU MICROELECTRONICS LIMITED
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Single Power Supply Audio Interface Unit (AIU) MB86434 DESCR

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