Communication Control PACKET FORWARDING ENGINE MB86977

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Communication Control PACKET FORWARDING ENGINE MB86977

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DS04-22114-1Ea
Communication Control
PACKET FORWARDING ENGINE
MB86977
DESCRIPTION
MB86977 that enables processes that previously were handled through software, such packetdestination transferring filtering, handled through hardware, thereby achieving full wire speed bidirectional LAN-WAN throughput Mbps. forwarding applied both IPv4 IPv6 packets full wire speed.The Layer filtering capabilities enables application basic security policies, also makes possible build Demilitarized Zones (D.M.Z.) servers accessed directly from without intervention software. total four interfaces, used internal segments (i.e. LAN0,LAN1), D.M.Z. port, remaining port. D.M.Z.interface configured extra internal segment (i.e. LAN2)if desired. Layer switch switch packets from internal segments (LAN0, LAN1 LAN2) based their addresses. addition, real-time applications such streaming media flows VoIP streams prioritized priority control function. MB86977 offers ideal solution superior performance required network appliances such broadband routers.
FEATURES
Built-in high performance Forwarding Engine "Fujitsu Microelectronics/FLS Express Forwarding (FEF)" Engine
packet forwarding Routing operations such Ethernet Address replacement, reduction checksum generation done hardware Supports both IPv4 IPv6 Supports PPPoE Tunneling IPv6 over IPv4 Tunneling Interface (Continued)
PACKAGE
208-pin plastic LQFP
(FPT-208P-M06)
Copyright©2003-2008 FUJITSU MICROELECTRONICS LIMITED rights reserved 2003.11
MB86977
(Continued) (NAPT) operations such Address replacement, Transport layer port number replacement, checksum generation done hardware Supports PPPoE Tunneling IPv6 over IPv4 Tunneling Interface Supports IPv4 only. Layer Filtering Filtering based Address (Dst and/or Src, supports both IPv4/IPv6) Filtering based TCP/UDP port number (supports flag) Filtering based combinations address port number connections both IPv4 IPv6. Filtering based ICMP Type Filtering based Protocol Type (Type field Ethernet) Supports PPPoE discovery stage /session stage filtering Supports (Authentication Header) Type packet filtering Layer information Supports (Encapsulating Security Payload) type packets filtering Address Filtering applied independently each port (LAN,D.M.Z., WAN) Supports 64x2 (Inbound Outbound) Filter Table Entries Supports filter logging Packet Prioritizing Function Prioritization based combination IPv4 address port number Prioritization based combination IPv4 address field Prioritization based combination IPv4 address, field port number Prioritization based combination IPv6 address, Traffic Class Flow Label Supports mapping field Note: supports only type Ethernet Frames, does support IEEE802.1 type frames IEEE802.1Q VLAN tagged frames (These frames, when received, will sent host). Achieving full wire rate bi-directional throughput Mbps operation.
Layer (MAC) Functions
Four integrated IEEE802.3 compliant 10/100BaseT/TX ports Port selectable RMII/MII interface (Supports both full duplex half duplex) Interface device configuration Supports Auto Negotiation Supports IEEE802.3x Flow control Supports back pressure half duplex mode Integrated SRAM packet buffering (PRAM) Store-and-Forward switching method Address table entries Address auto learning aging
Host Interface
bit-width SRAM host interface BigEndian/LittleEndian configurable
Other features
208-pin Plastic LQFP Package
MB86977
ASSIGNMENT
Name TDOUT SDO1 SDO2 SDO3 SDO4 SDO5 SDO6 INT_ VDDE VDDI VDDE VDDI DQ10 VDDE VDDI DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 Name DQ18 DQ19 DQ20 VDDE VDDI DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 VDDE VDDI VDDE VDDI TX_EN_0 TXD_0 TXD_0 TXD_0 TXD_0 VDDE VDDI VDDE VDDI CRS_DV_0 Name COL_0 TX_CLK_0 RX_DV_0 RXD_0 RXD_0 RXD_0 RXD_0 RX_ER_0 RX_CLK_0 VDDE VDDI CRS_DV_1 COL_1 TX_CLK_1 RX_DV_1 RXD_1 RXD_1 RXD_1 RXD_1 RX_ER_1 RX_CLK_1 VDDE VDDI VDDE VDDI TX_EN_1 TXD_1 TXD_1 TXD_1 TXD_1 Name TX_EN_D TXD_D TXD_D TXD_D TXD_D VDDE VDDI VDDE VDDI CRS_DV_D COL_D TX_CLK_D RX_DV_D RXD_D RXD_D RXD_D RXD_D RX_ER_D RX_CLK_D VDDE VDDI CRS_DV_W COL_W TX_CLK_W RX_DV_W RXD_W RXD_W RXD_W RXD_W (Continued)
MB86977
(Continued)
Name RX_ER_W RX_CLK_W VDDE VDDI VDDE VDDI TX_EN_W TXD_W TXD_W TXD_W TXD_W MDCLK VDDE
Name VDDI VDDE VDDI MDIO REF_CLK VDDE VDDI SCLK
Name SRST_ VDDE VDDI SDI1 SDI2 SDI3
Name SDI4 SDI5 SDI6 XTCK TRST TMODE TDIN TCLK VDDE VDDI VDDE VDDI
MB86977
DESCRIPTION
Host (SRAM) interface Name ADDRESS Address input DATA INPUT/OUTPUT Data input/output bit) CHIP SELECT Chip select input WRITE ENABLE Write operation enable signal (low enable) READ ENABLE Read operation enable signal (low enable) INTERRUPT Interrupt indication (low enable) Function
DQ31
INT_
RMII interface 150, 108, 102, 137, 123,
Name REF_CLK TXD_W TXD_D TXD_0 TXD_1 TX_EN_W TX_EN_D TX_EN_0 TX_EN_1 RX_ER_W RX_ER_D RX_ER_0 RX_ER_1 RXD_W RXD_D RXD_0 RXD_1 CRS_DV_W CRS_DV_D CRS_DV_0 CRS_DV_1
Function REFERENCE CLOCK Reference clock from device. frequency both Mbps Mbps. TRANSMIT DATA data transmitted devices through this interface. Synchronous with REF_CLK. TRANSMIT ENABLE Active high signal indicates that data valid.Synchronous with REF_CLK. RECEIVE ERROR Active high signal indicates that invalid symbol been detected within received packet.This input ignored when CRS_DV signal inactive. RECEIVE DATA data received from device through this interface. CARRIER SENSE RECEIVE DATA VALID Device inputs active high signal when interface receiving data. Asynchronous assertion/deassertion device upon carrier detection/carrier invalid.
Note logical TX_EN CRS_DV signals indicate collision during half duplex modes.
MB86977
Interface interface
Name TX_CLK_W TX_CLK_D TX_CLK_0 TX_CLK_1 TXD_W TXD_D TXD_0 TXD_1 TX_EN_W TX_EN_D TX_EN_0 TX_EN_1 RX_CLK_W RX_CLK_D RX_CLK_0 RX_CLK_1 RX_ER_W RX_ER_D RX_ER_0 RX_ER_1 RX_DV_W RX_DV_D RX_DV_0 RX_DV_1 CRS_DV_W CRS_DV_D CRS_DV_0 CRS_DV_1 RXD_W RXD_D RXD_0 RXD_1 COL_W COL_D COL_0 COL_1
Description CLOCK This clock from device provides timing reference transfer TX_EN signals. frequency Mbps, Mbps. TRANSMIT DATA nibble data transmitted devices through this interface. TRANSMIT ENABLE Active high signal indicates that data valid. Synchronous with TX_CLK. CLOCK This clock from device provides timing reference reception. frequency Mbps, Mbps. RECEIVE ERROR Active high signal indicates that invalid symbol been detected within received packet.This input ignored when RX_DV signal same interface inactive.These pins used both RMII modes. RECEIVE DATA VALID Active high signal indicates that valid. CARRIER SENSE Active high signal indicates that either transmit receive medium idle. synchronous clock. These pins used both RMII modes. RECEIVE DATA Nibble data from device.Bits [1:0] used both RMII modes. COLLISION DETECT Active high signal indicates that collision been detected half duplex mode. valid when TX_EN active. synchronous clock.
Name MDCLK MDIO
Description MANAGEMENT DATA CLOCK Clock PHYs. MANAGEMENT DATA INPUT/OUTPUT Data to/from PHYs.
MB86977
Others
Name SRST_
SYSTEM RESET System Reset signal.
Description
SCLK
SYSTEM CLOCK System clock this device. Also used host interface reference clock. Input level. system operation, sure input reset signal this pin. (Set signal level then "H") Input level.
115, 129, 146, 156, 169, 186, 100, 117, 131, 148, 158, 171, 188, 106, 116, 121, 135, 144, 154, 157, 163, 165, 187, 195, 204,
TRST TMODE TDIN TCLK
VDDE
power supply pin.
VDDI
power supply pin.
Ground pins.
SDI1 SDI6 XTCK TDOUT SDO1 SDO6
Ground pins.
Leave this open.
MB86977
BLOCK DIAGRAM
(LAN D.M.Z. WAN)
RMI/MII
Block
D.M.Z.,
TX/RX unit
block Lookup block
lookup table
Classifier block
control unit
DATA Control Host Data Host Control
Host block
Switch block
engine
Receive/ transmit buffer
SRAM
MB86977
BLOCK DESCRIPTION
block
block transmits receives packets through RMII Interfaces, performs Layer (MAC) functions defined IEEE 802.3. block transfers received frames switch block, transmits frames received from switch block output interface.
block
Block gathers various information (such Full/Half Duplex, Link Status,10/100 Base, etc.) reading device registers through Interface, configures device writing through Interface.
Switch block
Switch block stores packets received from block RAMs (PRAM) transfers packets destination interface based information acquired from Lookup block.
Lookup block
Lookup block looks Address packet received from block, returns destination interface information switch block.
Classifier block
classifier block used determine priority packets transferred between D.M.Z. ports. packets classified into priorities (high low) classifier block. Packets classified high placed high priority queue, processed switch block before priority packets.
Host interface block
Host Interface block contains Engine other minor blocks. Engine forwards packets between interfaces transmits packets to/from host. Host Interface also used read/write from/ internal registers. When MB86977 receives packets destined host, host interface asserts interrupt signal specifies information status register. host transmits packets writing descriptor internal register with information necessary transmit. host interface block Byte integrated dual port RAMs that randomly accessed transmitting receiving packets. host interface accessed like General-purpose SRAM.
MB86977
FUNCTIONAL DESCRIPTION
Engine-NAT/IP forwarding function
Engine-NAT/IP forwarding macro accelerates transformation forwarding through hardware, eliminating software, i.e. host processing. NAT/IP forwarding connections, each defined parameters NAT/IP forwarding table, configured. These connections transmission paths that connect D.M.Z. interfaces, interfaces, D.M.Z. interfaces-all full wire speed. forwarding operations briefly explained below. Forwarding When both destination source addresses input packet matches entries NAT/ forwarding table, packet forwarded through hardware destination interface indicated matching entry. This transmission does require host processing performed full wire speed. there entry NAT/IP forwarding table that matches both addresses (destination source address) input packet, packet sent host through host interface. Described below operation performed packet when Forwarding being applied: address replacement subtraction header checksum recalculation Ethernet frame recalculation Transmission from destination interface indicated forwarding, both IPv4 IPv6 type packets processed. When destination source addresses destination source TCP/UDP port numbers input packet matches entries NAT/IP forwarding table, hardware translates address, replaces port numbers, forwards packet destination interface, according parameters defined matching entry. This transmission does require host processing performed full wire speed. there entry NAT/IP forwarding table that matches both addresses (destination source address) both TCP/UDP port numbers input packet, packet sent host through host interface. Described below operation performed packet when being applied: address replacement subtraction address replacement header checksum recalculation TCP/UDP port number replacement TCP/UDP header checksum recalculation Ethernet frame recalculation Transmission from destination interface indicated NAT, only IPv4 type packets processed. input packets subject translations.These types packets sent host through host interface.
MB86977
NAT/IP forwarding function summarized illustration below. Host interface block SRAM
Buffer Buffer
When match found table FEF- Filter
NAT/IP forwarding
When match found table
FEF- Filter
Switch block
internal
NAT/IP Forwarding Function Overview
MB86977
Engine-header processing function
This device implements processing PPPoE IPv6 over IPv4 tunnel packets through hardware. When input packet four types shown figure below, parameters compared with parameters NAT/IP forwarding table. entries matches this device performs NAT/IP forwarding after removing PPPoE header over tunnel header hardware. When required four kinds headers shown figure below after performing NAT/IP forwarding, necessary PPPoE header field, tunnel header field, control field NAT/ forwarding table specified appropriately. Also, PPPoE header register tunnel header properly. packet length checked after these headers added. original packet length long enough, output packet larger than desired connection. prevent this situation, value packets that will received this device that transmitted networking device must carefully. Only packets processed hardware. IPCP packet sent during PPPoE discovery session stages sent host through host interface block. IPv6 over IPv4 Ether header IPv6 over PPPoE Ether header IPv4 over PPPoE Ether header PPPoE header header IPv4 header Data (TCP/UDP) PPPoE header header IPv6 header Data (TCP/UDP) IPv4 tunnel header IPv6 header Data (TCP/UDP)
IPv6 over IPv4 over PPPoE PPPoE Ether header header
header
IPv4 tunnel header
IPv6 header
Data (TCP/UDP)
Packet Formats Supported Header Processing Function
MB86977
Engine-filtering function
Filtering Filtering applied packets that forwarded between differing segments, i.e. D.M.Z. LAN, D.M.Z. WAN, segments. Filtering executed based following information. Protocol type (Type field Ethernet) address TCP/UDP port number ICMP message type
There filters, inbound packets, other outbound packets.A maximum entries filter. Filtering applied both IPv4 IPv6 packets. Filtering also executed packets that include frames such PPPoE session stage packets. addition, filtering also applied information packets, addresses type IPsec packets. relation between filter shown "NAT/IP forwarding function overview". When Host Interface block receives packet from switch block, first checked filter then forwarded NAT/IP forwarding block. filter applied after packet been processed NAT/IP forwarding block. Filter Logging This device record several characteristics packets dropped filters. There counters that record number packets dropped, buffers that store first Bytes four packets that were dropped filters. Each filter Table entries (for both input output filters) counter that count 255. counter overflows, informed host asserting interrupt signal. host poll counter instead required. buffers that store headers packets (i.e. first bytes packet) configured have packets that match condition constantly overwrite previously stored packet data, overwrite previously stored packets assert interrupt signal soon four buffers have been occupied.
MB86977
Engine-priority control function
Priority control applied D.M.Z. connections through cooperation engine, priority queues switch block, classifier block. Priority control best recommended applications such VoIP where small jitter minimal delay required. switch block forms both high priority queues shown figure below. priority queue used transmission packets with normal priority such data packets. high priority queue used applications such VoIP where high transmission quality required. classifier block determines priority packet referring fields packet corresponding settings priority control table. Below explains operation classifier block when packet transmitted from D.M.Z. WAN. First, classifier block defines priority packet received D.M.Z. interface.If packet classified high priority, packet linked high priority queue destined host interface block. high priority queue serviced prior priority queue, processing carried packet. Since this case NAT/IP forwarding table defined High Priority Interface packet destination, will process packet link high priority queue destined WAN. This high priority queue will serviced priority.Packet transmission from D.M.Z. interface also performed same manner.
Input Ports Classifier @D.M.Z port
Output Ports
Input Ports
output Ports Classifier @WAN port
Host Interface Side Queue
High Priority Queue
Interface Side Queue
High Priority Queue
Priority Queue
Priority Queue
engine
Priority control packet transmission from D.M.Z. WAN.
MB86977
Switch Function
switching possible address base between ports LAN. processing needed same segment, processing load reduced.
MB86977
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(VSS Parameter Power supply voltage Input voltage Output voltage Storage temperature Operation junction temperature Output current Symbol VDDI*1
Rating VDDE VDDE
Unit
Tstg
WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
Recommended Operating Conditions
Value 1.65 1.95 VDDE
Parameter Power supply voltage level input voltage level input voltage Operating temperature
Symbol VDDI VDDE
Unit
WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their representatives beforehand.
MB86977
Characteristics
(VDDE VDDI 0.15 Parameter power supply current level output voltage level output voltage level output characteristics level output characteristics Input leak current Refer figures below. Symbol IDDS Conditions Operation state Static state Value VDDE Unit
level output current VDDE level output current VDDE VDDE
level output characteristics
VDDE
-4.0 -3.0 -2.0 -1.0
level output characteristics
(mA)
-100 -120
(mA)
MB86977
Characteristics
Host interface data read timing (VDDE VDDI 0.15 Parameter chip select input setup time chip select input hold time Read enable input setup time Read enable input hold time Address Input setup time Address Input hold time Read data output delay time Read data output hold time Symbol Value Unit
SCLK
[13:2] [31:0]
RE_, whichever happens later
RE_, whichever happens later
MB86977
Host interface data write timing (VDDE VDDI 0.15 Parameter chip select input setup time chip select input hold time Write Enable input setup time Write Enable input hold time Address Input setup time Address Input hold time Write data input setup time Write data input hold time Symbol Value Unit
SCLK
[13:2]
[31:0]
MB86977
Host interface interrupt timing (VDDE VDDI 0.15 Parameter Interrupt signal output delay time Symbol Value Unit
SCLK
INT_
MB86977
Reset Timings (VDDE VDDI 0.15 Parameter Reset assert time Access barred time after reset deassertion Symbol Value 1000 Unit Clock cycle Clock cycle
SCLK
SRST_
MB86977
interface data transmission timing (VDDE VDDI 0.15 Parameter TX_EN output delay time output delay time Symbol Value Unit
TX_CLK
TX_EN [3:0]
TX_CLK TX_EN [3:0]
MB86977
interface data reception timing (VDDE VDDI 0.15 Parameter RX_DV input setup time RX_DV input hold time input setup time input hold time RX_ER input setup time RX_ER input hold time Symbol Value Unit
RX_CLK
RX_DV [3:0]
RX_CLK RX_DV [3:0]
RX_CLK
RX_ER
MB86977
Interface (VDDE VDDI 0.15 Parameter data input setup time data input hold time data output delay time turn-on delay time (Input mode Output mode) turn-off delay time (Output mode Input mode) Symbol Value Unit
MDIO (INPUT)
MDIO (OUTPUT)
MDIO (INPUT OUTPUT) Input Mode Output Mode
MDIO (OUTPUT INPUT) Output Mode
Input Mode
MB86977
RMII Interface (VDDE VDDI 0.15 Parameter input setup time input hold time CRS_DV input setup time CRS_DV input hold time TX_EN output delay time output delay time Symbol Value Unit
REF_CLK CRS_DV [1:0]
REF_CLK
CRS_DV [1:0]
REF_CLK
TX_EN [1:0]
MB86977
SYSTEM CONFIGURATION
RJ45 RJ45 RJ45 RJ45 Port 10/100 Ethernet
MB86977
Flash
Data
Address
MB86977
NOTES HARDWARE SETTING
This section describes sequence On/Off power supply. Though sequence On/Off restricted, following sequences recommended. Power-ON sequence: VDDI VDDE Signal Power-Off sequence: Signal VDDE VDDI Notes VDDE should supplied with signals while VDDI off; otherwise through current flow, causing potential reliability problems LSI. When switching VDDE from possible that internal state circuit maintained power source noises. Therefore, circuit should initialized. circuit should initialized after power-ON.
MB86977
ORDERING INFORMATION
Part number MB86977PFV-G-BND Package plastic LQFP (FPT-208P-M06) Remarks
MB86977
PACKAGE DIMENSION
208-pin plastic LQFP (FPT-208P-M06)
30.00±0.20(1.181±.008)SQ
28.00±0.10(1.102±.004)SQ
Note These dimensions include resin protrusion. Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
0.145±0.055 (.006±.002)
0.08(.003)
Details part 1.50 -0.10 .059 -.004
+0.20 +.008
(Mounting height)
INDEX 0°~8°
0.10±0.05 (.004±.002) (Stand off)
0.60±0.15 (.024±.006) 0.25(.010)
LEAD
0.50(.020)
0.22±0.05 (.009±.002)
0.08(.003)
2003 FUJITSU LIMITED F208027S-c-3-3
Dimensions (inches) Note values parentheses reference values.
MB86977
MEMO
MB86977
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ further information please contact: North South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 Arques Avenue, Sunnyvale, 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 Korea FUJITSU MICROELECTRONICS KOREA LTD. KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA LTD. Lorong Chuan, #05-08 Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw
Rights Reserved. contents this document subject change without notice. Customers advised consult with sales representatives before ordering. information, such descriptions function application circuit examples, this document presented solely purpose reference show examples operations uses FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does warrant proper operation device with respect based such information. When develop equipment incorporating device based such information, must assume responsibility arising such information. FUJITSU MICROELECTRONICS assumes liability damages whatsoever arising information. information this document, including descriptions function schematic diagrams, shall construed license exercise intellectual property right, such patent right copyright, other right FUJITSU MICROELECTRONICS third party does FUJITSU MICROELECTRONICS warrant non-infringement third-party's intellectual property right other right using such information. FUJITSU MICROELECTRONICS assumes liability infringement intellectual property rights other rights third parties which would result from information contained herein. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that FUJITSU MICROELECTRONICS will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. Exportation/release products described this document require necessary procedures accordance with regulations Foreign Exchange Foreign Trade Control Japan and/or export control laws. company names brand names herein trademarks registered trademarks their respective owners.
Edited Strategic Business Development Dept.

Communication Control PACKET FORWARDING ENGINE MB86977

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