Dual Serial Input Frequency Synthesizer MB15F74UV DESCRIPTIO

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Dual Serial Input Frequency Synthesizer MB15F74UV DESCRIPTIO

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DS04-21381-1Ea
Dual Serial Input Frequency Synthesizer
MB15F74UV
DESCRIPTION
Fujitsu Microelectronics MB15F74UV serial input Phase Locked Loop (PLL) frequency synthesizer with 4000 2000 prescalers. 64/65 128/129 4000 prescaler, 32/33 2000 prescaler selected prescaler that enables pulse swallow operation. BiCMOS process used, result supply current typically supply voltage range from refined charge pump supplies well-balanced output current with selectable serial date. serial data format same MB15F74UL. Fast locking achieved adopting circuit. MB15F74UV small package (BCC18) which decreases mount area MB15F74UV about comparing with former BCC20 (for dual PLL)
FEATURES
High frequency operation synthesizer 4000 synthesizer 2000 power supply voltage Ultra power supply current (VCC SWIF SWRF IF/RF locking state) (Continued)
PACKAGE
18-pin plastic
(LCC-18P-M05)
Copyright©2004-2008 FUJITSU MICROELECTRONICS LIMITED rights reserved 2004.1
MB15F74UV
(Continued) Direct power saving function Power supply current power saving mode (VCC system) (VCC system) Software selectable charge pump current mA/6.0 Dual modulus prescaler 4000 prescaler (64/65 or128/129) /2000 prescaler (32/33 64/65) shift register Serial input binary 14-bit programmable reference divider 16,383 Serial input programmable divider consisting Binary 7-bit swallow counter Binary 11-bit programmable counter 2,047 Built-in high-speed tuning, low-noise phase comparator, current-switching type constant current circuit On-chip phase control phase comparator On-chip phase comparator fast lock noise Built-in digital locking detector circuit detect locking unlocking Operating temperature Serial data format compatible with MB15F74UL Ultra small package BCC18 (2.4 0.45
ASSIGNMENTS
VIEW
Clock OSCIN Data finIF XfinIF GNDIF VCCIF DOIF finRF XfinRF GNDRF VCCRF DORF
PSIF PSRF LD/fout
(LCC-18P-M05)
MB15F74UV
DESCRIPTION
name finIF XfinIF GNDIF VCCIF DoIF PSIF Descriptions Ground input buffer shift register circuit. Prescaler input IF-PLL. Connection external should coupling. Prescaler complimentary input IF-PLL section. This should grounded capacitor. Ground IF-PLL section. Power supply voltage input IF-PLL section, shift register oscillator input buffer. Charge pump output IF-PLL section. Power saving mode control IF-PLL section. This must when power supply started (Open prohibited.) PSIF Normal mode/PSIF Power saving mode Lock detect signal output (LD) /phase comparator monitoring output (fout) pin. output signal selected serial data. outputs fout signal/LDS outputs signal Power saving mode control RF-PLL section. This must when power supply started (Open prohibited. PSRF Normal mode/PSRF Power saving mode Charge pump output RF-PLL section. Power supply voltage input RF-PLL section. Ground RF-PLL section Prescaler complimentary input RF-PLL section. This should grounded capacitor. Prescaler input RF-PLL. Connection external should coupling. Load enable signal input (with schmitt trigger circuit) When "H", data shift register transferred corresponding latch according control serial data. Serial data input (with schmitt trigger circuit) Data transferred corresponding latch (IF-ref. counter, IF-prog. counter, RF-ref. counter, RF-prog. counter) according control serial data. Clock input 23-bit shift register (with schmitt trigger circuit) data shifted into shift register rising edge clock. programmable reference divider input pin. TCXO should connected with coupling capacitor.
LD/fout
PSRF DoRF VCCRF GNDRF XfinRF finRF
Data
Clock OSCIN
MB15F74UV
BLOCK DIAGRAM
VCCIF GNDIF
PSIF
SWIF
FCIF
Intermittent mode control (IF-PLL)
latch
latch
latch
Phase Fast comp. lock (IF-PLL) Tuning Charge Current pump Switch (IF-PLL)
Binary 7-bit Binary 11-bit swallow counter programmable (IF-PLL) counter (IF-PLL)
DoIF
fpIF finIF XfinIF Prescaler (IF-PLL) (32/33, 64/65) latch latch Binary 14-bit programmable ref. counter(IF-PLL) frIF OSCIN (18) Fast lock Tuning frRF latch finRF (14) XfinRF (13)
Prescaler (RF-PLL) (64/65, 128/129)
Lock Det. (IF-PLL) latch setting counter LDIF
setting counter
Selector
Binary 14-bit programmable ref. counter (RF-PLL))
latch
latch LDRF fpRF Lock Det. (RF-PLL)
frIF frRF fpIF fpRF
fout
PSRF
Intermittent mode control (RF-PLL)
Binary 11-bit Binary 7-bit swallow counter programmable counter (RF-PLL) (RF-PLL)
Phase comp. (RF-PLL)
Fast lock Tuning
Charge Current pump Switch (RF-PLL)
SWRF
FCRF
(10) DoRF
fpRF
latch
latch
latch
(15)
Schmitt triger circuit Schmitt triger circuit Schmitt triger circuit
Latch selector
Data (16) Clock(17)
23-bit shift register
(11) (12) VCCRF GNDRF
MB15F74UV
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Input voltage Output voltage Storage temperature LD/fout DoIF, DoRF Symbol Tstg Rating -0.5 -0.5 +125 Unit
WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Input voltage Operating temperature Symbol Value Unit Remarks VCCRF VCCIF
Note VCCRF VCCIF must supply equal voltage. Even either RF-PLL IF-PLL used, power must supplied VCCRF VCCIF keep them equal. recommended that non-use controlled power saving function. Although this device contains anti-static element prevent electrostatic breakdown circuitry been improved electrostatic protection, observe following precautions when handling device. When storing transporting device, conductive case. Before handling device, confirm (jigs and) tools used have been uncharged (grounded) well yourself. conductive sheet working bench. Before fitting device into removing from socket, turn power supply off. When handling (such transporting) device mounted board, protect leads with conductive sheet. WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their representatives beforehand.
MB15F74UV
ELECTRICAL CHARACTERISTICS
(VCC Parameter Symbol ICCIF Power supply current ICCRF Power saving current finIF Operating frequency finRF finIF finRF
Condition finIF 2000 VCCIF finRF 2500 VCCRF PSIF PSRF PSIF PSRF PLL, system PLL, system Schmitt trigger input Schmitt trigger input IDOH -0.5 IDOL VOFF VDOH VDOL
Value 2000 -1.0 -1.0 -8.2 -2.2 -6.0 -1.5 2000 4000 +1.0 +1.0 -1.0 -4.1 -0.8
Unit VP-P
IPSIF IPSRF finIF finRF fOSC PfinIF PfinRF VOSC VDOH VDOL IOFF IDOH
OSCIN Input sensitivity
Input available voltage OSCIN level input voltage level input voltage level input voltage level input voltage level input current level input current Data Clock PSIF PSRF Data Clock
level output voltage level output voltage fout level output voltage DoIF level output voltage DoRF High impedance cutoff DoIF current DoRF level output current level output current fout level output current DoIF DoRF DoIF DoRF
level output current
IDOL
(Continued)
MB15F74UV
(Continued) (VCC Symbol Condition Value Unit
Parameter
IDOL/IDOH IDOMT Charge pump current rate
DOVD
IDOTA
Conditions fosc 12.8 MHz, locking state. VCCIF VCCRF fosc 12.8 MHz, power saving mode. PSIF PSRF VCC, CLK, Data, coupling. 1000 capacitor connected under condition operating frequency. symbol (minus) means direction current flow. (||I3| |I4||) (|I3| |I4|) (||I2| |I1||) (|I1| |I2|) (Applied both lDOL lDOH) [||IDO (+85 |IDO (-40 [|IDO (+85 |IDO (-40 (Applied both IDOL IDOH) When Charge pump current measured, "1".
IDOL
IDOH
VCC/2
Charge pump output voltage
MB15F74UV
FUNCTIONAL DESCRIPTION
Pulse swallow function
fVCO fOSC fVCO Output frequency external voltage controlled oscillator (VCO) Preset divide ratio dual modulus prescaler IF-PLL, 64or RF-PLL) Preset divide ratio binary 11-bit programmable counter 2,047) Preset divide ratio binary 7-bit swallow counter 127, fOSC Reference oscillation frequency (OSCIN input frequency) Preset divide ratio binary 14-bit programmable reference counter 16,383)
Serial Data Input
serial data entered using three pins, Data pin, Clock pin, pin. Programmable dividers IF/RFPLL sections, programmable reference dividers IF/RF-PLL sections controlled individually. serial data binary data entered through Data pin. rising edge Clock, serial data transferred into shift register. rising edge load enable signal, data stored shift register transferred latches depending upon control data setting. programmable reference counter IF-PLL programmable reference counter RF-PLL programmable counter swallow counter IF-PLL programmable counter swallow counter RF-PLL
Shift Register Configuration Programmable Reference Counter
(LSB) Data Flow (MSB)
CN1,
Charge pump current select Divide ratio setting bits programmable reference counter 16,383) LD/fout output setting Control Dummy bits (Set "1")
Note Data input with first.
MB15F74UV
Programmable Counter
(LSB) Data Flow (MSB)
SWIF/ SWRF
FCIF/ FCRF Divide ratio setting bits swallow counter 127) Divide ratio setting bits programmable counter 2,047) LD/fout signal select Divide ratio setting prescaler SWIF, SWRF) Phase control phase detector FCIF, FCRF) Control
SWIF/SWRF FCIF/FCRF CN1,
Note Data input with first.
Data setting Binary 14-bit Programmable Reference Counter Data Setting Divide ratio 16383
Note Divide ratio less than prohibited. Binary 11-bit Programmable Counter Data Setting Divide ratio 2047
Note Divide ratio less than prohibited Binary 7-bit Swallow Counter Data Setting Divide ratio
MB15F74UV
Prescaler Data Setting Divide ratio Prescaler divide ratio IF-PLL Prescaler divide ratio RF-PLL Charge Pump Current Setting Current value ±6.0 ±1.5 32/33 64/65 64/65 128/129
LD/fout output Selectable Setting LD/fout state output frIF fout output frRF fpIF fpRF
Phase Comparator Phase Switching Data Setting Phase comparator input High-impedance Depending upon polarity, should set. High
FCIF, DoIF, DoRF
FCIF, DoIF, DoRF
polarity polarity
Output Frequency
Output voltage
Note Give attention polarity using active type LPF.
MB15F74UV
Power Saving Mode (Intermittent Mode Control Circuit)
Status Normal mode Power saving mode
intermittent mode control circuit reduces power consumption. setting low, device enters into power saving mode, reducing current consumption. Electrical Characteristics chart specific value. phase detector output, becomes high impedance. dual PLL, lock detector, shown Output Logic table. Setting high, releases power saving mode, device works normally. intermittent mode control circuit also ensures smooth startup when device returns normal operation. When returned normal operation, phase comparator output signal unpredictable. This because unknown relationship between comparison frequency (fp) reference frequency (fr) which cause major change comparaor output, resulting frequency jump increase lockup time. prevent major frequency jump, intermittent mode control circuit limits magnitude error signal from phase detector when returns normal operation. Notes When power (VCC) first applied, device must standby mode. must Power-ON.
Clock Data
(power saving mode) Power-ON serial data least after power supply becomes stable (VCC Release power saving mode (PSIF, PSRF "H") least later after setting serial data.
MB15F74UV
Serial Data Data Input Timing
Divide ratio performed through serial interface using Data pin, Clock pin, pin. Setting data read into shift register rise Clock signal, transferred latch rise signal. following diagram shows data input timing. data Invalid data data
Control
Data
Clock
Parameter
Unit
Parameter
Unit
Note should when data transferred into shift register.
MB15F74UV
PHASE COMPARATOR OUTPUT WAVEFORM
IF/RF
IF/RF
"1")
IF/RF
"0")
IF/RF
Output Logic IF-PLL section Locking state/Power saving state Locking state/Power saving state Unlocking state Unlocking state
RF-PLL section Locking state/Power saving state Unlocking state Locking state/Power saving state Unlocking state
output
Notes Phase error detection range Pulses DoIF/RF signals during locking state output prevent dead zone. output becomes when phase error more. output becomes high when phase error less continues three cycles more. depend OSCIN input frequency follows. 2/fosc e.g. 156.3 when fosc 12.8 4/fosc e.g. 312.5 when fosc 12.8
MB15F74UV
TEST CIRCUIT (for Measuring Input Sensitivity fin/OSCIN)
S.G. 1000
S.G.
1000
Controller (divide ratio setting)
Clock Data
OSCIN
S.G. 1000 finIF
1000
finRF
VCCRF 1000 XfinRF GNDRF VCCRF
XfinIF
MB15F74UV
GNDIF VCCIF VCCIF DoIF
DoRF
PSIF
fout
PSRF
Oscilloscope
MB15F74UV
TYPICAL CHARACTERISTICS
input sensitivity
RF-PLL input sensitivity Input frequency
PfinRF [dBm] 1500
Catalog guaranteed range
SPEC
2000
2500
3000
3500
4000
4500
5000
finRF [MHz]
IF-PLL input sensitivity Input frequency
PfinIF [dBm] 1000 1500 finIF [MHz] 2000 2500 3000
Catalog guaranteed range
SPEC
MB15F74UV
OSCIN input sensitivity
Input sensitivity Input frequency
Input sensitivity VOSC (dBm)
Catalog guaranteed range SPEC
Input frequency fOSC (MHz)
MB15F74UV
RF/IF-PLL output current
mode
2.50
Charge pump output current (mA)
2.00 1.50 1.00 0.50 0.00 -0.50 -1.00 -1.50 -2.00 -2.50
+25°C
Charge pump output voltage
mode
8.00
Charge pump output current (mA)
+25°C
6.00 4.00 2.00 0.00 -2.00 -4.00 -6.00 -8.00
Charge pump output voltage
MB15F74UV
input impedance
finIF input impedance
30.266 -102.92 773.21 000.000 494.28 -874.84 58.094 -216.47 39.773 -148
START 100.000
STOP 000.000
finRF input impedance
20.93 -39.352 1.0111 000.000 37.563 -109.96 26.125 -71.227 22.848 -54.025
START 000.000
STOP 000.000
MB15F74UV
OSCIN input impedance
OSCIN input impedance
278.69 -1.0537 3.7761 40.000 2.25 -2.2373 881.62 -1.8299 448.75 -1.353
START 3.000
STOP 40.000
MB15F74UV
REFERENCE INFORMATION (for Lock-up Time, Phase Noise Reference Leakage)
Test Circuit S.G. OSCIN
fVCO 2113.6 MHz/V mode fOSC 19.2
Spectrum Analyzer
0.01 3300
Reference Leakage
ATTEN VAVG
-80.83 50.0
50.0 -80.83
CENTER 2.1136000
SPAN 200.0
Phase Noise
ATTEN VAVG -65.34 dB/Hz 1.00
1.00 -65.34 dB/Hz
CENTER 2.11360000
SPAN 10.00 1.92
(Continued)
MB15F74UV
(Continued)
Lock time 2113.6 MHz2173.6 within 1.47
439.99764 50.0009 2.173604000
2.173600000
2.173596000 -500
2.000 µs/div
4.500
Lock time 2173.6 MHz2113.6 within 1.56
400.00146 -50.0013 2.113604000
2.113600000
2.113596000 -500 2.000 µs/div 4.500
MB15F74UV
APPLICATION EXAMPLE
1000
TCXO
Controller (divide ratio setting)
OSCIN Clock Data
OUTPUT
1000 finIF XfinIF finRF 1000
OUTPUT
1000
MB15F74UV
XfinRF GNDRF
1000
GNDIF
VCCRF
VCCIF
VCCRF DoRF PSIF fout PSRF
VCCIF
DoIF
Lock Detect
Note Clock, Data, schmitt trigger circuit provided (insert pull-down pull-up registor prevent oscillation when open-circuit input)
MB15F74UV
USAGE PRECAUTIONS
VCCRF VCCIF must equal voltage. Even either RF-PLL IF-PLL used, power must supplied VCCRF VCCIF keep them equal. recommended that non-use controlled power saving function. protect against damage electrostatic discharge, note following handling precautions Store transport devices conductive containers. properly grounded workstations, tools, equipment. Turn power before inserting removing this device into from socket. Protect leads with conductive sheet, when transporting board mounted device
ORDERING INFORMATION
Part number MB15F74UVPVB Package 18-pin plastic (LCC-18P-M05) Remarks
MB15F74UV
PACKAGE DIMENSION
18-pin plastic (LCC-18P-M05)
2.31(.090) 0.45(.018) TYP.
2.70±0.10 (.106±.004)
0.45±0.05 (.018±.002) (Mount height)
INDEX AREA
2.40±0.10 (.094±.004)
2.01(.079) 0.45(.018) TYP. 0.075±0.025 (.003±.001) (Stand off)
0.90(.035) 1.90(.075)
1.35(.053) 2.28(.090)
Details part 0.05(.002) 0.14(.006) MIN. 0.25±0.06 (.010±.002)
Details part C0.10(.004) 0.36±0.06 (.014±.002)
Details part 0.36±0.06 (.014±.002)
0.25±0.06 (.010±.002)
0.28±0.06 (.011±.002)
0.28±0.06 (.011±.002)
2003 FUJITSU LIMITED C18058S-c-1-1
Dimensions (inches) Note values parentheses reference values.
MB15F74UV
MEMO
MB15F74UV
MEMO
MB15F74UV
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ further information please contact: North South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 Arques Avenue, Sunnyvale, 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 Korea FUJITSU MICROELECTRONICS KOREA LTD. KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA LTD. Lorong Chuan, #05-08 Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw
Rights Reserved. contents this document subject change without notice. Customers advised consult with sales representatives before ordering. information, such descriptions function application circuit examples, this document presented solely purpose reference show examples operations uses FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does warrant proper operation device with respect based such information. When develop equipment incorporating device based such information, must assume responsibility arising such information. FUJITSU MICROELECTRONICS assumes liability damages whatsoever arising information. information this document, including descriptions function schematic diagrams, shall construed license exercise intellectual property right, such patent right copyright, other right FUJITSU MICROELECTRONICS third party does FUJITSU MICROELECTRONICS warrant non-infringement third-party's intellectual property right other right using such information. FUJITSU MICROELECTRONICS assumes liability infringement intellectual property rights other rights third parties which would result from information contained herein. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that FUJITSU MICROELECTRONICS will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. Exportation/release products described this document require necessary procedures accordance with regulations Foreign Exchange Foreign Trade Control Japan and/or export control laws. company names brand names herein trademarks registered trademarks their respective owners.
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Dual Serial Input Frequency Synthesizer MB15F74UV DESCRIPTIO

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