16-Bit Microcontroller with Infrared Module MAXQ610 low-power, 16

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16-Bit Microcontroller with Infrared Module MAXQ610 low-power, 16

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16-Bit Microcontroller with Infrared Module
MAXQ610 low-power, 16-bit MAXQ® microcontroller designed low-power applications including universal remote controls, consumer electronics, white goods. MAXQ610 combines powerful 16-bit RISC microcontroller integrated peripherals including USARTs SPImaster/slave communications port, along with module with carrier frequency generation flexible port capable multiplexed keypad control. MAXQ610 includes 64KB flash memory data SRAM. Intellectual property (IP) protection provided secure that supports multiple application privilege levels protects code against copying reverse engineering. Privilege levels enable vendors provide libraries applications execute MAXQ610, while limiting access only data code allowed their privilege level. ultimate low-power battery-operated performance, MAXQ610 includes ultra-low-power stop mode (0.2µA, typ). this mode, minimum amount circuitry powered. Wake-up sources include external interrupts, power-fail interrupt, timer interrupt. microcontroller runs from wide 1.70V 3.6V operating voltage. Dedicated Pointer Direct Read from Code Space 16-Bit Instruction Word, 16-Bit Data 16-Bit General-Purpose Working Registers Secure Application Partitioning Protection Memory Features 64KB Flash: Byte Sectors 20,000 Erase/Write Cycles Sector Masked Available Data SRAM Additional Peripherals Power-Fail Warning Power-On Reset/Brownout Reset Automatic Carrier Frequency Generation Modulation 16-Bit, Programmable Timers/Counters with Prescaler Capture/Compare USART Communication Ports Programmable Watchdog Timer 8kHz Nanopower Ring Oscillator Wake-Up Timer (MAXQ610A) (MAXQ610B) General-Purpose I/Os Low-Power Consumption 0.2µA (typ), 2.0µA (max) Stop Mode +25°C, Power-Fail Monitor Disabled 3.75mA (typ) 12MHz Active Mode
MAXQ610
Applications
Remote Controls Battery-Powered Portable Equipment Consumer Electronics Home Appliances White Goods
Ordering Information Features
PART MAXQ610A-0000+* MAXQ610B-0000+ TEMP RANGE +70°C +70°C PIN-PACKAGE TQFN-EP TQFN-EP
High-Performance, Low-Power 16-Bit RISC Core 12MHz Operation Across Entire Operating Range 1.70V 3.6V Operating Voltage Range Total Instructions Simplified Programming Three Independent Data Pointers Accelerate Data Movement with Automatic Increment/Decrement
MAXQ registered trademark Maxim Integrated Products, Inc. trademark Motorola, Inc.
MAXQ610X-0000+** +70°C Bare Note: Contact factory information about masked devices. +Denotes lead(Pb)-free/RoHS-compliant package. *Future product-contact factory availability. **Contact factory availability.
Configurations Selector Guide appear data sheet.
Note: Some revisions this device incorporate deviations from published specifications known errata. Multiple revisions device simultaneously available through various sales channels. information about device errata, www.maxim-ic.com/errata.
Maxim Integrated Products
pricing, delivery, ordering information, please contact Maxim Direct 1-888-629-4642, visit Maxim's website www.maxim-ic.com.
16-Bit Microcontroller with Infrared Module MAXQ610
TABLE CONTENTS
Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Description Block Diagram Detailed Description Microprocessor Memory Memory Protection Stack Memory Utility Watchdog Timer Carrier Generation Modulation Timer Carrier Generation Module Transmission Transmit-Independent External Carrier Modulator Outputs Receive Carrier Burst-Count Mode 16-Bit Timers/Counters General-Purpose USART Serial Peripheral Interface (SPI) On-Chip Oscillator Loader Loading Flash Memory In-Application Flash Programming In-Circuit Debug JTAG Interface Operating Modes Power-Fail Detection Applications Information Grounds Bypassing Differences Versions Additional Documentation Development Technical Support Configurations Selector Guide Package Information
16-Bit Microcontroller with Infrared Module MAXQ610
LIST FIGURES
Figure Transmit Frequency Shifting Example (IRCFME Figure Transmit Carrier Generation Carrier Modulator Control Figure Transmission Waveform (IRCFME Figure External IRTXM (Modulator) Output Figure Capture Figure Receive Burst-Count Example Figure Master Communication Timing Figure Slave Communication Timing Figure On-Chip Oscillator Figure In-Circuit Debugger Figure Power-Fail Detection During Normal Operation Figure Stop Mode Power-Fail Detection States with Power-Fail Monitor Enabled Figure Stop Mode Power-Fail Detection with Power-Fail Monitor Disabled
LIST TABLES
Table Memory Areas Associated Maximum Privilege Levels Table Watchdog Interrupt Timeout (Sysclk 12MHz, CD[1:0] Table USART Mode Details Table Power-Fail Detection States During Normal Operation Table Stop Mode Power-Fail Detection States with Power-Fail Monitor Enabled Table Stop Mode Power-Fail Detection States with Power-Fail Monitor Disabled
16-Bit Microcontroller with Infrared Module MAXQ610
ABSOLUTE MAXIMUM RATINGS
Voltage Range with Respect .-0.3V +3.6V Voltage Range Lead with Respect except .-0.3V (VDD 0.5V) Operating Temperature Range.0°C +70°C Storage Temperature Range .-65°C +150°C Soldering Temperature.Refer IPC/JEDEC J-STD-020 Specification.
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(VDD VRST 3.6V, +70°C.) (Note
PARAMETER Supply Voltage 1.8V Internal Regulator Power-Fail Warning Voltage Supply (Notes Power-Fail Reset Voltage (Note Power-On Reset Voltage Data-Retention Voltage Active Current (Note SYMBOL VREG18 VPFW VRST VPOR VDRV IDD_1 Stop-Mode Current Current Consumption During Power-Fail Power Consumption During Power-On Reset Stop-Mode Resume Time Power-Fail Monitor Startup Time Power-Fail Warning Detection Time Input Voltage IRTX, IRRX, RESET, Port Pins Input High Voltage IRTX, IRRX, RESET, Port Pins Input Hysteresis (Schmitt) Input Voltage HFXIN PRM_ON VIHYS VIL_HFXIN (Note (Notes Power-Fail (Notes (Note Monitors Monitors Monitors (Note Sysclk 12MHz Power-Fail +25°C +70°C +25°C +70°C CONDITIONS VRST 1.62 1.75 1.64 3.75 27.6 29.5 1.67 1.98 1.85 1.70 1.42 UNITS
((PCI (IS1 INANO))]/PCI 8192tHFXIN
16-Bit Microcontroller with Infrared Module
RECOMMENDED OPERATING CONDITIONS (continued)
(VDD VRST 3.6V, +70°C.) (Note
PARAMETER Input High Voltage HFXIN IRRX Input Filter Pulse-Width Reject IRRX Input Filter Pulse-Width Accept Otuput Voltage IRTX SYMBOL VIH_HFXIN IRRX_R IRRX_A 3.6V, 25mA (Note 2.35V, 10mA (Note 1.85V, 4.5mA Output Voltage RESET Port Pins (Note Output High Voltage IRTX Port Pins Input/Output Capacitance Port Pins Input Leakage Current Input Pullup Resistor RESET, IRTX, IRRX, Port Pins EXTERNAL CRYSTAL/RESONATOR Crystal/Resonator Crystal/Resonator Period Crystal/Resonator Warmup Time Oscillator Feedback Resistor EXTERNAL CLOCK INPUT External Clock Frequency External Clock Period External Clock Duty Cycle System Clock Frequency System Clock Period NANOPOWER RING OSCILLATOR Nanopower Ring Oscillator Frequency Nanopower Ring Oscillator Duty Cycle Nanopower Ring Oscillator Current fNANO tNANO INANO +25°C +25°C, voltage (Note (Note Typical 1.64V, +25°C (Note 20.0 XCLK XCLK XCLK_DUTY HFXOUT fHFIN XCLK 1/fCK XCLK fHFXIN tHFXIN XTAL_RDY OSCF From initial oscillation (Note 1/fHFXIN 8192 tHFXIN 3.6V, 11mA (Note 2.35V, (Note 1.85V, 4.5mA -2mA (Note Internal pullup disabled 3.0V, 0.4V (Note 2.0V, 0.4V -100 +100 CONDITIONS UNITS
MAXQ610
VOL_IRTX
16-Bit Microcontroller with Infrared Module MAXQ610
RECOMMENDED OPERATING CONDITIONS (continued)
(VDD VRST 3.6V, +70°C.) (Note
PARAMETER WAKE-UP TIMER Wake-Up Timer Interval FLASH MEMORY System Clock During Flash Programming/Erase Flash Erase Time Flash Programming Time Word Write/Erase Cycles Data Retention Carrier Frequency (Note fCK/2 +25°C fFPSYSCLK ERASE PROG Mass erase Page erase (Note 20,000 Cycles Years tWAKEUP 1/fNANO 65,535/ fNANO SYMBOL CONDITIONS UNITS
Specifications guaranteed design production tested. recommended write flash memory when supply voltage drops below power-fail warning levels there uncertainty duration continuous power supply. user application should check status powerfail warning flag before writing flash ensure complete write operations. Note power-fail warning monitor power-fail reset monitor track each other with minimum delta between 0.11V. Note power-fail reset power-on-reset (POR) detectors operate tandem ensure that both signals active times when VRST. Doing ensures device maintains reset state until minimum operating voltage achieved. Note Guaranteed design production tested. Note Measured part reset. inputs connected VDD. Outputs source/sink current. Part executing code from flash memory. Note power-check interval (PCI) always 1024, 2048, 4096 nanopower ring oscillator clock cycles. Note Current consumption during when powering while VPOR. Note minimum amount time that must below VPFW before power-fail event detected. Note maximum total current, (max) (max), listed outputs combined should exceed 32mA satisfy maximum specified voltage drop. This does include IRTX output. Note Programming time does include overhead associated with utility interface. Note Note
16-Bit Microcontroller with Infrared Module
ELECTRICAL CHARACTERISTICS
(VDD VRST 3.6V, +70°C. electrical specifications guaranteed design production tested.)
PARAMETER Master Operating Frequency Slave Operating Frequency Rise/Fall Time SCLK Output Pulse-Width High/Low MOSI Output Hold Time After SCLK Sample Edge MOSI Output Valid Sample Edge MISO Input Valid SCLK Sample Edge Rise/Fall Setup MISO Input SCLK Sample Edge Rise/Fall Hold SCLK Inactive MOSI Inactive SCLK Input Pulse-Width High/Low SSEL Active First Shift Edge MOSI Input SCLK Sample Edge Rise/Fall Setup MOSI Input from SCLK Sample Edge Transition Hold MISO Output Valid After SCLK Shift Edge Transition SSEL Inactive SCLK Inactive SSEL Rising MISO Output Disabled After SSEL Edge Rise SYMBOL 1/tMCK SPI_RF tMCH, tMCL tMOH tMOV tMIS tMIH tMLH SCH, SPI_RF SPI_RF 2tCK SPI_RF SPI_RF SPI_RF SPI_RF SPI_RF 15pF, pullup tMCK/2 SPI_RF tMCK/2 SPI_RF tMCK/2 SPI_RF tMCK/2 SPI_RF SCK/2 CONDITIONS fCK/2 fCK/4 23.6 UNITS
MAXQ610
16-Bit Microcontroller with Infrared Module MAXQ610
Description
TQFN TQFN NAME POWER PINS Supply Voltage Regulator Capacitor. This must connected ground through 1.0F external ceramic-chip capacitor series with resistor. capacitor must placed close this possible. other external devices other than capacitor should connected this pin. Ground. contact through exposed paddle located underside package. must directly connected ground plane. RESET PINS Digital, Active-Low, Reset Input/Output. held reset when this begins executing from reset vector when released. includes pullup current source should driven open-drain, external source capable sinking excess 4mA. This driven output when internal reset condition occurs. CLOCK PINS HFXIN HFXOUT High-Frequency Crystal Input. Connect external crystal resonator between HFXIN HFXOUT high-frequency system clock. Alternatively, HFXIN input external, high-frequency clock source when HFXOUT floating. FUNCTION PINS Transmit Output. transmit capable sinking 25mA. This defaults high-impedance input with weak pullup disabled during forms reset. Software must configure this after release from reset remove highimpedance input condition. Receive Input. receive pin. This defaults high-impedance input with weak pullup disabled during forms reset. Software must configure this after release from reset remove high-impedance input condition. General-Purpose, Digital, I/O, Type-C Port. These port pins function bidirectional pins. port pins default high-impedance mode after reset. Software must configure these pins after release from reset remove high-impedance input condition. alternate functions must enabled from software. P0.0-P0.7; IRTXM, RX0, TX0, RX1, TX1, TBA0/ TBA1, TBB0/ TBB1 TQFN TQFN PORT P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 SPECIAL FUNCTION IRTXM TBA0/TBA1 TBB0 TBB1 FUNCTION
REGOUT
RESET
IRTX
IRRX
GENERAL-PURPOSE SPECIAL FUNCTION PINS
5-10
16-Bit Microcontroller with Infrared Module
Description (continued)
TQFN TQFN NAME FUNCTION
MAXQ610
9-12,
11-14,
21-28
General-Purpose, Digital, I/O, Type-D Port; External Edge-Selectable Interrupt. These port pins function bidirectional pins interrupts. port pins default high-impedance mode after reset. Software must configure these pins after release from reset remove high-impedance input condition. interrupt functions must enabled from software. TQFN TQFN PORT SPECIAL FUNCTION P1.0-P1.7; P1.0 INT0 INT0-INT7 P1.1 INT1 P1.2 INT2 P1.3 INT3 P1.4 INT4 P1.5 INT5 P1.6 INT6 P1.7 INT7 General-Purpose, Digital, I/O, Type-C Port. These port pins function bidirectional pins. P2.0-P2.3 default high-impedance mode after reset. Software must configure these pins after release from reset remove high-impedance input condition. alternate functions must enabled from software. Enabling pin's special function disables general-purpose pin. JTAG pins (P2.4-P2.7) default their JTAG function with weak pullups enabled after reset. JTAG function disabled using register. P2.0-P2.7; P2.7 functions JTAG test-data output reset defaults input with MOSI, MISO, weak pullup. output function test data only enabled during TAP's SCLK, SSEL, Shift_IR Shift_DR states. TCK, TDI, TQFN TQFN PORT SPECIAL FUNCTION TMS, P2.0 MOSI P2.1 MISO P2.2 SCLK P2.3 SSEL P2.4 P2.5 P2.6 P2.7 General-Purpose, Digital, I/O, Type-D Port; External Edge-Selectable Interrupt. These port pins function bidirectional pins interrupts. port pins default high-impedance mode after reset. Software must configure these pins after release from reset remove high-impedance input condition. interrupt functions must enabled from software. TQFN TQFN PORT SPECIAL FUNCTION P3.0-P3.7; P3.0 INT8 INT8-INT15 P3.1 INT9 P3.2 INT10 P3.3 INT11 P3.4 INT12 P3.5 INT13 P3.6 INT14 P3.7 INT15
16-Bit Microcontroller with Infrared Module MAXQ610
Block Diagram
peting microcontrollers. integrated circuit with brownout support resets device known condition following power-up cycle brownout condition. Additionally, power-fail warning flag power-fail interrupt generated when system voltage falls below power-fail warning voltage, VPFW. power-fail warning feature allows application notify user that system supply appropriate action should taken.
MAXQ610 REGULATOR VOLTAGE MONITOR GPIO 16-BIT MAXQ RISC CLOCK WATCHDOG 16-BIT TIMER SECURE 64KB FLASH SRAM 8kHz NANO RING DRIVER TIMER USART0 USART1
Microprocessor
MAXQ610 based Maxim's MAXQ core. MAXQ low-power implementation 16-bit MAXQ family RISC cores. core supports Harvard memory architecture with separate 16-bit program data address buses. fixed 16-bit instruction word standard, data arranged bits. MAXQ core MAXQ610 family implemented pipelined processor with performance approaching 1MIPS MHz. 16-bit data path implemented around register modules, each register module contributes specific functions core. accumulator module consists sixteen 16-bit registers tightly coupled with arithmetic logic unit (ALU). configurable soft stack supports program flow. Execution instructions triggered data transfer between functional register modules between functional register module memory. Because data movement involves only source destination modules, circuit-switching activities limited active modules only. power-conscious applications, this approach localizes power dissipation minimizes switching noise. modular architecture also provides maximum flexibility reusability that important microprocessor used embedded applications. MAXQ instruction highly orthogonal. arithmetical logical operations register conjunction with accumulator. Data movement supported from register other register. Memory accessed through specific data-pointer registers with automatic increment/decrement support.
16-BIT TIMER
Detailed Description
MAXQ610 microcontroller provides integrated, lowcost solutions that simplify design communications equipment such universal remote controls. Standard features include highly optimized, singlecycle, MAXQ 16-bit RISC core, 64KB flash memory, data RAM, soft stack, general-purpose registers, three data pointers. MAXQ core offers industry's best MIPS/mA rating, allowing developers achieve same performance competing microcontrollers substantially lower clock rates. Combining lower active-mode current with MAXQ610 stopmode current (0.2µA typical) results increased battery life. Application-specific peripherals include flexible timers generating carrier frequencies modulation, high-current drive capable sinking 25mA current, output pins capable sinking ideal applications, generalpurpose pins ideal keypad matrix input, power-fail-detection circuit notify application when supply voltage nearing minimum operating voltage microcontroller. heart MAXQ610 MAXQ 16-bit RISC core. MAXQ610 operates from 12MHz almost instructions execute single clock cycle (83.3ns 12MHz), enabling nearly 12MIPS true code operation. When active device operation required, ultra-low-power stop mode invoked from software resulting quiescent current consumption less than 0.2µA typical 2.0µA maximum. combination high-performance instructions ultralow stop-mode current increases battery life over com-
Memory
MAXQ610 incorporates several memory types that include following: 64KB program flash SRAM data memory 5.25KB utility Soft stack
16-Bit Microcontroller with Infrared Module
Table Memory Areas Associated Maximum Privilege Levels
AREA System User Loader User Application Utility Other (RAM) PAGE ADDRESS ULDR-1 ULDR UAPP-1 UAPP MAXIMUM PRIVILEGE LEVEL High Medium High
MAXQ610
Memory Protection
optional memory-protection feature separates code memory into three areas: system, user loader, user application. Code system area kept confidential. Code user areas prevented from reading writing system code. user loader also protected from user application code. Memory protection implemented using privilege levels code. Each area associated privilege level. RAM/ROM assigned privilege levels well. Refer MAXQ Family User's Guide: MAXQ610 Supplement more thorough explanation topic. Table
Stack Memory
16-bit-wide internal stack provides storage program return addresses also used general-purpose data storage. stack used automatically processor when CALL, RET, RETI instructions executed when interrupt serviced. application also store values stack explicitly using PUSH, POP, POPI instructions. reset, stack pointer, initializes stack (0Fh). CALL, PUSH, interrupt-vectoring operations increment then store value location pointed RET, RETI, POP, POPI operations retrieve value then decrement
Following reset, execution begins utility ROM. software determines whether program execution should immediately jump location 0000h, start system code, special routines mentioned. Routines within utility user accessible called subroutines application software. More information utility functions contained MAXQ Family User's Guide: MAXQ610 Supplement. Some applications require protection against unauthorized viewing program code memory. these applications, access in-system programming, inapplication programming, in-circuit debugging functions prohibited until password been supplied. password defined words physical program memory addresses 0010h 001Fh. Three password locks provided protection three different program memory segments. When (POR default) contents memory addresses 0010h 001Fh value other than 00h, password required access utility ROM, including in-circuit debug in-system programming routines that allow reading writing internal memory. When cleared these utilities fully accessible without password. password automatically ones following mass erase.
Watchdog Timer
internal watchdog timer greatly increases system reliability. timer resets device software execution disturbed. watchdog timer free-running counter designed periodically reset application software. software operating correctly, counter periodically reset never reaches maximum count. However, software operation interrupted, timer does reset, triggering system reset optionally watchdog timer interrupt. This protects system against electrical noise upsets that could cause uncontrolled processor operation. internal watchdog timer upgrade older designs with external watchdog devices, reducing system cost simultaneously increasing reliability.
Utility
utility 5.25KB block internal memory that defaults starting address 8000h. utility consists subroutines that called from application software. These include following: In-system programming (bootstrap loader) using JTAG interface In-circuit debug routines Test routines (internal memory tests, memory loader, etc.) User-callable routines in-application flash programming fast table lookup
16-Bit Microcontroller with Infrared Module MAXQ610
Table Watchdog Interrupt Timeout (Sysclk 12MHz, CD[1:0]
WD[1:0] WATCHDOG CLOCK Sysclk/215 Sysclk/218 Sysclk/221 Sysclk/224 WATCHDOG INTERRUPT TIMEOUT 2.7ms 21.9ms 174.7ms 1.4s WATCHDOG RESET AFTER WATCHDOG INTERRUPT 42.7 42.7 42.7 42.7
watchdog timer functions source both watchdog-timer timeout watchdog-timer reset. timeout period programmed range system clock cycles. interrupt generated when timeout period expires interrupt enabled. watchdog-timer resets follow programmed interrupt timeouts system clock cycles. watchdog timer restarted another full interval this time period, system reset occurs when reset timeout expires. Table
allowed continue free-running throughout receive operation. overflow occurs when timer value rolls over from 0FFFFh 0000h. overflow flag (IROV) interrupt generated enabled (IRIE
Carrier Generation Module
IRCAH byte defines carrier high time terms number input clocks, whereas IRCAL byte defines carrier time. Input Clock (fIRCLK) fSYS/2IRDIV[1:0] Carrier Frequency (fCARRIER) fIRCLK/(IRCAH IRCAL Carrier High Time IRCAH Carrier Time IRCAL Carrier Duty Cycle (IRCAH 1)/(IRCAH IRCAL During transmission, IRCA register latched each downcount interval sampled along with IRTXPOL IRDATA bits beginning each downcount interval that duty-cycle variation frequency shifting possible from interval next, which illustrated Figure Figure illustrates basic carrier generation path IRTX output pin. transmit polarity (IRTXPOL) defines starting/idle state carrier polarity IRTX when timer enabled.
Carrier Generation Modulation Timer
dedicated timer/counter module simplifies lowspeed communication. timer implements pins (IRTX IRRX) supporting transmit receive, respectively. IRTX corresponding port designation, standard port control status bits present. However, IRTX output manipulated high using PWCN.IRTXOUT PWCN.IRTXOE bits when timer enabled (i.e., IREN timer composed separate timing entities: carrier generator carrier modulator. carrier generation module uses 16-bit Carrier register (IRCA) define high time carrier through carrier high byte (IRCAH) carrier byte (IRCAL). carrier modulator uses data (IRDATA) Modulator Time register (IRMT) determine whether carrier idle condition present IRTX. timer enabled when enable (IREN) Value register (IRV) defines beginning value carrier modulator. During transmission, register initially loaded with IRMT value begins down counting towards 0000h, whereas receive mode counts upward from initial register value. During receive operation, register configured reload with 0000h when capture occurs detection selected edges
Transmission
During transmission (IRMODE carrier generator creates appropriate carrier waveform, while carrier modulator performs modulation. carrier modulation performed function carrier cycles IRCLK cycles dependent setting IRCFME bit. When IRCFME downcounter clocked carrier frequency thus modulation function carrier cycles. When IRCFME downcounter clocked IRCLK, allowing carrier modulation timing with IRCLK resolution.
16-Bit Microcontroller with Infrared Module MAXQ610
IRCA IRCA 0202h IRCA 0002h
IRMT
IRMT
IRMT IRCA, IRMT, IRDATA SAMPLED DOWNCOUNT INTERVAL
CARRIER OUTPUT (IRV)
IRDATA
INTERRUPT
IRTX IRTXPOL
IRTX IRTXPOL
Figure Transmit Frequency Shifting Example (IRCFME
IRTXPOL CARRIER GENERATION
IRTX
IRCLK IRCAH IRCAL
CARRIER IRCFME IRDATA IRMT SAMPLE IRDATA 0000h
INTERRUPT
CARRIER MODULATION
Figure Transmit Carrier Generation Carrier Modulator Control
16-Bit Microcontroller with Infrared Module
IRTXPOL defines starting/idle state well carrier polarity IRTX pin. IRTXPOL IRTX logic-high when timer module enabled. IRTXPOL IRTX logic-low when timer enabled. separate register bit, data (IRDATA), used determine whether carrier generator output output IRTX next IRMT carrier cycles. When IRDATA carrier waveform inversion this waveform IRTXPOL output IRTX during next IRMT cycles. When IRDATA idle condition, defined IRTXPOL, output IRTX during next IRMT cycles. timer acts downcounter transmit mode. transmission starts when IREN when IRMODE IRMODE when IREN when IREN IRMODE both same instruction. IRMT IRCA registers, along with IRDATA IRTXPOL bits, sampled beginning transmit process every time timer value reloads value. When reaches 0000h value, next carrier clock, does following: Reloads with IRMT. Samples IRCA, IRDATA, IRTXPOL.
MAXQ610
Generates IRTX accordingly. Sets IRIF Generates interrupt enabled (IRIE terminate current transmission, user switch receive mode (IRMODE clear IREN Carrier Modulation Time IRMT carrier cycles
Transmit-Independent External Carrier Modulator Outputs
normal transmit mode modulates carrier based upon IRDATA bit. However, user option input modulator (envelope) external desired. IRENV[1:0] bits configured 10b, modulator/envelope output IRTXM pin. IRDATA output directly IRTXM IRTXPOL each downcount interval boundary just were being used internally modulate carrier frequency. IRTXPOL inverse IRDATA output IRTXM interval downcount boundaries. envelope output illustrated Figure When envelope mode enabled, possible output either modulated (IRENV[1:0] 01b) unmodulated (IRENV[1:0] 10b) carrier IRTX pin.
IRMT
CARRIER OUTPUT (IRV)
IRDATA
INTERRUPT
IRTX IRTXPOL
IRTX IRTXPOL
Figure Transmission Waveform (IRCFME
16-Bit Microcontroller with Infrared Module MAXQ610
IRTXM IRTXPOL IRTXM IRTXPOL
IRDATA
INTERRUPT INTERVAL IRMT IRMT IRMT IRMT
Figure External IRTXM (Modulator) Output
CARRIER GENERATION
IRCLK IRCAH IRCAL IRCFME
CARRIER MODULATION TIMER OVERFLOW INTERRUPT 0000h INTERRUPT COPY IRMT EDGE DETECT IRXRL
IRRX
RESET 0000h EDGE DETECT IRDATA
Figure Capture
Receive
When configured receive mode (IRMODE hardware supports IRRX capture function. IRRXSEL[1:0] bits define which edge(s) IRRX should trigger timer capture function. module starts operating receive mode when IRMODE IREN Once started, timer (IRV) starts counting from 0000h when quali-
fied capture event defined IRRXSEL happens. register default, counting carrier cycles defined IRCA register. However, carrier frequency detect (IRCFME) allow clocking register directly with IRCLK finer resolution. When IRCFME IRCA defined carrier counted IRV. When IRCFME IRCLK clocks register.
16-Bit Microcontroller with Infrared Module MAXQ610
next qualified event, module does following: Captures IRRX state transfers value IRDATA. falling edge occurs, IRDATA rising edge occurs, IRDATA Transfers current value IRMT. Resets content 0000h IRXRL Continues counting again until next qualified event. timer value rolls over from 0FFFFh 0000h before qualified event happens, timer overflow (IROV) flag interrupt generated enabled. module continues operate receive mode until stopped switching into transmit mode (IRMODE clearing IREN
Carrier Burst-Count Mode
special mode reduces processing burden when performing learning functions. Typically, when operating learning capacity, some number carrier cycles examined frequency determination. Once frequency been determined, receive function reduced counting number carrier pulses burst duration combined mark-space time within burst. simplify this process, receive burst-count mode enabled RXBCNT bit) used. When RXBCNT standard receive capture functionality place.
CARRIER FREQUENCY CALCULATION
IRMT PULSE COUNTING CARRIER CYCLE COUNTING
IRMT PULSE COUNTING
IRRX
IRMT
CAPTURE INTERRUPT (IRIF IRMT. IRXRL SOFTWARE SETS IRCA CARRIER FREQUENCY. SOFTWARE SETS RXBCNT (WHICH CLEARS IRMT 0001 HARDWARE). SOFTWARE CLEARS IRCFME THAT COUNTS CARRIER CYCLES. RESET QUALIFIED EDGE DETECTION IRXRL SOFTWARE ADDS IRMT NUMBER PULSES USED CARRIER MEASUREMENT. IRCA COUNTER SPACE BEGIN IMMEDIATELY (QUALIFIED EDGE RESETS). QUALIFIED EDGE DETECTED: IRMT++ RESET IRXRL IRCA PERIOD ELAPSES: IRIF CARRIER ABSENCE SPACE. BURST MARK IRMT PULSES. SOFTWARE CLEARS RXBCNT THAT CAPTURE NEXT QUALIFIED EDGE. QUALIFIED EDGE DETECTED: IRIF CAPTURE IRMT BURST SPACE (PLUS CARRIER CYCLE). SOFTWARE RXBCNT (5). CONTINUE UNTIL LEARNING SPACE EXCEEDS SOME DURATION. ROLLOVERS USED.
Figure Receive Burst-Count Example
16-Bit Microcontroller with Infrared Module
When RXBCNT capture operation disabled interrupt flag associated with capture longer denotes capture. carrier burst-count mode, IRMT register used only count qualified edges. IRIF interrupt flag (normally used signal capture when RXBCNT becomes ever IRCA cycles elapse without getting qualified edge. IRIF interrupt flag thus denotes absence carrier beginning space receive signal. When RXBCNT changed from IRMT register 0001h. IRCFME still used define whether register counting system IRCLK clocks IRCA-defined carrier cycles. IRXRL still used define whether register reloaded with 0000h detection qualified edge (per IRXSEL[1:0] bits). Figure descriptive sequence embedded figure illustrate expected usage receive burst-count mode. While microcontroller reset state, port pins become high impedance with weak pullups disabled, unless otherwise noted. From software perspective, each port appears group peripheral registers with unique addresses. Special function pins also used general-purpose pins when special functions disabled. detailed description special functions available each pin, refer part-specific user manual. MAXQ Family User's Guide: MAXQ610 Supplement describes special functions available MAXQ610.
MAXQ610
USART
USART units implemented with following characteristics: 2-wire interface Full-duplex operation asynchronous data transfers Half-duplex operation synchronous data transfers Programmable interrupt receive transmit Independent baud-rate generator Programmable parity support Start/stop support
16-Bit Timers/Counters
MAXQ610 provides timers/counters that support following functions: 16-bit timer/counter 16-bit up/down autoreload Counter function external pulse 16-bit timer with capture 16-bit timer with compare Input/output enhancements pulse-width modulation Set/reset/toggle output state comparator match Prescaler with divider (for
Serial Peripheral Interface (SPI)
integrated provides independent serial communication channel that communicates synchronously with peripheral devices multiple master multiple slave system. interface allows access 4-wire, full-duplex serial bus, operated either master mode slave mode. Collision detection provided when more masters attempt data transfer same time. maximum master transfer rate Sysclk/2. When operating slave, MAXQ610 support Sysclk/4 transfer rate. Data transferred 8-bit 16-bit value, first. addition, module supports configuration active SSEL state through slave active select.
General-Purpose
MAXQ610 provides port pins general-purpose I/Os that have following features: CMOS output drivers Schmitt trigger inputs Optional weak pullup when operating input mode
Table USART Mode Details
MODE Mode Mode Mode Mode TYPE Synchronous Asynchronous Asynchronous Asynchronous START BITS DATA BITS STOP BITS
16-Bit Microcontroller with Infrared Module MAXQ610
SHIFT SSEL SAMPLE SHIFT SAMPLE
tMCK SCLK CKPOL/CKPHA tMCH SCLK CKPOL/CKPHA tMOH tMOV MOSI MSB-1 tMLH tMCL
tMIS MISO MSB-1
tMIH
Figure Master Communication Timing
SHIFT SSEL
SAMPLE
SHIFT
SAMPLE tSSH
tSSE tSCK
SCLK CKPOL/CKPHA tSCH SCLK CKPOL/CKPHA tSCL
tSIS MOSI MSB-1
tSIH
tSOV MISO MSB-1
tSLH
Figure Slave Communication Timing
16-Bit Microcontroller with Infrared Module
On-Chip Oscillator
external quartz crystal ceramic resonator connected between HFXIN HFXOUT MAXQ610, illustrated Figure Noise HFXIN HFXOUT adversely affect onchip clock timing. good design practice place crystal capacitors near oscillator circuitry connect HFXIN HFXOUT ground with direct short trace. typical values external capacitors vary with type crystal used should initially selected based load capacitance suggested crystal manufacturer. required, commercial gang programmer used mass programming. Activating JTAG interface loading test access port (TAP) with system programming instruction invokes bootstrap loader. Setting during reset through JTAG interface executes bootstraploader-mode program that resides utility ROM. When programming complete, bootstrap loader clear reset device, allowing device bypass utility begin execution application software. addition, loader also enforces memoryprotection policies. 16-word passwords required access loader interface. Loading memory possible ROM-only versions MAXQ610 family.
MAXQ610
Loader
MAXQ610 includes loader. loader denies access system, user loader, user-application memories unless area-specific password provided. loader available ROM-only versions MAXQ610.
In-Application Flash Programming
From user-application code, flash programmed using utility functions from either assembly language. function declarations that follow show examples some utility functions provided in-application flash programming. Write 16-bit word code address 'dest'. Dest must aligned bits. Returns failure, flash_write (uint16_t dest, uint16_t data);
Loading Flash Memory
internal bootstrap loader allows device reloaded over simple JTAG interface. result, software upgraded in-system, eliminating need costly hardware retrofit when updates required. Remote software uploads possible that enable physically inaccessible applications frequently updated. interface hardware JTAG connection another microcontroller, connection serial port using serial-to-JTAG converter, such MAXQJTAG-001 available from Maxim Integrated Products. in-system programmabili-
HFXIN STOP HFXOUT 30pF MAXQ610
CLOCK CIRCUIT
Figure On-Chip Oscillator
16-Bit Microcontroller with Infrared Module MAXQ610
erase, following function would used: Erase given Flash page addr: Flash offset (anywhere within page) flash_erasepage(uint16_t addr); in-application flash programming must call utility functions erase program flash memory. Memory protection enforced utilty functions. In-application programming available ROMonly versions MAXQ610 family. Background Mode executing normal user program. Allows host configure in-circuit debugger. Debug Mode debugger takes over control CPU. Read/write accesses internal registers memory. Single-step trace operation. interface debug engine controller. interface allows communication with master that either automatic test equipment component that interfaces higher level test part complete system. communication operates across 4-wire serial interface from dedicated that compatible JTAG IEEE 1149. provides independent serial channel communicate synchronously with host system. prevent unauthorized access protected memory regions through JTAG interface, debug engine prevents modification privilege registers disallows access system memory, unless memory protection disabled. addition, services (such register display modification) denied when code executing inside system area. debugger available ROM-only versions MAXQ610 family.
In-Circuit Debug JTAG Interface
Embedded debug hardware software developed integrated into MAXQ610 provide full in-circuit debugging capability user application environment. These hardware software features include: debug engine. registers providing ability breakpoints register, code, data using debug service routines stored ROM. Collectively, these hardware software features support modes in-circuit debug functionality:
MAXQ610
DEBUG SERVICE ROUTINES (UTILITY ROM)
DEBUG ENGINE CONTROLLER CONTROL BREAKPOINT ADDRESS DATA
Figure In-Circuit Debugger
16-Bit Microcontroller with Infrared Module
Operating Modes
lowest power mode operation MAXQ610 stop mode. this mode, state memories preserved, actively running. Wake-up sources include external interrupts, power-fail warning interrupt, power-fail reset. time microcontroller state where code does need executed, user software MAXQ610 into stop mode. nanopower ring oscillator internal ultra-low-power (400nA), 8kHz ring oscillator that used drive wake-up timer that exits stop mode. wake-up timer programmable software steps 125µs approximately power-fail monitor always during normal operation. However, selectively disabled during stop mode minimize power consumption. This feature enabled using power-fail monitor disable (PFD) PWCN register. reset default state which disables power-fail monitor function during stop mode. power-fail monitoring disabled (PFD during stop mode, circuitry responsible generating power-fail warning reset shut down neither condition detected. Thus, VRST condition does invoke reset state. However, event that falls below level, generated. power-fail monitor enabled prior stop mode exit before code execution begins. power-fail warning condition (VDD VPFW) then detected, power-fail interrupt flag stop mode exit. power-fail condition detected (VDD VRST), goes into reset.
MAXQ610
Power-Fail Detection
Figures show power-fail detection response during normal stop mode operation.
tPFW
tPFW
tPFW
tPFW
VPFW VRST
VPOR
INTERNAL RESET (ACTIVE HIGH)
Figure Power-Fail Detection During Normal Operation
16-Bit Microcontroller with Infrared Module MAXQ610
Table Power-Fail Detection States During Normal Operation
STATE POWER-FAIL INTERNAL REGULATOR CRYSTAL OSCILLATOR SRAM RETENTION POR. VPOR VRST. Crystal warmup time, XTAL_RDY. held reset. VRST. normal operation. Power drop short. Power-fail detected. VRST PFW. when VRST VPFW maintains this state least PFW, which time powerfail interrupt generated enabled). continues normal operation. VPOR VRST. Power-fail detected. goes into reset. Power-fail monitor turns periodically. VRST. Crystal warmup time, XTAL_RDY. resumes normal operation from 8000h. VPOR VRST. Power-fail detected. goes into reset. Power-fail monitor turned periodically. POR. Device held reset. operation allowed. COMMENTS
(Periodically)
(Periodically)
reset caused power-fail, power-fail monitor following intervals: Always on-continuous monitoring nanopower ring oscillator clocks (~256ms) nanopower ring oscillator clocks (~512ms) nanopower ring oscillator clocks (~1.024s) case where power-fail circuitry periodically turned power-fail detection turned nanopower ring oscillator cycles. VRST during
detection, monitored additional nanopower ring oscillator period. remains above VRST third nanopower ring period, exits reset state resumes normal operation from utility 8000h after satisfying crystal warmup period. reset generated other event, such RESET being driven externally watchdog timer, power-fail, internal regulator, crystal remain during reset. these cases, exits reset state less than crystal cycles after reset source removed.
16-Bit Microcontroller with Infrared Module MAXQ610
tPFW tPFW tPFW
VPFW VRST VPOR
STOP
INTERNAL RESET (ACTIVE HIGH)
Figure Stop Mode Power-Fail Detection States with Power-Fail Monitor Enabled
Table Stop Mode Power-Fail Detection States with Power-Fail Monitor Enabled
STATE POWER-FAIL INTERNAL REGULATOR CRYSTAL OSCILLATOR SRAM RETENTION COMMENTS Application enters stop mode. VRST. stop mode. Power drop short. Power-fail detected. VRST PFW. Power-fail warning detected. Turn regulator crystal. Crystal warmup time, XTAL_RDY. Exit stop mode. Application enters stop mode. VRST. stop mode. VPOR VRST. Power-fail detected. goes into reset. Power-fail monitor turned periodically. POR. Device held reset. operation allowed.
(Periodically)
16-Bit Microcontroller with Infrared Module MAXQ610
VPFW VRST
VPOR
STOP
INTERNAL RESET (ACTIVE HIGH)
INTERRUPT
Figure Stop Mode Power-Fail Detection with Power-Fail Monitor Disabled
Table Stop Mode Power-Fail Detection States with Power-Fail Monitor Disabled
STATE POWER-FAIL INTERNAL REGULATOR CRYSTAL OSCILLATOR SRAM RETENTION COMMENTS Application enters stop mode. VRST. stop mode. PFW. Power-fail detected because power-fail monitor disabled. VRST PFW. interrupt occurs that causes exit stop mode. Power-fail monitor turned detects powerfail warning, sets power-fail interrupt flag. Turn regulator crystal. Crystal warmup time, XTAL_RDY. stop mode exit, vectors higher priority power-fail interrupt that causes stop mode exit.
16-Bit Microcontroller with Infrared Module
Table Stop Mode Power-Fail Detection States with Power-Fail Monitor Disabled (continued)
STATE POWER-FAIL INTERNAL REGULATOR CRYSTAL OSCILLATOR SRAM RETENTION COMMENTS Application enters stop mode. VRST. stop mode. VPOR VRST. interrupt occurs that causes exit stop mode. Power-fail monitor turned detects powerfail, puts reset. Power-fail monitor turned periodically. Device held reset. operation allowed.
MAXQ610
(Periodically)
Applications Information
low-power, high-performance RISC architecture this device makes excellent many portable battery-powered applications. ideally suited applications such universal remote controls that require cost-effective integration transmit/receive capability.
System designers must protect components against these transients that corrupt system memory.
Differences Versions
ROM-only versions MAXQ610 family devices operate same manner their flash counterparts with following exceptions: loader available version. Loading memory in-application programming supported. debugger available version.
Grounds Bypassing
Careful layout significantly minimizes system-level digital noise that could interact with microcontroller peripheral components. multilayer boards essential allow dedicated power planes. area under digital components should continuous ground plane possible. Keep bypass capacitor leads short best noise rejection place capacitors close leads devices possible. CMOS design guidelines semiconductor require that taken above below GND. Violation this guideline result hard failure (damage silicon inside device) soft failure (unintentional modification memory contents). Voltage spikes above below device's absolute maximum ratings potentially cause devastating latchup. Microcontrollers commonly experience negative voltage spikes through either their power pins generalpurpose pins. Negative voltage spikes power pins especially problematic they directly couple internal power buses. Devices such keypads conduct electrostatic discharges directly into microcontroller seriously damage device.
Additional Documentation
Designers must have following documents fully features this device. This data sheet contains descriptions, feature overviews, electrical specifications. Errata sheets contain deviations from published specifications. user's guides offer detailed information about device features operation. following documents downloaded from This MAXQ610 data sheet, which contains electrical/ timing specifications descriptions. MAXQ610 revision-specific errata sheet (www.maxim-ic.com/errata). MAXQ Family User's Guide which contains detailed information core features operation, including programming. MAXQ Family User's Guide: MAXQ610 Supplement, which contains detailed information features specific MAXQ610.
16-Bit Microcontroller with Infrared Module MAXQ610
Development Technical Support
Maxim third-party suppliers provide variety highly versatile, affordably priced development tools this microcontroller, including following: Compilers In-circuit emulators Integrated Development Environments (IDEs) JTAG-to-serial converters programming debugging partial list development tool vendors found www.maxim-ic.com/MAXQ_tools. Technical support available www.maximic.com/support.
Configurations
P3.5/INT13 P3.4/INT12 P2.2/SCLK P2.1/MISO P2.0/MOSI P2.2/SCLK P2.1/MISO P2.0/MOSI P2.3/SSEL P2.3/SSEL P1.7/INT7 P1.6/INT6 P1.7/INT7 P1.6/INT6 HFXOUT HFXOUT
VIEW
HFXIN
VIEW
P2.4/TCK P2.5/TDI P2.6/TMS P2.7/TDO RESET IRTX IRRX P0.0/IRTXM
P1.5/INT5 P1.4/INT4 REGOUT P1.3/INT3 P1.2/INT2 P1.1/INT1 P1.0/INT0 P2.4/TCK P2.5/TDI P3.6/INT14 P3.7/INT15 P2.6/TMS P2.7/TDO RESET IRTX IRRX
P1.5/INT5 P1.4/INT4 REGOUT P3.3/INT11 MAXQ610 P3.2/INT10 P1.3/INT3
MAXQ610
P0.1/RX0 P0.2/TX0 P0.3/RX1 P0.4/TX1 P0.5/TBA0/TBA1
HFXIN P1.2/INT2 P1.1/INT1 P1.0/INT0 P0.7/TBB1
P0.6/TBB0
P0.7/TBB1
P0.0/IRTXM
P3.0/INT8
P0.1/RX0
P3.1/INT9
P0.2/TX0
P0.3/RX1
P0.4/TX1
P0.5/TBA0/TAB1
P0.6/TBB0
THIN (5mm 5mm)
*EXPOSED GND. *EXPOSED GND.
THIN (6mm 6mm)
Selector Guide
PART MAXQ610A-0000+ MAXQ610B-0000+ MAXQ610X-0000+ OPERATING VOLTAGE 1.70 1.70 1.70 PROGRAM MEMORY (KB) Flash Flash Flash DATA MEMORY (KB) PIN-PACKAGE TQFN-EP TQFN-EP Bare
Note: Contact factory information about masked devices.
16-Bit Microcontroller with Infrared Module
Package Information
latest package outline information land patterns, www.maxim-ic.com/packages. PACKAGE TYPE TQFN-EP TQFN-EP PACKAGE CODE T3255+3 T4066+2 DOCUMENT 21-0140 21-0141
MAXQ610
16-Bit Microcontroller with Infrared Module MAXQ610
Revision History
REVISION NUMBER REVISION DATE 10/08 Initial release. Removed Sysclk 1MHz condition Active Current parameter, changed values from changed fNANO +25°C values from 4.2kHz 14.0kHz 3.0kHz 20.0kHz, respectively, Recommended Operating Conditions table. Added sentence "Software must configure this after release from reset remove high-impedance input condition." IRRX, P0.x, P1.x, P2.x, P3.x descriptions Description table. Added future status TQFN package Ordering Information table. 1/09 Description table, changed REGOUT series resistance from DESCRIPTION PAGES CHANGED
11/08
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600 2009 Maxim Integrated Products registered trademark Maxim Integrated Products, Inc.

16-Bit Microcontroller with Infrared Module MAXQ610 low-power, 16

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