Low-Power Audio/Video Interface Single SCART Connectors 53mW Quie

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Low-Power Audio/Video Interface Single SCART Connectors 53mW Quie

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19-4159; 10/08
Low-Power Audio/Video Interface Single SCART Connectors
53mW Quiescent Power Consumption Shutdown Consumption Audio Operational Amplifiers Create Input Filters Clickless/Popless, DirectDrive Audio Video Reconstruction Filter with 10MHz Passband 43dB Attenuation 27MHz 3.3V Supply Voltages
MAX9597
MAX9597 single SCART interface routes audio video signals between set-top decoder chip external SCART connector under control. Operating from 3.3V supply supply, MAX9597 consumes 53mW during quiescent operation 254mW during average operation when driving typical signals into typical loads. MAX9597 audio section contains left right audio paths with independent operational amplifier inputs. DirectDrive output amplifiers create 2VRMS full-scale audio signal biased around ground, eliminating need bulky output capacitors reducing click-and-pop noise. zero-cross detection circuitry also further reduces clicks pops enabling audio sources switch only during zerocrossing. MAX9597 video section contains channels video filter amplifiers. standard-definition video signals from set-top decoder chip lowpass filtered remove out-of-bandwidth artifacts. MAX9597 also supports slow-switching fast-switching signals. MAX9597 available compact 28-pin thin package specified over +70°C commercial temperature range.
Ordering Information
PART MAX9597CTI+ TEMP RANGE +70°C PIN-PACKAGE TQFN-EP*
+Denotes lead-free/RoHS-compliant package. Exposed pad.
Applications
Set-Top Boxes Receivers Players
DirectDrive registered trademark Maxim Integrated Products, Inc.
System Block Diagram
3.3V VAUD 3.3V
CHIP
MAX9597
INTERFACE REGISTERS RGB, Y/C, CVBS VIDEO FILTERS AUDIO FAST SLOW SWITCHING AUDIO WITH DirectDrive OUTPUTS SCART
VIDEO ENCODER
RGB, Y/C, CVBS
STEREO AUDIO
SINGLE DIFFERENTIAL STEREO AUDIO
SLOW SWITCHING FAST SWITCHING
CHARGE PUMP
Maxim Integrated Products
pricing, delivery, ordering information, please contact Maxim Direct 1-888-629-4642, visit Maxim's website www.maxim-ic.com.
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced GND, unless otherwise noted.) VVID .-0.3V .-0.3V +14V VAUD .-0.3V .-0.1V +0.1V Video Inputs .-0.3V Audio Inputs .(VEP (VEP SDA, SCL, DEV_ADDR .-0.3V TV_SS_OUT .-0.3V (V12 0.3V) Current Video/Audio Inputs .±20mA C1P, C1N, CPVSS .±50mA Output Short-Circuit Current Duration Video Outputs, TV_FS_OUT VVID, GND.Continuous Audio Outputs VAUD, .Continuous TV_SS_OUT V12, EP.Continuous Continuous Power Dissipation +70°C) 28-Pin Thin (derate 21.3mW/°C above +70°C) .1702mW Operating Temperature Range .0°C +70°C Junction Temperature .+150°C Storage Temperature Range .-65°C +150°C Lead Temperature (soldering, 10s) .+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
ELECTRICAL CHARACTERISTICS
(VVID VAUD 3.3V, 12V, load, +70°C, unless otherwise noted. Typical values +25°C.) (Note
PARAMETER Video Supply Voltage Range Audio Supply Voltage Range Slow-Switching Supply Voltage Range VVID Quiescent Supply Current SYMBOL VVID VAUD CONDITIONS Inferred from video PSRR test 3.0V 3.6V Inferred from audio PSRR tests 3.0V 3.6V Inferred from slow-switching levels Normal operation, video output amplifiers enabled Shutdown VAUD Quiescent Supply Current Quiescent Supply Current VIDEO CHARACTERISTICS DC-COUPLED INPUT Input Voltage Range Input Current Input Resistance AC-COUPLED INPUT Sync-Tip Clamp Level Sync Crush Input Clamping Current VCLP Sync-tip clamp Sync-tip clamp; percentage reduction sync pulse (0.3VP-P); guaranteed input clamping current measurement Sync-tip clamp VVID/2, inferred from gain test VVID VVID 3.135V VVID 3.3V 1.15 VP-P IAUD_Q I12_Q Normal operation Shutdown Normal operation Shutdown 11.4 0.01 12.6 UNITS
IVID_Q
Low-Power Audio/Video Interface Single SCART Connectors
ELECTRICAL CHARACTERISTICS (continued)
(VVID VAUD 3.3V, 12V, load, +70°C, unless otherwise noted. Typical values +25°C.) (Note
PARAMETER Input Source Resistance Bias Voltage Input Resistance CHARACTERISTICS VVID VCLP (VCLP 1.15V) VVID/2 VVID 3.135V, VCLP (VCLP 1.2V) VVID (VBIAS 0.575V) (VBIAS 0.575V) VVID 3.135V (VBIAS 0.6V) (VBIAS 0.6V) Gain Mismatch Output Level Guaranteed voltage gain Sync-tip clamp Bias circuit Sync-tip clamp, measured output, VVID VCLP (VCLP 1.15V), VVID/2 Measured output, VVID 3.135V, VCLP (VCLP 1.2V), Guaranteed VVID/2 Bias circuit, measured voltage gain output, VVID (VBIAS 0.575V) (VBIAS 0.575V), VVID/2 Measured output, VVID 3.135V, (VBIAS 0.6V) (VBIAS 0.6V), VVID/2 Output disabled 3.0V VVID 3.6V VBIAS Bias circuit Bias circuit 0.57 SYMBOL CONDITIONS 0.63 UNITS
MAX9597
1.93
2.05
Voltage Gain
1.93 1.38
2.05
0.30
1.62
2.316
2.46 VP-P
Output Voltage Swing
2.316
2.46
Output Short-Circuit Current Output Leakage Current Power-Supply Rejection Ratio
0.02
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
ELECTRICAL CHARACTERISTICS (continued)
(VVID VAUD 3.3V, 12V, load, +70°C, unless otherwise noted. Typical values +25°C.) (Note
PARAMETER CHARACTERISTICS Filter Passband Flatness Filter Attenuation Differential Gain Differential Phase Pulse-to-Bar Rating Pulse Response Response Nonlinearity Group Delay Distortion Peak Signal Noise Power-Supply Rejection Ratio Output Impedance Video Crosstalk Voltage Gain Gain Mismatch Flatness Frequency Bandwidth Capacitive Drive Input Signal Amplitude Output Level Power-Supply Rejection Ratio Signal-to-Noise Ratio Total Harmonic Distortion Plus Noise Output Impedance Mute Suppression Audio Crosstalk 20Hz 20kHz, 0.25VRMS input 0.25VRMS input, frequency where output -3dB referenced 1kHz sustained oscillations, series resistor output 1kHz, input signal, 1kHz 1kHz, 0.25VRMS input, 20Hz 20kHz 3.33k, 1kHz 1kHz 1kHz, 0.25VRMS input 1kHz, 0.25VRMS input 0.25VRMS input 0.5VRMS input 0.0011 0.0021 0.28 VOUT 2VP-P, 100kHz 10MHz VOUT 2VP-P, attenuation referred 100kHz 11MHz 27MHz 54MHz -68.5 3.95 -1.5 0.01 4.05 +1.5 Degrees VRMS SYMBOL CONDITIONS UNITS
5-step modulated staircase, 4.43MHz 5-step modulated staircase, 4.43MHz 200ns; time 18s; beginning 2.5% ending 2.5% time ignored 200ns 200ns; time 18s; beginning 2.5% ending 2.5% time ignored 5-step staircase 100kHz 5MHz, outputs 2VP-P 100kHz 5MHz 100kHz, 100mVP-P 5MHz 4.43MHz
AUDIO CHARACTERISTICS OUTPUT AMPLIFIER (Note
Low-Power Audio/Video Interface Single SCART Connectors
ELECTRICAL CHARACTERISTICS (continued)
(VVID VAUD 3.3V, 12V, load, +70°C, unless otherwise noted. Typical values +25°C.) (Note
PARAMETER VIDEO AUDIO INTERACTION Crosstalk Video input: 15kHz, 1VP-P signal Audio input: 15kHz, 0.1VRMS signal +25°C +70°C -0.707 -0.8V VOUT +0.8V 124, inferred from AVOL test 8.25 1.24 1kHz 1kHz AVCL 1V/V, sustained oscillation 13.5 0.5mA 0.5mA VVID 0.003 VVID 0.003 11.4V 12.6V 11.4V 12.6V 11.4V 12.6V VVID +0.707 SYMBOL CONDITIONS UNITS
MAX9597
INPUT AMPLIFIER OPEN-LOOP CHARACTERISTICS Input Offset Voltage Input Bias Current Input Offset Current Common-Mode Input Voltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Large-Signal Voltage Gain Output Voltage Swing Gain-Bandwidth Product Slew Rate Input Voltage-Noise Density Input Current-Noise Density Capacitive Load Stability CHARGE PUMP Switching Frequency FAST SWITCHING Output Voltage Output High Voltage Output Resistance Rise Time Fall Time SLOW SWITCHING Output Voltage Output Medium Voltage Output High Voltage Input Current DIGITAL INTERFACE (SDA, SCL) Input High Voltage CMRR PSRR AVOL VOUT GBWP Inferred from CMRR test VP-P nV/Hz pA/Hz
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
ELECTRICAL CHARACTERISTICS (continued)
(VVID VAUD 3.3V, 12V, load, +70°C, unless otherwise noted. Typical values +25°C.) (Note
PARAMETER Input Voltage Input Hysteresis Input Leakage Current Input Capacitance VVIDMAX 3.6V 0.1VVID 0.9VVIDMAX 0.1VVID 0.9VVIDMAX pins fast-mode devices must obstruct lines VVID switched ISINK SYMBOL VHYS IIH, have pullup resistors VVID 0.05 VVID CONDITIONS VVID UNITS
Input Current
Output Voltage Serial-Clock Frequency Free Time Between STOP START Condition Hold Time, (REPEATED) START Condition Period Clock High Period Clock Setup Time REPEATED START Condition
fSCL tBUF tHD, tLOW tHIGH tSU,
Data Hold Time
tHD, tHD, tSU,
master device must provide hold time least 300ns signal (referred signal) bridge undefined region SCL's falling edge total capacitance line 400pF; measured between 0.3VVID 0.7VVID
Data Setup Time Fall Time Transmitting Setup Time STOP Condition Pulse Width Spike Suppressed OTHER DIGITAL DEV_ADDR Level DEV_ADDR High Level DEV_ADDR Input Current
Input filters inputs suppress noise spikes less than 50ns
VVID VVID
Note devices 100% production tested +25°C guaranteed design +70°C specified. Note Input operational amplifier configured voltage follower configuration, unless otherwise noted.
Low-Power Audio/Video Interface Single SCART Connectors
Typical Operating Characteristics
(VVID VAUD 3.3V, 12V, video load GND, audio load GND, +25°C, unless otherwise noted.)
VIDEO SMALL-SIGNAL GAIN FREQUENCY
GAIN (dB) GAIN (dB) 100k 100M FREQUENCY (Hz)
MAX9597 toc01
MAX9597
VIDEO SMALL-SIGNAL GAIN FLATNESS FREQUENCY
MAX9597 toc02
VIDEO LARGE-SIGNAL GAIN FREQUENCY
GAIN (dB) VOUT 2VP-P
MAX9597 toc03 MAX9597 toc09 MAX9597 toc06
100k FREQUENCY (Hz) VOUT 100mVP-P
VOUT 100mVP-P
100M
100k
FREQUENCY (Hz)
100M
VIDEO LARGE-SIGNAL GAIN FLATNESS FREQUENCY
MAX9597 toc04
VIDEO CROSSTALK FREQUENCY
MAX9597 toc05
VIDEO GROUP DELAY DISTORTION FREQUENCY
GROUP DELAY (ns) VOUT 2VP-P
GAIN (dB) 100k FREQUENCY (Hz) VOUT 2VP-P
VOUT 2VP-P CROSSTALK (dB)
100M
100k
FREQUENCY (Hz)
100M
100k
FREQUENCY (Hz)
100M
VIDEO POWER-SUPPLY REJECTION RATIO FREQUENCY
MAX9597 toc07
VOLTAGE GAIN TEMPERATURE
MAX9597 toc08
VIDEO OUTPUT VOLTAGE INPUT VOLTAGE
OUTPUT VOLTAGE
PSRR (dB) 100k FREQUENCY (Hz)
2.03 2.02 VOLTAGE GAIN (V/V) 2.01 2.00 1.99 1.98 1.97
-0.5 -0.2 INPUT VOLTAGE TEMPERATURE (°C)
100M
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Typical Operating Characteristics (continued)
(VVID VAUD 3.3V, 12V, video load GND, audio load GND, +25°C, unless otherwise noted.)
DIFFERENTIAL GAIN PHASE
DIFFERENTIAL GAIN -0.1 -0.2 -0.3 -0.2 -0.4 100ns/div OUTPUT 400mV/div
MAX9597 toc10
RESPONSE
MAX9597 toc11
12.5T RESPONSE
MAX9597 toc12
INPUT 200mV/div
INPUT 200mV/div
DIFFERENTIAL PHASE (deg)
OUTPUT 400mV/div
400ns/div
VIDEO TEST SIGNAL
MAX9597 toc13
VIDEO OUTPUT BIAS VOLTAGE TEMPERATURE
MAX9597 toc14
AUDIO LARGE-SIGNAL BANDWIDTH FREQUENCY
0.25VRMS
MAX9597 toc15
1.480 VIDEO OUTPUT BIAS VOLTAGE
INPUT 0.5V/div
1.476
1.472
GAIN (dB)
1.468
OUTPUT 1V/div
1.464
1.460 10s/div TEMPERATURE (°C)
100k
FREQUENCY (Hz)
AUDIO CROSSTALK FREQUENCY
0.25VRMS
MAX9597 toc16
TOTAL HARMONIC DISTORTION PLUS NOISE FREQUENCY
MAX9597 toc17
VAUD POWER-SUPPLY REJECTION RATIO (INPUT REFERRED) FREQUENCY
VAUD 3.3V 100mVP-P
MAX9597 toc18
CROSSTALK (dB)
3.3k
0.01 THD+N 0.25VRMS 0.001 PSRR (dB)
-100 -120 100k FREQUENCY (Hz)
-100
0.5VRMS
0.0001 FREQUENCY (Hz) 100k
-120 FREQUENCY (Hz) 100k
Low-Power Audio/Video Interface Single SCART Connectors
Typical Operating Characteristics (continued)
(VVID VAUD 3.3V, 12V, video load GND, audio load GND, +25°C, unless otherwise noted.)
VVID QUIESCENT SUPPLY CURRENT TEMPERATURE
MAX9597 toc19
MAX9597
VAUD QUIESCENT SUPPLY CURRENT TEMPERATURE
MAX9597 toc20
QUIESCENT SUPPLY CURRENT TEMPERATURE
MAX9597 toc21
14.3 QUIESCENT SUPPLY CURRENT (mA)
QUIESCENT SUPPLY CURRENT (mA)
0.20 QUIESCENT SUPPLY CURRENT
14.2
0.15
14.1
0.10
14.0
0.05
13.9
13.8 TEMPERATURE (°C)
TEMPERATURE (°C) TEMPERATURE (°C)
INPUT-AMPLIFIER INPUT OFFSET VOLTAGE TEMPERATURE
MAX9597 toc22
INPUT-AMPLIFIER INPUT BIAS CURRENT TEMPERATURE
MAX9597 toc23
INPUT OFFSET VOLTAGE (mV)
INPUT BIAS CURRENT
TEMPERATURE (°C) TEMPERATURE (°C)
INPUT-AMPLIFIER GAIN PHASE FREQUENCY
PHASE MARGIN 0pF) PHASE MARGIN 22pF) GAIN PHASE (deg) GAIN (dB) PHASE 100k 100M FREQUENCY (Hz) +100V/V 10mVP-P RLOAD OPEN 0pF/22pF -120 22pF -180 0.0001 THD+N 0.01
MAX9597 toc24
INPUT-AMPLIFIER TOTAL HARMONIC DISTORTION PLUS NOISE FREQUENCY
UNITY GAIN OPEN
MAX9597 toc25
0.001
0.25VRMS 0.5VRMS
FREQUENCY (Hz)
100k
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Typical Operating Characteristics (continued)
(VVID VAUD 3.3V, 12V, video load GND, audio load GND, +25°C, unless otherwise noted.)
INPUT-AMPLIFIER SMALL-SIGNAL TRANSIENT RESPONSE
MAX9597 toc26
INPUT-AMPLIFIER SMALL-SIGNAL TRANSIENT RESPONSE
UNITY GAIN
MAX9597 toc27
UNITY GAIN OPEN
INPUT 50mV/div
INPUT 50mV/div
OUTPUT 50mV/div
OUTPUT 50mV/div
200ns/div
200ns/div
INPUT-AMPLIFIER LARGE-SIGNAL TRANSIENT RESPONSE
UNITY GAIN OPEN
MAX9597 toc28
INPUT-AMPLIFIER LARGE-SIGNAL TRANSIENT RESPONSE
UNITY GAIN
MAX9597 toc29
INPUT 500mV/div
INPUT 500mV/div
OUTPUT 500mV/div
OUTPUT 500mV/div
1s/div
1s/div
Low-Power Audio/Video Interface Single SCART Connectors
Description
NAME VAUD CPVSS DEV_ADDR ENC_B_IN ENC_G_IN ENC_R/C_IN ENC_CVBS_IN TV_CVBS_OUT VVID TV_FS_OUT TV_R/C_OUT TV_G_OUT TV_B_OUT TV_SS_OUT TV_OUTL ENC_INL+ ENC_INLENC_INLOUT ENC_INROUT ENC_INRENC_INR+ TV_OUTR FUNCTION Audio Supply. Connect 3.3V supply. Bypass with aluminum electrolytic capacitor parallel with 0.1F ceramic capacitor Charge-Pump Flying Capacitor Positive Terminal. Connect capacitor from C1N. Charge-Pump Flying Capacitor Negative Terminal. Connect capacitor from C1N. Charge-Pump Negative Power Supply. Bypass with aluminum electrolytic capacitor parallel with ceramic capacitor Device Address Input. Connect DEV_ADDR GND, VVID, SDA, SCL. Table Bidirectional, Data I/O. Output open drain tolerates 3.6V. Clock Input Encoder Blue Video Input Encoder Green Video Input Encoder Red/Chroma Video Input Encoder Composite Video Input SCART Composite Video Output. sync biased 0.3V. Video Digital Supply. Connect +3.3V supply. Bypass with parallel 0.1F ceramic capacitor GND. VVID also serves digital supply interface. SCART Fast-Switching Logic Output. This signal drives back-terminated, transmission line. Video Ground SCART Red/Chroma Video Output. black level signal 0.3V blank level chroma signal 1.5V. SCART Green Video Output. black level green signal 0.3V. SCART Blue Video Output. black level blue signal 0.3V. +12V Supply. Bypass with 0.1F capacitor SCART Slow-Switch Signal Output SCART Left-Channel Audio Output Left Input-Amplifier Noninverting Terminal Left Input-Amplifier Inverting Terminal Left Input-Amplifier Output Right Input-Amplifier Output Right Input-Amplifier Noninverting Terminal Right Input-Amplifier Inverting Terminal SCART Right-Channel Audio Output Exposed Pad. exposed internal ground audio amplifiers charge pump. low-impedance connection required proper isolation.
MAX9597
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Detailed Description
MAX9597 represents Maxim's third generation SCART audio/video (A/V) switches. Under control, these devices route audio, video, control information between set-top decoder chip SCART connector. audio signals left audio right audio. video signals composite video with blanking sync (CVBS) component video (red, green, blue). S-video (Y/C) transported across SCART interface CVBS reassigned luma reassigned chroma (C). Support S-video optional. slow-switch signal fastswitch signal carry control information. slow-switch signal 12V, trilevel signal that indicates whether picture aspect ratio 4:3, 16:9, causes television internal source, such antenna. fast-switch signal indicates whether television should display CVBS signals. CVBS, left audio, right audio full duplex. other signals half duplex. Therefore, device link must designated transmitter, other device must designated receiver. power consumption MAX9597 enables creation lower power set-top boxes, televisions, players. Unlike competing SCART ICs, audio video circuits MAX9597 operate entirely from 3.3V rather than from 12V. Only slowswitch circuit MAX9597 requires supply. MAX9597 features DirectDrive audio circuitry eliminate click-and-pop noise. With DirectDrive, bias audio line outputs always ground when MAX9597 being powered powered down. Conventional audio line output drivers that operate from single supply require series AC-coupling capacitors. During power-up, bias AC-coupling capacitor moves from ground positive voltage, during power-down, opposite occurs. changing bias usually causes audible transient.
Audio Section
audio circuit consists left right audio path, each with independent operational amplifier followed gain-of-4 amplifier. encoder (stereo audio DAC) input source, output goes SCART connector. Figure
ENC_INR+ INPUT ZERO-CROSS DETECTOR VAUD 4V/V ENC_INROUT TV_OUTR
ENC_INR-
ENC_INL+ INPUT ZERO-CROSS DETECTOR VAUD TV_OUTL 4V/V ENC_INLOUT VAUD CPVSS CHARGE PUMP
ENC_INL-
MAX9597
Figure MAX9597 Audio Section Functional Diagram
Low-Power Audio/Video Interface Single SCART Connectors
full-scale output independent operational amplifiers 0.5VRMS. closed-loop gain operational amplifier circuit should designed such that resulting full-scale output 0.5VRMS. fixed, gain-of-4 amplifiers that follow independent operational amplifiers amplify 0.5VRMS 2VRMS, which complies with SCART standard. integrated charge pump inverts +3.3V supply (VAUD) create -3.3V supply (CPVSS), enabling audio circuit operate from bipolar supplies. audio signal from beginning signal path always biased ground.
CONVENTIONAL DRIVER-BIASING SCHEME
MAX9597
VOUT VDD/2
Clickless Muting Unmuting audio channel incorporates zero-crossing detect (ZCD) circuit that minimizes click noise abrupt signal level changes that occur when entering coming mute condition arbitrary moment. implement zero-crossing function when switching audio signals, (register 00h, high. MAX9597 switches signal mute next zero crossing after mute unmute request occurs. Table Audio Outputs MAX9597 audio output amplifiers feature Maxim's patented DirectDrive architecture, eliminating need output-coupling capacitors required conventional single-supply audio line drivers. Conventional singlesupply audio line drivers have their outputs biased about nominal voltage (typically half supply) maximum dynamic range. Large coupling capacitors needed block this bias. Clicks pops created when coupling capacitors charged during power-up discharged during power-down. internal charge pump inverts positive supply (VAUD), creating negative supply (CPVSS). audio output amplifiers operate from bipolar supplies with outputs biased about audio ground (Figure benefit this audio ground bias that amplifier outputs have component. DC-blocking capacitors required with conventional audio line drivers unnecessary, conserving board space, reducing system cost, improving frequency response.
MAX9597 features low-noise charge pump that requires only small ceramic capacitors. 580kHz switching frequency well beyond audio range does interfere with audio signals. switch drivers feature controlled switching speed that minimizes noise generated turn-on turn-off transients. di/dt noise caused parasitic bond
U.S.
+VDD
VOUT
-VDD
DirectDrive BIASING SCHEME
Figure Conventional Driver Output Waveform MAX9597 Output Waveform
wire trace inductance minimized limiting switching speed charge pump. SCART standard specifies 2VRMS full-scale audio signals. audio circuits process 0.5V full-scale audio signals internal MAX9597, gain-of-4 output amplifiers restore audio signals full scale 2VRMS.
Video Section
video circuit routes different video formats between set-top decoder SCART connector. also routes slow-switch fast-switch control information shown Figure
Video Inputs Whether incoming video input signal AC-coupled DC-coupled into MAX9597 depends upon origin, format, voltage range video signal. Table below shows recommended connections. Always AC-couple external video signal through 0.1F capacitor because voltage range well defined (see Typical Application Circuit). example,
Patent #7,061,327
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
ENC_CVBS_IN
CLAMP
2V/V
TV_CVBS_OUT
ENC_R/C_IN
CLAMP/BIAS
2V/V
TV_R/C_OUT
ENC_G_IN
CLAMP
2V/V
TV_G_OUT
ENC_B_IN
CLAMP
2V/V
TV_B_OUT
VVID 1V/V TV_FS_OUT
1V/V TV_SS_OUT
MAX9597
Figure MAX9597 Video Section Function Diagram
video transmitter circuit might have different ground than video receiver, thereby level shifting bias. 50Hz power line might cause video signal change bias slowly. Internal video signals that between DC-coupled. Most video DACs generate video signals between because video sources current into ground-referenced resistor. minority video DACs that generate video signals between 2.3V 3.3V because video sinks current from VDD-referenced resistor, AC-couple video signal MAX9597. MAX9597 restores level incoming, AC-coupled video signals with either transparent synctip clamps bias circuits. When using AC-coupled input, transparent sync-tip clamp automatically clamps input signal minimum ground, preventing
from going lower. small current pulls down input prevent AC-coupled signal from drifting outside input range part. transparent synctip clamp used with CVBS, RGB, luma signals. transparent sync-tip clamp transparent when incoming video signal DC-coupled ground above. Under such conditions, clamp never activates. Therefore, outputs video DACs that generate signals between directly connected MAX9597 inputs. bias circuit accepts AC-coupled chroma, which subcarrier with color information modulated onto bias voltage bias circuits around 600mV. ENC_R/C_IN receive either video signal chroma video signal. input configuration writing register 08h. Table
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Table Recommended Coupling Incoming Video Signals Input Circuit Configuration**
VIDEO ORIGIN External External External External Internal Internal Internal Internal Internal Internal Internal Internal FORMAT CVBS CVBS CVBS VOLTAGE RANGE Unknown Unknown Unknown Unknown COUPLING INPUT CIRCUIT CONFIGURATION Transparent sync-tip clamp Transparent sync-tip clamp Transparent sync-tip clamp Bias circuit Transparent sync-tip clamp Transparent sync-tip clamp Transparent sync-tip clamp Transparent sync-tip clamp Transparent sync-tip clamp Transparent sync-tip clamp Transparent sync-tip clamp Bias circuit
**Use 0.1F capacitor AC-couple video signal into MAX9597.
Video Reconstruction Filter video outputs set-top decoder chip need lowpass-filtered reject out-of-band noise. MAX9597 integrates sixth-order, Butterworth filters. filter passband (±1dB) typically 10MHz, attenuation 27MHz 43dB. filters suited standard-definition video. Video Outputs video output amplifiers both source sink load current, allowing output loads AC-coupled. amplifier output stage needs approximately 300mV headroom from either supply rail. supply voltage greater than 3.135V below 3.3V supply), each amplifier drive DC-coupled video loads ground. supply less than 3.135V, each amplifier drive only DC-coupled AC-coupled video load. SCART standard allows video signals have superimposed component within Therefore, most video signals DC-coupled output. unlikely event that video signal needs AC-coupled, coupling capacitors should 220F greater keep highpass filter formed 37.5 equivalent resistance video transmission line corner frequency 4.8Hz below keep well below 25Hz frame rate standard.
video outputs enabled disabled bits register 0Dh. Table
Slow Switching MAX9597 supports 933-1, Amendment trilevel slow-switching standard that selects aspect ratio display (TV). Under control, MAX9597 sets slow-switching output voltage level. Table shows valid input levels slow-switching signal corresponding operating modes display device. port available slow-switching signals slow-switching outputs logic level high impedance writing register 07h. Table
Table Slow-Switching Modes
SLOW-SWITCHING SIGNAL VOLTAGE MODE
Display device uses internal source such built-in tuner provide video signal. Display device uses video signal from SCART connector sets display 16:9 aspect ratio. Display device uses signal from SCART connector sets display aspect ratio.
12.6
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Table Slave Address
DEV_ADDR VVID WRITE ADDRESS (HEX) READ ADDRESS (HEX)
tSU, tLOW tHD, START CONDITION tHIGH REPEATED START CONDITION STOP CONDITION START CONDITION tHD, tSU, tBUF tHD, tSU,
Figure Serial-Interface Timing Diagram
Fast Switching fast-switching signal originally used switch between CVBS signals pixel-by-pixel basis that on-screen display (OSD) information could inserted. Since modern set-top decoder chips have integrated circuitry, there need create information using older technique. Now, fast-switching signal just used switch between CVBS signal sources. source fast-switching signal writing bits register 07h. fast-switching signal SCART connector enabled disabled register 0Dh. Tables
Serial Interface
MAX9597 features I2C/SMBusTM-compatible, 2-wire serial interface consisting serial-data line (SDA) serial-clock line (SCL). facilitate communication between MAX9597 master clock rates 400kHz. Figure shows 2-wire interface timing diagram. master generates initiates data transfer bus. master device writes data MAX9597 transmitting START condition, proper slave address with followed register address then data word. Each transmit sequence framed START STOP condition. Each word transmitted MAX9597 bits long followed
acknowledge clock pulse. master reads from MAX9597 transmitting slave address with register address register read, REPEATED START (Sr) condition, slave address with followed series pulses. MAX9597 transmits data sync with master-generated pulses. master acknowledges receipt each byte data. Each read sequence framed START REPEATED START condition, acknowledge acknowledge, STOP condition. operates both input open-drain output. pullup resistor, typically greater than 500, required bus. operates only input. pullup resistor, typically greater than 500, required there multiple masters bus, master single-master system open-drain output. Series resistors line with optional. Series resistors protect digital inputs MAX9597 from high-voltage spikes lines, minimize crosstalk undershoot signals.
Transfer data transferred during each cycle. data must remain stable during high period pulse. Changes while high control signals (see START STOP
SMBus trademark Intel Corp.
Low-Power Audio/Video Interface Single SCART Connectors
Conditions section). idle high when busy. START STOP Conditions idle high when use. master initiates communication issuing START condition. START condition high-to-low transition with high. STOP condition low-to-high transition while high (Figure START condition from master signals beginning transmission MAX9597. master terminates transmission, frees bus, issuing STOP condition. remains active REPEATED START condition generated instead STOP condition. Early STOP Conditions MAX9597 recognizes STOP condition point during data transmission except STOP condition occurs same high pulse START condition. proper operation, send STOP condition during same high pulse START condition. Slave Address slave address defined most significant bits (MSBs) followed read/write (R/W) bit. configure MAX9597 read mode. configure MAX9597 write mode. slave address always first byte information sent MAX9597 after START REPEATED START condition. MAX9597 slave address configurable with DEV_ADDR. Table shows possible slave addresses MAX9597. Acknowledge acknowledge (ACK) clocked that MAX9597 uses handshake receipt each byte data when write mode (see Figure MAX9597 pulls down during entire master-generated ninth clock pulse previous byte successfully received. Monitoring allows detection unsuccessful data transfers. unsuccessful data transfer occurs receiving device busy system fault occurred. event unsuccessful data transfer, master retry communication. master pulls down during ninth clock cycle acknowledge receipt data when MAX9597 read mode. acknowledge sent master after each read byte allow data transfer continue. acknowledge sent when master reads final byte data from MAX9597, followed STOP condition.
MAX9597
Figure START, STOP, REPEATED START Conditions
START CONDITION
CLOCK PULSE ACKNOWLEDGMENT
ACKNOWLEDGE
ACKNOWLEDGE
Figure Acknowledge
Write Data Format write MAX9597 consists transmitting START condition, slave address with data byte configure internal register address pointer, more data bytes, STOP condition. Figure illustrates proper frame format writing byte data MAX9597. Figure illustrates frame format writing n-bytes data MAX9597.
slave address with indicates that master intends write data MAX9597. MAX9597 acknowledges receipt address byte during master-generated ninth pulse. second byte transmitted from master configures MAX9597's internal register address pointer. pointer tells MAX9597 where write next byte data. acknowledge pulse sent MAX9597 upon receipt address pointer data. third byte sent MAX9597 contains data that written chosen register. acknowledge pulse from MAX9597 signals receipt data byte. address pointer autoincrements next
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
ACKNOWLEDGE FROM MAX9597 ACKNOWLEDGE FROM MAX9597 SLAVE ADDRESS ACKNOWLEDGE FROM MAX9597 REGISTER ADDRESS DATA BYTE BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
Figure Writing Byte Data MAX9597
ACKNOWLEDGE FROM MAX9597 ACKNOWLEDGE FROM MAX9597 SLAVE ADDRESS ACKNOWLEDGE FROM MAX9597 REGISTER ADDRESS DATA BYTE BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9597
DATA BYTE BYTE
Figure Writing n-Bytes Data MAX9597
register address after each received data byte. This autoincrement feature allows master write sequential register address locations within continuous frame. master signals transmission issuing STOP condition.
Read Data Format master presets address pointer first sending MAX9597's slave address with followed register address after START condition. MAX9597 acknowledges receipt slave address register address pulling during ninth clock pulse. REPEATED START condition then sent followed slave address with MAX9597 transmits contents specified register. Transmitted data valid rising edge master-generated serial clock (SCL). address pointer autoincrements after each read data byte. This autoincrement feature allows registers read sequentially within continuous frame. STOP condition issued after number read data bytes. STOP condition issued followed another read operation, first data byte read from register address location previous transaction subsequent reads autoincrement address pointer
until next STOP condition. Attempting read from register addresses higher than results repeated reads from dummy register containing data. master acknowledges receipt each read byte during acknowledge clock pulse. master must acknowledge correctly received bytes except last byte. final byte must followed acknowledge from master then STOP condition. Figures illustrate frame format reading data from MAX9597.
Applications Information
Operating Modes
MAX9597 operating modes: full power shutdown. operations writing register 10h. Table shudown mode, circuitry shut down except interface, which designed with static CMOS logic. quiet, interface draws only leakage current.
Power Consumption
With 3.3V supply, quiescent power consumption average power consumption MAX9597 very low. Quiescent power consumption defined
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
ACKNOWLEDGE FROM MASTER ACKNOWLEDGE FROM MAX9597 SLAVE ADDRESS ACKNOWLEDGE FROM MAX9597 REGISTER ADDRESS ACKNOWLEDGE FROM MAX9597 SLAVE ADDRESS DATA BYTE BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
REPEATED START
Figure Reading Indexed Byte Data from MAX9597
ACKNOWLEDGE FROM MAX9597 SLAVE ADDRESS
ACKNOWLEDGE FROM MAX9597 REGISTER ADDRESS
ACKNOWLEDGE FROM MAX9597 SLAVE ADDRESS DATA BYTE BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER
REPEATED START
Figure Reading n-Bytes Indexed Data from MAX9597
when MAX9597 operating without loads without audio video signals. Table shows quiescent power consumption both operating modes. Average power consumption defined when MAX9597 drives typical signals into typical loads. Table shows average power consumption full-power mode, Table shows input output conditions.
Table Quiescent Power Consumption
OPERATING MODE Shutdown Full power POWER CONSUMPTION (mW) 0.05
Table Average Power Consumption
OPERATING MODE Full power POWER CONSUMPTION (mW)
Interfacing Modulator
set-top modulates CVBS mono audio onto carrier (for example, channel simple application circuit provide needed signals (see Figure 11). resistor summer circuit between TV_OUTR TV_OUTL creates mono audio signal. resistor-divider ground TV_CVBS_OUT creates video signal with normal amplitude. unique feature MAX9597 that facilitates this application circuit that audio video output amplifiers MAX9597 drive multiple loads VAUD VVID both greater than 3.135V.
Floating-Chassis Discharge Protection
Some set-top boxes have floating chassis problem which chassis connected earth ground. result, chassis charge 500V. When SCART cable connected SCART connector, charged chassis discharge through signal pin. equivalent circuit 2200pF capacitor charged 311V connected through less than signal pin. MAX9597 soldered when experiences such discharge. Therefore, current spike flows through both external internal protection devices absorbed supply bypass capacitors, which have high capacitance ESR.
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
TV_OUTR
MAX9597
MONO AUDIO
TV_OUTL TV_CVBS_OUT GREATER
SCART
GREATER
MODULATOR
Figure Application Circuit Connect CVBS Mono Audio from SCART Modulator
Table Conditions Average Power Consumption Measurement
NAME VAUD ENC_B_IN ENC_G_IN ENC_R/C_IN ENC_CVBS_IN TV_CVBS_OUT VVID TV_FS_OUT TV_R/C_OUT TV_G_OUT TV_B_OUT TV_SS_OUT TV_OUTL ENC_INL+ ENC_INLENC_INLOUT ENC_INROUT ENC_INRENC_INR+ TV_OUTR TYPE Supply Input Input Input Input Output Supply Output Supply Output Output Output Supply Output Output Input Input Output Output Input Input Output SIGNAL 3.3V flat field flat field flat field flat field flat field 3.3V 3.3V flat field flat field flat field 1VRMS, 1kHz 0.25VRMS, 1kHz 0.25VRMS, 1kHz 1VRMS, 1kHz LOAD ground ground ground ground ground ground ground ground ground ground
Note: Input operational amplifiers unity-gain configuration.
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
+3.3V 0.1F 3.3V 0.1F 3.3V 0.1F VAUD CHIP VVID VAUD TV_OUTR VAUD CPVSS TV_SS_OUT DEV_ADDR VIDEO ENCODER ENC_CVBS_IN TV_R/C_OUT ENC_R/C_IN TV_FS_OUT TV_CVBS_OUT ENC_G_IN TV_G_OUT TV_B_OUT CPVSS VVID VVID VVID VVID VVID SCART
MAX9597
TV_OUTL
ENC_B_IN
CPVSS
ENC_INL+ 15nF
ENC_INLSTEREO AUDIO DACS WITH DIFFERENTIAL OUTPUTS 15nF ENC_INLOUT ENC_INR+ 15nF
ENC_INR124 15nF ENC_INROUT NOTE: OPTIONAL RESISTOR PLACED FROM AUDIO OUTPUTS GROUND DECREASE SWING AUDIO OUTPUTS.
:BAV99, SMALL-SIGNAL DIODE
Figure Application Circuit Connect Series Resistors External Protection Diodes MAX9597 Outputs
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
PCM1742 LEFT 1.2nF 3.01k 390pF ENC_INLOUT 3.01k ENC_INR+ RIGHT 1.2nF 3.01k NOTE: RESISTORS 390pF ENC_INROUT 6.04k ENC_INR6.04k ENC_INL-
3.01k
MAX9597
ENC_INL+
Figure Lowpass Filter Configuration Burr-Brown PCM1742
better protect MAX9597 against excess voltages during cable discharge condition events, series resistors inputs outputs SCART connector series resistors already present application circuit. Also external protection diodes (for example, BAV99) inputs output SCART connector.
FILTER RESPONSE FREQUENCY PCM1742 APPLICATION CIRCUIT WITHOUT
GAIN (dB) 100k FREQUENCY (Hz) 0.25VRMS
Lowpass Filter Configuration PCM1742 CS4334
lowpass filter configurations shown Figures recommended when connecting stereo audio audio preamplifier (input amplifier) MAX9597. filter configuration helps eliminate switching noise caused audio DAC. corner frequency filter configuration should above maximum audio frequency (20kHz) below sampling frequency DAC. frequency response filter configurations shown Figures
Differential Single-Ended Conversion Audio Signals
stereo audio generates analog, voltage mode, differential audio signal, circuit shown Figure used convert signal single ended. gain circuit represented this equation: GAIN
Figure Filter Response PCM1742 Filter Configuration
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
CS4334 1.21k LEFT 2.7nF 270k 3.3nF 2.40k 560pF ENC_INLOUT 3.57k ENC_INR+ RIGHT 2.7nF 270k 3.3nF 2.40k 560pF ENC_INROUT NOTE: RESISTORS 1.21k 4.64k 1.21k ENC_INR4.64k 1.21k ENC_INL-
3.57k
MAX9597
ENC_INL+
Figure Lowpass Filter Configuration Cirrus CS4334
Keep full-scale audio output preamplifiers 0.5VRMS. Capacitors create one-pole, lowpass filter attenuate high-frequency noise coming from stereo audio DAC. frequency lowpass pole represented this equation: f-3dB f-3dB
FILTER RESPONSE FREQUENCY CS4334 APPLICATION CIRCUIT WITHOUT
GAIN (dB) 100k FREQUENCY (Hz) 0.25VRMS
stereo audio generates analog, current mode, differential audio signal, Typical Application Circuit used convert signal single ended. transresistance circuit represented this equation: VOUT IDIFF Keep full-scale audio output preamplifiers 0.5VRMS. Capacitors create one-pole, lowpass filter attenuate high-frequency noise coming from stereo audio DAC. frequency lowpass pole represented this equation: f-3dB f-3dB 2(RF 2(RF
Figure Filter Response CS4334 Filter Configuration
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
CHIP LEFT_P LEFT_N RIGHT_P RIGHT_N ENC_INROUT ENC_INRENC_INLOUT ENC_INR+ ENC_INLC1
MAX9597
ENC_INL+
Figure Differential Single-Ended Conversion Circuit Voltage Mode, Differential Audio Signals
Stand-Alone Operational Amplifier Applications
input amplifier audio section utilized stand-alone operational amplifier applications configuring ENC_INR+ ENC_INL+ input noninverting input, ENC_INR- ENC_INL- input inverting input ENC_INROUT ENC_INLOUT output output stand-alone operational amplifier. gain-bandwidth product amplifier 7MHz (typ).
electrolytic capacitor parallel with 0.1F ceramic capacitor audio ground. Bypass VVID with 0.1F ceramic capacitor.
Applications That Need Slow-Switch Signal
should left unconnected MAX9597 used application that does require slowswitch output signal. Figure
Using Digital Supply MAX9597 designed operate from noisy digital supplies. high video PSRR (47dB 100kHz) allows MAX9597 reject noise from digital power supplies (see Typical Operating Characteristics). digital power supply very noisy stripes appear television screen, increase supply bypass capacitance. additional, smaller capacitor parallel with main bypass capacitor reduce digital supply noise because smaller capacitor lower equivalent series resistance (ESR) equivalent series inductance (ESL).
Power-Supply Bypassing
MAX9597 features single 3.3V supply operation requires negative supply. supply SCART slow-switching function. V12, place 0.1F bypass capacitor close possible. Connect VAUD 3.3V bypass with
Layout Grounding
optimal performance, controlled-impedance traces video signal paths place input termination resistors output back-termination resistors close MAX9597. Avoid routing video traces parallel high-speed data lines.
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
N.C. 3.3V VAUD 3.3V
MAX9597
CHIP INTERFACE REGISTERS
CVBS VIDEO FILTERS VIDEO ENCODER CVBS, AUDIO WITH DirectDrive OUTPUTS
LEFT AUDIO RIGHT AUDIO
STEREO AUDIO
SINGLE DIFFERENTIAL STEREO AUDIO
SLOW SWITCHING FAST SWITCHING
CHARGE PUMP
Figure Set-Top with CVBS Output, S-Video Output, Stereo Audio Outputs
MAX9597 provides separate ground connections video audio supplies. best performance, separate ground planes each ground returns connect ground planes together single point. Refer MAX9597 Evaluation proven circuit board layout example.
MAX9597 mounted using flow soldering wave soldering, ground via(s) exposed should have finished hole size least 14mil ensure adequate wicking soldering onto exposed pad. MAX9597 mounted using solder mask technique, requirement does apply. either case, good connection between exposed ground required minimize noise from coupling onto outputs.
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Register Tables
Table Data Format Write Mode
REGISTER ADDRESS (HEXADECIMAL) 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x10 used Operating mode used used TV_B_OUT used TV_G_OUT used used used used used used used audio mute
used
used used used used used used used fast switching used ENC_R/C_IN clamp used used used used TV_R/C_OUT used TV_CVBS_OUT used TV_FS_OUT used used used
slow switching used used
used used
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Table Register 00h: Audio Control
DESCRIPTION audio mute Zero-crossing detector (power-on default) (power-on default) COMMENTS
Table Register 07h: Video Output Control
DESCRIPTION fast switching COMMENTS internal source (power-on default) Medium (4.5V external SCART source with 16:9 aspect ratio High impedance High 9.5V) external SCART source with aspect ratio (power-on default) used Same level VCR_FB_IN VVID
slow switching
Table Register 08h: Video Input Control
DESCRIPTION COMMENTS restore clamp active input (power-on default) Chrominance bias applied input
ENC_R/C_IN clamp/bias
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Table Register 0Dh: Output Enable
DESCRIPTION TV_FS_OUT enable TV_CVBS_OUT enable TV_B_OUT enable TV_G_OUT enable TV_R/C_OUT enable (power-on default) (power-on default) (power-on default) (power-on default) COMMENTS (power-on default)
Table Register 10h: Operating Modes
DESCRIPTION Operating mode Shutdown Full-power mode (power-on default) COMMENTS
Configuration
VIEW
TV_R/C_OUT
Chip Information
PROCESS: BiCMOS
TV_SS_OUT
TV_G_OUT
TV_B_OUT
TV_OUTL
ENC_INL+ ENC_INL- ENC_INLOUT ENC_INROUT ENC_INR- ENC_INR+ TV_OUTR VAUD
TV_FS_OUT VVID TV_CVBS_OUT ENC_CVBS_IN ENC_R/C_IN ENC_G_IN ENC_B_IN
MAX9597
CPVSS
DEV_ADDR
*EXPOSED PAD. CONNECT AUDIO GROUND PROPER THERMAL ELECTRICAL PERFORMANCE
Low-Power Audio/Video Interface Single SCART Connectors
Typical Application Circuit
+3.3V 0.1F 3.3V 0.1F 3.3V 0.1F
MAX9597
CHIP
VVID
VAUD TV_OUTR
MAX9597
TV_OUTL TV_SS_OUT
DEV_ADDR VIDEO ENCODER ENC_CVBS_IN
TV_B_OUT TV_G_OUT TV_R/C_OUT
SCART
ENC_R/C_IN TV_FS_OUT
TV_CVBS_OUT ENC_G_IN
ENC_B_IN
CPVSS
ENC_INL+ (RF) 15nF (C1)
ENC_INLSTEREO AUDIO CURRENT DACS WITH DIFFERENTIAL OUTPUTS (RF) 15nF (C2) ENC_INLOUT ENC_INR+ (RF) 15nF (C1)
ENC_INR124 (RF) 15nF (C2) ENC_INROUT NOTE: OPTIONAL RESISTOR PLACED FROM AUDIO OUTPUTS GROUND DECREASE SWING AUDIO OUTPUTS.
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Package Information
latest package outline information land patterns, www.maxim-ic.com/packages. PACKAGE TYPE TQFN-EP PACKAGE CODE T2855-8 DOCUMENT 21-0140
THIN.EPS
Low-Power Audio/Video Interface Single SCART Connectors
Package Information (continued)
latest package outline information land patterns, www.maxim-ic.com/packages.
MAX9597
Low-Power Audio/Video Interface Single SCART Connectors MAX9597
Revision History
REVISION NUMBER REVISION DATE 6/08 10/08 DESCRIPTION Initial release Corrected resistor value Figure PAGES CHANGED
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600 2008 Maxim Integrated Products registered trademark Maxim Integrated Products, Inc.

Low-Power Audio/Video Interface Single SCART Connectors 53mW Quie

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