LTC2601/LTC2611/LTC2621 single 16-, 12-bit, 2.5V-to-5.5V rail-to-rail
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LTC2601/LTC2611/LTC2621 16-/14-/12-Bit Rail-to-Rail DACs 10-Lead FEATURES
LTC2601/LTC2611/LTC2621 single 16-, 12-bit, 2.5V-to-5.5V rail-to-rail voltage output DACs 10-lead package. They have built-in high performance output buffers guaranteed monotonic. These parts establish board-density benchmarks 14-bit DACs advance performance standards output drive load regulation single-supply, voltage-output DACs. parts simple SPI/MICROWIRE compatible 3-wire serial interface which operated clock rates 50MHz. Daisy-chain capability, hardware asynchronous update (LDAC) pins included. LTC2601/LTC2611/LTC2621 incorporate power-on reset circuit. During power-up, voltage outputs rise less than 10mV above zero scale until valid write update take place. power-on reset circuit resets LTC2601-1/LTC2611-1/LTC2621-1 midscale. voltage outputs stay midscale until valid write update take place.
Lare registered trademarks Linear Technology Corporation. other trademarks property their respective owners. Protected U.S. Patents including 5396245.
Smallest Pin-Compatible Single DACs: LTC2601: Bits LTC2611: Bits LTC2621: Bits Guaranteed Monotonic Over Temperature Wide 2.5V 5.5V Supply Range Power Operation: 300A Power Down High Rail-to-Rail Output Drive (±15mA, Min) Double-Buffered Data Latches Asynchronous Update LTC2601-1/LTC2611-1/LTC2621-1: Power-On Reset Midscale Tiny (3mm 3mm) 10-Lead Package
APPLICATIONS
Mobile Communications Process Control Industrial Automation Instrumentation Automatic Test Equipment
TYPICAL APPLICATION
Differential Nonlinearity (LTC2601)
VREF 4.096V
(LSB)
-0.2 -0.4 -0.6
32-BIT SHIFT REGISTER
INPUT REGISTER
REGISTER
12-/14-/16-BIT
VOUT
CS/LD CONTROL DECODE LOGIC LDAC
-0.8 -1.0 16384 32768 CODE 49152 65535
2600 TA01b
2601 TA01a
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LTC2601/LTC2611/LTC2621 ABSOLUTE MAXIMUM RATINGS
(Note
CONFIGURATION
VIEW CS/LD LDAC VOUT
-0.3V VCC. 0.3V Maximum Junction Temperature. 125°C Storage Temperature Range. -65°C 125°C Lead Temperature (Soldering, sec) 300°C Operating Temperature Range: LTC2601C/LTC2611C/LTC2621C 70°C LTC2601I/LTC2611I/LTC2621I -40°C 85°C
PACKAGE 10-LEAD (3mm 3mm) PLASTIC TJMAX 125°C, 43°C/W EXPOSED (PIN GND, MUST SOLDERED
ORDER INFORMATION
LEAD FREE FINISH LTC2601CDD#PBF LTC2601IDD#PBF LTC2611CDD#PBF LTC2611IDD#PBF LTC2621CDD#PBF LTC2621IDD#PBF LTC2601CDD-1#PBF LTC2601IDD-1#PBF LTC2611CDD-1#PBF LTC2611IDD-1#PBF LTC2621CDD-1#PBF LTC2621IDD-1#PBF LEAD BASED FINISH LTC2601CDD LTC2601IDD LTC2611CDD LTC2611IDD LTC2621CDD LTC2621IDD LTC2601CDD-1 LTC2601IDD-1 LTC2611CDD-1 LTC2611IDD-1 LTC2621CDD-1 LTC2621IDD-1 TAPE REEL LTC2601CDD#TRPBF LTC2601IDD#TRPBF LTC2611CDD#TRPBF LTC2611IDD#TRPBF LTC2621CDD#TRPBF LTC2621IDD#TRPBF LTC2601CDD-1#TRPBF LTC2601IDD-1#TRPBF LTC2611CDD-1#TRPBF LTC2611IDD-1#TRPBF LTC2621CDD-1#TRPBF LTC2621IDD-1#TRPBF TAPE REEL LTC2601CDD#TR LTC2601IDD#TR LTC2611CDD#TR LTC2611IDD#TR LTC2621CDD#TR LTC2621IDD#TR LTC2601CDD-1#TR LTC2601IDD-1#TR LTC2611CDD-1#TR LTC2611IDD-1#TR LTC2621CDD-1#TR LTC2621IDD-1#TR PART MARKING* LAGT LAGT LBFQ LBFQ LBFS LBFS LBZH LBZH LBZJ LBZJ LBZK LBZK PART MARKING* LAGT LAGT LBFQ LBFQ LBFS LBFS LBZH LBZH LBZJ LBZJ LBZK LBZK PACKAGE DESCRIPTION 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic PACKAGE DESCRIPTION 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic 10-Lead (3mm 3mm) Plastic TEMPERATURE RANGE 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C TEMPERATURE RANGE 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C 70°C -40°C 85°C
Consult Marketing parts specified with wider operating temperature ranges. *The temperature grade identified label shipping container. more information lead free part marking, http://www.linear.com/leadfree/ more information tape reel specifications,
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LTC2601/LTC2611/LTC2621 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Performance Resolution Monotonicity Integral Nonlinearity Load Regulation (Note (Note Differential Nonlinearity (Note
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 4.096V (VCC 5V), 2.048V (VCC 2.5V), VOUT unloaded, unless otherwise noted.
LTC2621/ LTC2621-1 CONDITIONS ±0.5 ±0.8 0.03 0.04 0.06 0.08 ±1.5
LTC2611/ LTC2611-1 0.10 0.15 ±1.5
LTC2601/ LTC2601-1 0.45 0.60 ±1.5 UNITS Bits Bits LSB/mA LSB/mA LSB/mA LSB/mA V/°C ±0.7 %FSR ppm/°C
0.125 0.125 0.25 0.25
VREF Midscale IOUT 15mA Sourcing IOUT 15mA Sinking VREF 2.5V, Midscale IOUT 7.5mA Sourcing IOUT 7.5mA Sinking
Zero-Scale Error Offset Error Temperature Coefficient
Code (Note
Gain Error Gain Temperature Coefficient
±0.03
±0.7
±0.1
±0.7
±0.05
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 4.096V (VCC 5V), 2.048V (VCC 2.5V), VOUT unloaded, unless otherwise noted. (Note
SYMBOL PARAMETER ROUT Power Supply Rejection Output Impedance Short-Circuit Output Current CONDITIONS ±10% ±10% VREF Midscale; -15mA IOUT 15mA VREF 2.5V, Midscale; -7.5mA IOUT 7.5mA 5.5V, VREF 5.5V Code: Zero Scale; Forcing Output Code: Full Scale; Forcing Output 2.5V, VREF 2.5V Code: Zero Scale; Forcing Output Code: Full Scale; Forcing Output Reference Input Input Voltage Range Resistance Capacitance IREF Reference Current, Power Down Mode Powered Down Positive Supply Voltage Supply Current Specified Performance (Note (Note Powered Down (Note Powered Down (Note 2.5V 5.5V 2.5V 3.6V
0.04 0.05
UNITS
0.15 0.15
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Normal Mode
0.001
Power Supply 0.375 0.30 0.40 0.10 0.55 0.45
Digital Digital Input High Voltage
LTC2601/LTC2611/LTC2621 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Digital Input Voltage Digital Output High Voltage Digital Output Voltage Digital Input Leakage Digital Input Capacitance
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 4.096V (VCC 5V), 2.048V (VCC 2.5V), VOUT unloaded, unless otherwise noted. (Note
CONDITIONS 4.5V 5.5V 2.5V 5.5V Load Current -100A Load Current +100A (Note
UNITS
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 4.096V (VCC 5V), 2.048V (VCC 2.5V), VOUT unloaded, unless otherwise noted.
LTC2621/ LTC2621-1 SYMBOL PARAMETER Performance Settling Time (Note ±0.024% (±1LSB Bits) ±0.006% (±1LSB Bits) ±0.0015% (±1LSB Bits) ±0.024% (±1LSB Bits) ±0.006% (±1LSB Bits) ±0.0015% (±1LSB Bits) 0.80 1000 0.80 1000 nV/Hz nV/Hz VP-P CONDITIONS LTC2611/ LTC2611-1 LTC2601/ LTC2601-1 UNITS
Settling Time 1LSB Step (Note Voltage Output Slew Rate Capacitive Load Driving Glitch Impulse Multiplying Bandwidth Output Voltage Noise Density Output Voltage Noise
0.80 1000 Midscale Transition 1kHz 10kHz 0.1Hz 10Hz
TIMING CHARACTERISTICS
SYMBOL PARAMETER Valid Setup Valid Hold High Time Time CS/LD Pulse Width High CS/LD High CS/LD High 2.5V 5.5V
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. (See Figure (Notes
CONDITIONS
UNITS
Propagation Delay from Falling Edge
CLOAD 10pF 4.5V 5.5V 2.5V 5.5V
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Pulse Width CS/LD High Positive Edge LDAC Pulse Width CS/LD High LDAC High Transition Frequency Duty Cycle
LTC2601/LTC2611/LTC2621 TIMING CHARACTERISTICS
Note Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. Exposure Absolute Maximum Rating condition extended periods affect device reliability lifetime. Note Linearity monotonicity defined from code code where resolution given 0.016(2N/VREF), rounded nearest whole code. VREF 4.096V linearity defined from code code 65,535. Note Digital inputs VCC. Note Guaranteed design production tested. Note Inferred from measurement code 0.016(2N/VREF) full scale. Note VREF 4.096V. stepped scale scale scale scale. Load parallel with 200pF GND. Note VREF 4.096V. stepped ±1LSB between half scale half scale Load parallel with 200pF GND. Note These specifications apply LTC2601/LTC2601-1, LTC2611/LTC2611-1, LTC2621/LTC2621-1
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2601
Integral Nonlinearity (INL)
(LSB) (LSB) 16384 32768 CODE 49152 65535
2601
Differential Nonlinearity (DNL)
(LSB) -0.2 -0.4 -0.6 -0.8 -1.0 16384 32768 CODE 49152 65535
2600
Temperature
TEMPERATURE (°C) (NEG) (POS) VREF 4.096V
VREF 4.096V
VREF 4.096V
2601
Temperature
(LSB) -0.2 -0.4 -0.6 -0.8 -1.0 TEMPERATURE (°C) (NEG) (POS) (LSB) VREF 4.096V
VREF
5.5V (POS) (LSB)
VREF
5.5V
(POS) (NEG) -0.5 -1.0 -1.5
(NEG)
VREF
2601
VREF
2601
2601
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LTC2601/LTC2611/LTC2621 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2601
Settling ±1LSB Settling Full-Scale Step
VOUT 100V/DIV 9.7s CS/LD 2V/DIV
2601
VOUT 100V/DIV CS/LD 2V/DIV
12.3s
2s/DIV VREF 4.096V 1/4-SCALE 3/4-SCALE STEP 200pF AVERAGE 2048 EVENTS
5s/DIV SETTLING ±1LSB VREF 4.096V CODE 65535 STEP AVERAGE 2048 EVENTS
2601
LTC2611
Integral Nonlinearity (INL)
(LSB) (LSB) 4096 8192 CODE 12288 16383
2601
Differential Nonlinearity (DNL)
-0.2 -0.4 -0.6 -0.8 -1.0 4096 8192 CODE 12288 16383
2601
Settling ±1LSB
VREF 4.096V
VREF 4.096V
VOUT 100V/DIV CS/LD 2V/DIV
8.9s 2s/DIV VREF 4.096V 1/4-SCALE 3/4-SCALE STEP 200pF AVERAGE 2048 EVENTS
2601
LTC2621
Integral Nonlinearity (INL)
(LSB) (LSB) -0.5 -1.0 -1.5 -2.0 1024 2048 CODE 3072 4095
2601
Differential Nonlinearity (DNL)
-0.2 -0.4 -0.6 -0.8 -1.0 1024 2048 CODE 3072 4095
2601
Settling ±1LSB
VREF 4.096V
VREF 4.096V 6.8s VOUT 1mV/DIV CS/LD 2V/DIV
2601
2s/DIV VREF 4.096V 1/4-SCALE 3/4-SCALE STEP 200pF AVERAGE 2048 EVENTS
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LTC2601/LTC2611/LTC2621 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2601/LTC2611/LTC2621
Current Limiting
0.10 0.08 0.06 0.04 VOUT 0.02 -0.02 -0.04 -0.06 -0.08 -0.10 IOUT (mA) VREF VREF CODE MIDSCALE VREF VREF VOUT (mV) -0.2 -0.4 -0.6 -0.8 -1.0 IOUT (mA) TEMPERATURE (°C) VREF VREF OFFSET ERROR (mV)
Load RegulatioCODE MIDSCALE
Offset Error Temperature
2601
2601
2601
Zero-Scale Error Temperature
ZERO-SCALE ERROR (mV) GAIN ERROR (%FSR)
Gain Error Temperature
OFFSET ERROR (mV)
Offset Error
-0.1 -0.2 -0.3
TEMPERATURE (°C)
-0.4
TEMPERATURE (°C)
2601
2601
2601
Gain Error
GAIN ERROR (%FSR) (nA) -0.1 -0.2 -0.3 -0.4
2601
Shutdown
VOUT 0.5V/DIV
Large-Signal Response
VREF 1/4-SCALE 3/4-SCALE 2.5s/DIV
2601
2601
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LTC2601/LTC2611/LTC2621 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2601/LTC2611/LTC2621
Midscale Glitch Impulse Power-On Reset Glitch Zero Scale
VOUT 10mV/DIV 12nV-s 1V/DIV VOUT PEAK CS/LD 5V/DIV 2.5s/DIV
2601
Headroom Rails Output Current
SOURCING
250s/DIV
2601
SOURCING
VOUT 10mV/DIV
IOUT (mA) SINKING
SINKING
2601
Supply Current Logic Voltage
(mA) LOGIC VOLTAGE 5V/DIV SWEEP SCK, CS/LD
Hardware Zero Scale
VREF 4.096V CODE FULL SCALE VOUT 1V/DIV
Hardware Midscale
VREF 4.096V CODE FULL SCALE
VOUT 1V/DIV
5V/DIV 1s/DIV
2601
1s/DIV
2601
2601
Power-On Reset Midscale
VREF 1V/DIV 500s/DIV
2601
Multiplying Bandwidth
Output Voltage Noise, 0.1Hz 10Hz
VOUT 10V/DIV
VOUT
VREF (DC) VREF (AC) 0.2VP-P CODE FULL SCALE 100k FREQUENCY (Hz)
2601
SECONDS
2601
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LTC2601/LTC2611/LTC2621 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2601/LTC2611/LTC2621
Short-Circuit Output Current VOUT (Sinking)
5.5V VREF 5.6V CODE VOUT SWEPT 10mA/DIV 5.5V VREF 5.6V CODE FULL SCALE VOUT SWEPT
Short-Circuit Output Current VOUT (Sourcing)
10mA/DIV
1V/DIV
2601
1V/DIV
2601
FUNCTIONS
(Pin Serial Interface Data Output. This used daisy-chain operation. serial output shift register appears pin. data transferred device delayed rising edges before being output next falling edge. active output does high impedance even when CS/LD taken logic high level. (Pin Serial Interface Data Input. Data applied transfer device rising edge (Pin LTC2601 accepts input word lengths either bits. (Pin Serial Interface Clock Input. CMOS compatible. (Pin Asynchronous Clear Input. logic this level-triggered input clears registers causes voltage outputs drop LTC2601/LTC2611/ LTC2621. logic this input sets registers midscale code causes voltage outputs midscale LTC2601-1/LTC2611-1/LTC2621-1. CMOS compatible. CS/LD (Pin Serial Interface Chip Select/Load Input. When CS/LD low, enabled shifting data into register. When CS/LD taken high, disabled specified command (see Table executed. (Pin Reference Voltage Input. VREF VCC. VOUT (Pin Analog Voltage Output. output range VREF. (Pin Analog Ground. (Pin Supply Voltage Input. 2.5V 5.5V. LDAC (Pin 10): Asynchronous Update Pin. CS/LD high, falling edge LDAC immediately updates register with contents input register (similar software update). CS/LD when LDAC goes low, register updated after CS/LD returns high. LDAC powers DAC. software power down command ignored LDAC low. Exposed (Pin 11): Ground. Must soldered ground.
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LTC2601/LTC2611/LTC2621 BLOCK DIAGRAM
32-BIT SHIFT REGISTER
INPUT REGISTER
REGISTER
12-/14-/16-BIT
VOUT
CS/LD CONTROL DECODE LOGIC LDAC
2601
TIMING DIAGRAMS
CS/LD LDAC
2601 F01a
Figure
CS/LD LDAC
2601 F01b
Figure
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LTC2601/LTC2611/LTC2621 OPERATION
Power-On Reset LTC2601/LTC2611/LTC2621 clear outputs zero scale when power first applied, making system initialization consistent repeatable. LTC2601-1/LTC26111/LTC2621-1 voltage outputs midscale when power first applied. some applications, downstream circuits active during power-up, sensitive nonzero outputs from during this time. LTC2601/ LTC2611/LTC2621 contain circuitry reduce poweron glitch; furthermore, glitch amplitude made arbitrarily small reducing ramp rate power supply. example, power supply ramped 1ms, analog outputs rise less than 10mV above ground (typ) during power-on. Power-On Reset Glitch Typical Performance Characteristics section. Power Supply Sequencing voltage (Pin should kept within range -0.3V VREF 0.3V (see Absolute Maximum Ratings). Particular care should taken observe these limits during power supply turn-on turn-off sequences, when voltage (Pin transition. Transfer Function digital-to-analog transfer function VOUT(IDEAL) VREF where decimal equivalent binary input code, resolution VREF voltage (Pin Serial Interface CS/LD input level triggered. When this input taken low, acts chip-select signal, powering-on buffers enabling input shift register. Data (SDI input) transferred next rising edges. 4-bit command, C3-C0, loaded first; then don't care bits; finally 16-bit data word. data word comprises 16-, 12-bit input code, ordered MSB-to-LSB, followed don't care bits (LTC2601, LTC2611 LTC2621 respectively). Data only transferred device when CS/LD signal low.The rising edge CS/LD ends data transfer causes device execute command specified 24-bit input word. complete sequence shown Figure command (C3-C0) assignments shown Table first four commands table consist write update operations. write operation loads 16-bit data word from 32-bit shift register into input register DAC. update operation, data word copied from input register register converted analog voltage output. update operation also powers been power-down mode. data path registers shown Block Diagram. While minimum input word bits, optionally extended bits. 32-bit word width, don't-care bits transferred device first, followed 24-bit word just described. Figure shows 32-bit sequence. 32-bit word required daisychain operation, also available accommodate microprocessors which have minimum word width bits bytes). Daisy-Chain Operation serial output shift register appears pin. Data transferred device from input delayed rising edges before being output next falling edge. output used facilitate control multiple serial devices from single 3-wire serial port (i.e., SCK, CS/LD). Such "daisy chain" series configured connecting each upstream device
Table
COMMAND* Write Input Register Update (Power Register Write Update (Power Power Down Operatio
*Command codes shown reserved should used.
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LTC2601/LTC2611/LTC2621 OPERATION
INPUT WORD (LTC2601)
COMMAND DON'T CARE BITS DATA BITS)
2601 TBL01
INPUT WORD (LTC2611)
COMMAND DON'T CARE BITS DATA BITS DON'T CARE BITS)
2601 TBL02
INPUT WORD (LTC2621)
COMMAND DON'T CARE BITS DATA BITS DON'T CARE BITS)
2601 TBL03
next device chain. shift registers devices thus connected series, effectively forming single input shift register which extends through entire chain. Because this, devices addressed controlled individually simply concatenating their input words; first instruction addresses last device chain forth. CS/LD signals common devices series. use, CS/LD first taken low. Then concatenated input data transferred chain, using first device data input. When data transfer complete, CS/LD taken high, which executes commands specified each devices simultaneously. single device controlled using no-operation command (1111) other devices chain. Power-Down Mode power-constrained applications, power-down mode used reduce supply current whenever output needed. When power-down, buffer amplifier, bias circuit reference input disabled draws essentially zero current. output into high impedance state, output passively pulled ground through resistors. Input- DAC-register contents disturbed during power-down. into power-down mode using
command 0100b. 16-bit data word ignored. supply reference currents reduced almost zero when powered down; effective resistance rises accordingly becoming high impedance input (typically 1G). Normal operation resumed executing command which includes update, shown Table performing asynchronous update (LDAC) described next section. powered voltage output updated. When powered-down state powered updated, normal settling delayed. main bias generation circuit block been automatically shut down addition amplifier reference input power delay time (for (for 3V). Asynchronous Update Using LDAC addition update commands shown Table LDAC asynchronously updates register with contents input register. CS/LD high, LDAC causes register updated with contents input register. CS/LD low, going pulse LDAC before rising edge CS/LD powers does cause output updated. LDAC remains after
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LTC2601/LTC2611/LTC2621 OPERATION
rising edge CS/LD, then LDAC recognized, command specified 24-bit word just transferred executed output updated. powered when LDAC taken low, independent state CS/LD. LDAC time CS/LD goes high, inhibits software power-down command that specified input word. Voltage Outputs rail-to-rail amplifier contained these parts guaranteed load regulation when sourcing sinking 15mA (7.5mA 3V). Load regulation measure amplifier's ability maintain rated voltage accuracy over wide range load conditions. measured change output voltage milliampere forced load current change expressed LSB/mA. output impedance equivalent load regulation, derived from simply calculating change units from LSB/mA Ohms. amplifier's output impedance 0.05 when driving load well away from rails. When drawing load current from either rail, output voltage headroom with respect that rail limited typical channel resistance output devices; e.g., when sinking 1mA, minimum output voltage 25mV. graph Headroom Rails Output Current Typical Performance Characteristics section. amplifier stable driving capacitive loads 1000pF Board Layout excellent load regulation these devices achieved part keeping "signal" "power" grounds separated internally reducing shared internal resistance. functions both node which reference output voltages referred return path power currents device. Because this, careful thought should given grounding scheme board layout order ensure rated performance. board should have separate areas analog digital sections circuit. This keeps digital signals away from sensitive analog signals facilitates separate digital analog ground planes which have minimal capacitive resistive interaction with each other. Digital analog ground planes should joined only point, establishing system star ground close device's ground possible. Ideally, analog ground plane should located component side board, should allowed under part shield from noise. Analog ground should continuous uninterrupted plane, except necessary lead pads vias, with signal traces another layer. part should connected analog ground. Resistance from system star ground should possible. Resistance here will directly effective output impedance device (typically 0.05). Note that LTC2601/ LTC2611/LTC2621 more susceptible these effects than other parts their type; contrary, they allow layout-based performance improvements shine rather than limiting attainable performance with excessive internal resistance. Rail-to-Rail Output Considerations rail-to-rail voltage output device, output limited voltages within supply range. Since analog output device cannot below ground, limit lowest codes shown Figure Similarly, limiting occur near full scale when tied VCC. VREF full-scale error (FSE) positive, output highest codes limits shown Figure full-scale limiting occur VREF less than FSE. Offset linearity defined tested over region transfer function where output limiting occur.
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OPERATION
LTC2601/LTC2611/LTC2621
2601 F02a
CS/LD DATA WORD DON'T CARE BITS
COMMAND WORD
24-BIT INPUT WORD
Figure LTC2601 24-Bit Load Sequence (Minimum Input Word). LTC2611 Data Word: 14-Bit Input Code Don't-Care Bits; LTC2621 Data Word: 12-Bit Input Code Don't-Care Bits
CS/LD DON'T CARE BITS COMMAND WORD DATA WORD
DON'T CARE
PREVIOUS 32-BIT INPUT WORD PREVIOUS PREVIOUS
CURRENT 32-BIT INPUT WORD
2601 F02b
Figure LTC2601 32-Bit Load Sequence (Required Daisy-Chain Operation). LTC2611 SDI/SDO Data Word: 14-Bit Input Code Don't-Care Bits; LTC2621 SDI/SDO Data Word: 12-Bit Input Code Don't-Care Bits
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LTC2601/LTC2611/LTC2621 OPERATION
VREF POSITIVE
VREF OUTPUT VOLTAGE OUTPUT VOLTAGE INPUT CODE
2601
OUTPUT VOLTAGE INPUT CODE
NEGATIVE OFFSET INPUT CODE
Figure Effects Rail-to-Rail Operation Transfer Curve. Overall Transfer Function Effect Negative Offset Codes Near Zero Scale Effect Positive Full-Scale Error Codes Near Full Scale
PACKAGE Package 10-Lead Plastic (3mm 3mm)
(Reference 05-08-1699)
0.115 0.675 ±0.05 0.38 0.10
3.50 ±0.05 1.65 ±0.05 2.15 ±0.05 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 2.38 ±0.05 SIDES) RECOMMENDED SOLDER PITCH DIMENSIONS NOTE: DRAWING MADE JEDEC PACKAGE OUTLINE M0-229 VARIATION (WEED-2). CHECK WEBSITE DATA SHEET CURRENT STATUS VARIATION ASSIGNMENT DRAWING SCALE DIMENSIONS MILLIMETERS DIMENSIONS EXPOSED BOTTOM PACKAGE INCLUDE MOLD FLASH. MOLD FLASH, PRESENT, SHALL EXCEED 0.15mm SIDE EXPOSED SHALL SOLDER PLATED SHADED AREA ONLY REFERENCE LOCATION BOTTOM PACKAGE MARK (SEE NOTE
3.00 ±0.10 SIDES)
1.65 0.10 SIDES)
(DD10) 1103
0.200 0.75 ±0.05 2.38 ±0.10 SIDES)
0.25 0.05 0.50
0.00 0.05
BOTTOM VIEW-EXPOSED
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Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
LTC2601/LTC2611/LTC2621 TYPICAL APPLICATION
Demo Circuit DC777 Schematic. Onboard 20-Bit Measures Performance Parameters
0.1F LDAC VREF LTC2601 VOUT CS/LD VREF FSSET 7.5k 100pF OUTPUT ZSSET 0.1F
LTC2421
2601 TA02
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS LTC1458: 4.5V 5.5V, VOUT 4.096V LTC1458L: 2.7V 5.5V, VOUT 2.5V Programmable Speed/Power, 3.5s/750A, 8s/450A 5V(3V), Power, Deglitched Power, Deglitched, Rail-to-Rail VOUT 2.7V 5.5V, Micropower, Rail-to-Rail Output Micropower Rail-to-Rail Output, 3-Wire Interface Ultralow Power, Rail-to-Rail Output SMBus Interface, Pin-for-Pin Compatible with LTC1669 Micropower Rail-to-Rail Output, 3-Wire Interface Pin-for-Pin Compatible with LTC1663 Precision 16-Bit Settling Step 250A DAC, 2.5V 5.5V Supply Range, Rail-to-Rail Output 300A DAC, 2.5V 5.5V Supply Range, Rail-to-Rail Output 250A DAC, 2.5V 5.5V Supply Range, Rail-to-Rail Output, Serial Interface 250A DAC, 2.7V 5.5V Supply Range, Rail-to-Rail Output, Interface 270A DAC, 2.7V 5.5V Supply Range, Rail-to-Rail Output, Interface LTC1458/LTC1458L Quad 12-Bit Rail-to-Rail Output DACs with Added Functionality LTC1654 Dual 14-Bit Rail-to-Rail VOUT
LTC1655/LTC1655L Single 16-Bit VOUT DACs with Serial Interface SO-8 LTC1657/LTC1657L Parrallel 5V/3V 16-Bit VOUT DACs LTC1660/LTC1665 LTC1661 LTC1662 LTC1663 LTC1664 LTC1669 LTC1821 LTC2600/LTC2610/ LTC2620 LTC2602/LTC2612/ LTC2622 LTC2604/LTC2614/ LTC2624 LTC2605/LTC2615/ LTC2625 LTC2606/LTC2616/ LTC2626 LTC2607/LTC2617/ LTC2627 LTC2609/LTC2619/ LTC2629 Octal 10/8-Bit VOUT DACs 16-Pin Narrow SSOP Dual 10-Bit VOUT 8-Lead MSOP Dual 10-Bit VOUT 8-Lead MSOP Single 10-Bit VOUT SOT-23 Quad 10-Bit VOUT 16-Lead SSOP Single 10-Bit VOUT 5-Lead SOT-23 Parallel 16-Bit Voltage Output Octal 16-Bit/14-Bit/12-Bit VOUT DACs 16-Lead SSOP Dual 16-Bit/14-Bit/12-Bit VOUT DACs 8-Lead MSOP Quad 16-Bit/14-Bit/12-Bit VOUT DACs 16-Lead SSOP Octal 16-Bit/14-Bit/12-Bit VOUT DACs with Interface 16-Bit/14-Bit/12-Bit VOUT DACs with Interface
Dual 16-Bit/14-Bit/12-Bit VOUT DACs 12-Lead with Interface 260A DAC, 2.7V 5.5V Supply Range, Rail-to-Rail Output, Interface Quad 16-Bit/14-Bit/12-Bit VOUT DACs with Interface 250A Range DAC, 2.7V 5.5V Supply Range, Rail-to-Rail Output with Separate VREF Pins Each
2601fb
Linear Technology Corporatio(408) 432-1900 FAX: (408) 434-0507
0409 PRINTED
1630 McCarthy Blvd., Milpitas, 95035-7417
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2004
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