LT®1952/LT1952-1 current mode controllers optimized control forward co
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LT1952/LT1952-1 Single Switch Synchronous Forward Controller DESCRIPTION
LT®1952/LT1952-1 current mode controllers optimized control forward converter topology, using primary MOSFET. LT1952/LT1952-1 provide synchronous rectifier control, resulting extremely high efficiency. programmable Volt-Second clamp provides safeguard transformer reset that prevents saturation. This allows single MOSFET primary side reliably greater than duty cycle high MOSFET, transformer rectifier utilization. devices include soft-start controlled exit from shutdown undervoltage lockout. precision 107mV current limit threshold, independent duty cycle, combines with softstart provide hiccup short-circuit protection. LT1952 optimized micropower bootstrap start-up from high input voltages. LT1952-1 allows start-up from lower input voltages. Programmable slope compensation leading edge blanking allow optimization loop bandwidth with wide range inductors MOSFETs. Each device programmed over 100kHz 500kHz frequency range part synchronized external clock. error amplifier true amp, allowing wide range compensation networks. LT1952/LT1952-1 available small 16-pin SSOP package.
Lare registered trademarks Linear Technology Corporation. other trademarks property their respective owners.
Synchronous Rectifier Control High Efficiency Programmable Volt-Second Clamp Output Power Levels from 500W Current Start-Up (LT1952: 460A; On/Off 14.25V/8.75V) (LT1952-1: 400A; On/Off 7.75V/6.5V) True Soft-Start Stress Short-Circuit Protection Precision 107mV Current Limit Threshold Adjustable Delay Synchronous Timing Accurate Shutdown Threshold with Programmable Hysteresis Programmable Slope Compensation Programmable Leading Edge Blanking Programmable Frequency (100kHz 500kHz) Synchronizable External Clock fOSC Internal 1.23V Reference 2.5V External Reference Current Mode Control Small 16-Pin SSOP Package
APPLICATIONS
Telecommunications Power Supplies Industrial Distributed Power Isolated Isolated DC/DC Converters
TYPICAL APPLICATION
Input, Semi-Regulated Converter
SUPPLY FROM BIAS WINDING
PA0905
PA1494.242
VOUT VOUT
Converter VOUT
VREF 52.3k 340k 100k COMP SS_MAXDC LT1952/ LT1952-1 SD_VSEC ISENSE
Si7450
Si7370
PH4840
0.005 LTC3900 SYNC 220pF
SYNC 0.1F 0.1F
SOUT ROSC
PGND BLANK DELAY 178k
1952 TA01
1952 TA01b
19521fd
LT1952/LT1952-1 ABSOLUTE MAXIMUM RATINGS
(Note
CONFIGURATION
VIEW COMP ROSC SYNC SS_MAXDC VREF SD_VSEC SOUT PGND DELAY ISENSE BLANK
(Note -0.3V SYNC, SS_MAXDC, SD_VSEC, ISENSE, 0.3V COMP BLANK, DELAY -0.3V 3.5V 0.3V ROSC. -50A VREF .-10mA Operating Junction Temperature Range (Notes .-40°C 125°C Storage Temperature Range.-65°C 150°C Lead Temperature (Soldering, sec) 300°C
PACKAGE 16-LEAD PLASTIC SSOP TJMAX 125°C, 110°C/W, 40°C/W
ORDER INFORMATION
LEAD FREE FINISH LT1952EGN#PBF LT1952IGN#PBF LT1952EGN-1#PBF LT1952IGN-1#PBF LEAD BASED FINISH LT1952EGN LT1952IGN LT1952EGN-1 LT1952IGN-1 TAPE REEL LT1952EGN#TRPBF LT1952IGN#TRPBF LT1952EGN-1#TRPBF LT1952IGN-1#TRPBF TAPE REEL LT1952EGN#TR LT1952IGN#TR LT1952EGN-1#TR LT1952IGN-1#TR PART MARKING 1952 1952I 19521 1952I1 PART MARKING 1952 1952I 19521 1952I1 PACKAGE DESCRIPTION 16-Lead Plastic SSOP 16-Lead Plastic SSOP 16-Lead Plastic SSOP 16-Lead Plastic SSOP PACKAGE DESCRIPTION 16-Lead Plastic SSOP 16-Lead Plastic SSOP 16-Lead Plastic SSOP 16-Lead Plastic SSOP TEMPERATURE RANGE -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C TEMPERATURE RANGE -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C
Consult Marketing parts specified with wider operating temperature ranges. more information lead free part marking, http://www.linear.com/leadfree/ more information tape reel specifications,
ELECTRICAL CHARACTERISTICS
PARAMETER
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. COMP open, 1.4V, ROSC 178k, SYNC SS_MAXDC VREF, VREF 0.1F SD_VSEC BLANK 121k, DELAY 121k, ISENSE 15V, SOUT open, unless otherwise specified.
CONDITIONS I(VREF) I(VREF) ISENSE Open SS_MAXDC (Notes SS_MAXDC (Notes SD_VSEC SD_VSEC SD_VSEC Threshold 100mV SD_VSEC SD_VSEC Threshold 100mV
UNITS
19521fd
CONTROLLER
Operational Input Voltage Quiescent Current Start-up Current (LT1952) Start-up Current (LT1952-1) Shutdown Current SD_VSEC Threshold SD_VSEC (ON) Current SD_VSEC (OFF) Current 1.261 1.32 11.7 1.379
LT1952/LT1952-1 ELECTRICAL CHARACTERISTICS
PARAMETER (LT1952) (LT1952) HYSTERESIS (LT1952) (LT1952-1) (LT1952-1) HYSTERESIS (LT1952-1) VREF Output Voltage Line Regulation Load Regulation OSCILLATOR Frequency: fOSC Minimum Programmable fOSC Maximum Programmable fOSC SYNC Input Resistance SYNC Switching Threshold SYNC Frequency/fOSC fOSC Line VROSC ERROR AMPLIFIER Reference Voltage Input Bias Current Open Loop Voltage Gain Unity Gain Bandwidth COMP Source Current COMP Sink Current COMP Current (Disabled) COMP High Level: COMP Active Threshold COMP Level: CURRENT SENSE ISENSE Maximum Threshold ISENSE Input Current (Duty Cycle ISENSE Input Current (Duty Cycle 80%) Threshold Input Current Default Blanking Time Adjustable Blanking Time VBLANK COMP 2.5V, COMP 2.5V, (Note COMP 2.5V, (Note COMP 2.5V, 100mV) COMP 2.5V, RBLANK (Note COMP 2.5V, RBLANK 120k
19521fd
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. COMP open, 1.4V, ROSC 178k, SYNC SS_MAXDC VREF, VREF 0.1F SD_VSEC BLANK 121k, DELAY 121k, ISENSE 15V, SOUT open, unless otherwise specified.
CONDITIONS
14.25 8.75
15.75 9.25 6.75 8.13 6.82
UNITS
3.75
7.75
0.95 2.425
1.25 2.575 0.33
I(VREF) I(VREF) I(VREF) 2.5mA ROSC 178k, SS_MAXDC 1.84V ROSC 365k, ROSC 64.9k, COMP 2.5V, SD_VSEC 2.64V (Note ROSC 178k; 25V, SS_MAXDC 1.84V ROSC voltage 25V, 0.2V COMP Reference Voltage 0.2V COMP (Note COMP 1.6V COMP 1.6V VREF, COMP 1.6V I(COMP) -250A SOUT Duty Cycle I(COMP) 250A
1.25 0.05
1.201
1.226 0.15
1.250 -200
-100
LT1952/LT1952-1 ELECTRICAL CHARACTERISTICS
PARAMETER SOUT DRIVER SOUT Clamp Voltage SOUT Level SOUT High Level SOUT Active Pull-Off Shutdown SOUT (Rise) DELAY (tDELAY) VDELAY DRIVER Rise Time Fall Time Clamp Voltage Level High Level (Notes (Notes I(GATE) COMP 2.5V, I(GATE) 20mA I(GATE) 200mA I(GATE) -20mA, 12V, COMP 2.5V, I(GATE) -200mA, 12V, COMP 2.5V, SD_VSEC COMP 2.5V, RDELAY (fOSC 200kHz), SD_VSEC 1.4V, SS_MAXDC VREF COMP 2.5V, RDELAY (fOSC 200kHz), SD_VSEC 1.32V, SS_MAXDC 1.84V SD_VSEC 2.64V, SS_MAXDC 1.84V I(SS_MAXDC) 150A, Measured SS_MAXDC SS_MAXDC SD_VSEC 1.4V, 11.5 0.45 1.25 9.75 14.5 0.75 I(GATE) COMP 2.5V, I(GATE) 25mA I(GATE) -25mA, 12V, COMP 2.5V, SD_VSEC SOUT COMP 2.5V, (Note RDELAY 120k 10.5 13.5 0.75
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. COMP open, 1.4V, ROSC 178k, SYNC SS_MAXDC VREF, VREF 0.1F SD_VSEC BLANK 121k, DELAY 121k, ISENSE 15V, SOUT open, unless otherwise specified.
CONDITIONS UNITS
Active Pull-Off Shutdown Duty Cycle
Duty Cycle Clamp
63.5
0.45
80.5
SOFT-START SS_MAXDC Level: SS_MAXDC Soft-Start Reset Threshold SS_MAXDC Active Threshold SS_MAXDC Input Current (Soft-Start Pull-Down: Idis)
Note Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. Exposure Absolute Maximum Rating condition extended periods affect device reliability lifetime. Note LT1952EGN/LT1952EGN-1 guaranteed meet performance specifications from 125°C junction temperature. Specifications over -40°C 125°C operating junction temperature range assured design, characterization correlation with statistical process controls. LT1952IGN/LT1952IGN-1 guaranteed over full -40°C 125°C operating junction temperature range. Note Rise Fall times measured levels. Note Guaranteed correlation static test.
Note Each includes over-temperature protection that intended protect device during momentary overload conditions. Junction temperature will exceed 125°C when over-temperature protection active. Continuous operation above specified maximum operating junction temperature impair device reliability. Note Guaranteed tested. Note Maximum recommended SYNC frequency 500kHz. Note applications where supplied external network from SYSTEM 25V, external zener with clamp voltage ON(MAX) should connected from ground. Note start-up current measured 0.25V scaled 1.18 correlate worst case start-up current ON). Note Timing derived from measurement with 240k.
19521fd
LT1952/LT1952-1 TYPICAL PERFORMANCE CHARACTERISTICS
Voltage Temperature
1.25 SHUTDOWN CURRENT
Switching Frequency Temperature
Shutdown Current Temperature
SD_VSEC
1.24 VOLTAGE
1.23
1.22
1.21
1.20
SWITCHING FREQUENCY (kHz)
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1952
1952
1952
Start-up Current Temperature
STARTUP CURRENT (mA) TEMPERATURE (°C) LT1952-1 LT1952 SD_VSEC 1.4V
Temperature
OPEN SD_VSEC TURN THRESHOLD 1.42
SD_VSEC Turn Threshold Temperature
1.37
1.32
1.27
TEMPERATURE (°C)
1.22
TEMPERATURE (°C)
1952
1952
1952
SD_VSEC Current Temperature
CURRENT BEFORE PART TURN
Turn ON/OFF Voltage Temperature
LT1952 TURN VOLTAGE COMP LT1952 TURN VOLTAGE
COMP Active Threshold Temperature
RISENSE
SD_VSEC CURRENT
LT1952-1 LT1952-1
CURRENT AFTER PART TURN TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1952
1952
1952
19521fd
LT1952/LT1952-1 TYPICAL PERFORMANCE CHARACTERISTICS
COMP Source Current Temperature
12.5 COMP SOURCE CURRENT (mA) (-1) COMP 1.6V COMP SINK CURRENT (mA) 12.5
COMP Sink Current Temperature
1.4V COMP 1.6V COMP CURRENT
(Disabled) COMP Current Temperature
VREF COMP 1.6V
10.0
10.0
CURRENT
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1952
1952
1952
ISENSE Maximum Threshold COMP
25°C RISENSE ISENSE THRESHOLD (mV)
ISENSE Maximum Threshold Temperature
COMP 2.5V RISENSE ISENSE CURRENT
ISENSE Current (Out Pin) Duty Cycle
25°C
ISENSE THRESHOLD (mV)
THRESHOLD
COMP
1952
TEMPERATURE (°C)
DUTY CYCLE
1952
1952
ISENSE Maximum Threshold Duty Cycle (Programming Slope Compensation)
RSLOPE
(Overcurrent) Threshold Temperature
PRECISION OVERCURRENT THRESHOLD INDEPENDENT DUTY CYCLE BLANK DURATION (ns)
Blank Duration Temperature
ISENSE THRESHOLD (mV)
RSLOPE 470W
THRESHOLD (mV)
RBLANK 120k
25°C COMP 2.5V RSLOPE
RBLANK
DUTY CYCLE
1952
TEMPERATURE (°C)
TEMPERATURE (°C)
1952
1952
19521fd
LT1952/LT1952-1 TYPICAL PERFORMANCE CHARACTERISTICS
BLANK Duration RBLANK
1000 25°C
tDELAY: SOUT Rise Rise Temperature
tDELAY: SOUT Rise Rise RDELAY
25°C
RDELAY 120k tDELAY (ns) RDELAY tDELAY (ns)
BLANK (ns)
RBLANK
1952
TEMPERATURE (°C)
RDELAY
1952
1952
Rise/Fall Time Load Capacitance
25°C
OUT: Duty Cycle fOSC
DUTY CYCLE CLAMP
OUT: Duty Cycle CLAMP SD_VSEC
RISE/FALL TIME (ns)
DUTY CYCLE
25°C SS_MAXDC 2.5V SD_VSEC 1.4V fOSC (kHz)
1952
2000 1000 3000 4000 LOAD CAPACITANCE (pF)
5000
1952
1.32
25°C SS_MAXDC 1.84V fOSC 200kHz RDELAY 1.65 1.98 SD_VSEC 2.31 2.64
1952
OUT: Duty Cycle CLAMP SS_MAXDC
DUTY CYCLE CLAMP 25°C fOSC 200kHz DELAY 1.60 SD_VSEC 2.64V SD_VSEC 1.98V SS_MAXDC 2.32
SS_MAXDC Setting fOSC (for 72%)
25°C SD_VSEC 1.32V 2.20 RDELAY SS_MAXDC (mV) 2.08 1.96 1.84 1.72 1.60
1952
SS_MAXDC Reset Active Thresholds Temperature
ACTIVE THRESHOLD
SD_VSEC 1.32V
RESET THRESHOLD
1.84 SS_MAXDC
2.08
fOSC (kHz)
1952
TEMPERATURE (°C)
1952
19521fd
LT1952/LT1952-1 FUNCTIONS
COMP (Pin Output Error Amplifier. error amplifier amp, allowing various compensation networks connected between COMP optimum transient response. voltage this corresponds peak current external FET. Full operating voltage range between 0.8V 2.5V corresponding 220mV ISENSE pin. applications using 100mV overcurrent detection, typical operating range COMP 0.8V 1.6V. isolated applications where COMP controlled opto-coupler, COMP output drive disabled with VREF, reducing COMP current (COMP 0.7)/40k. (Pin Monitors output voltage external resistor divider compared with internal 1.23V reference error amplifier. connected VREF disables error amplifier output. ROSC (Pin resistor ground programs operating frequency between 100kHz 500kHz. Nominal voltage ROSC 1.0V. SYNC (Pin Used Synchronize Internal Oscillator External Signal. directly logic compatible driven with signal between duty cycle. unused, left open connected ground. SS_MAXDC (Pin External resistor divider from VREF sets maximum duty cycle clamp (SS_MAXDC 1.84V, SD_VSEC 1.32V gives duty cycle). Capacitor SS_MAXDC combination with external resistor divider sets soft-start timing. VREF (Pin output internal 2.5V reference which supplies control circuitry Capable sourcing 2.5mA drive external use. Bypass ground with 0.1F ceramic capacitor. SD_VSEC (Pin SD_VSEC pin, when pulled below accurate 1.32V threshold, used turn reduce current drain from VIN. SD_VSEC connected system input voltage through resistor divider define undervoltage lockout (UVLO) provide Volt-Second clamp pin. current hysteresis allows external programming UVLO hysteresis. (Pin Analog Ground. BLANK (Pin resistor ground adjusts extended blanking period overcurrent current sense amplifier outputs during turn on-to prevent false current limit trip. Increasing resistor value increases blanking period. ISENSE (Pin 10): Current Sense Input Control Loop. Connect this sense resistor source external power MOSFET. resistor series with ISENSE programs slope compensation. (Pin 11): accurate 107mV threshold, independent duty cycle, overcurrent detection trigger soft-start. Connect this directly sense resistor source external power MOSFET. DELAY (Pin 12): resistor ground adjusts delay period between SOUT rising edge rising edge. Used maximize efficiency forward converter applications adjusting control timing secondary side synchronous rectifier MOSFETs. Increasing resistor value increases delay period. PGND (Pin 13): Power Ground. (Pin 14): Drives Gate N-channel MOSFET between with maximum limit internal clamp. Active pull-off exists shutdown (see electrical specification). (Pin 15): Input Supply Part. must closely decoupled ground. internal undervoltage lockout threshold exists approximately 14.25V 8.75V LT1952. LT1952-1 lower undervoltage lockout thresholds 7.75V 6.5V off. SOUT (Pin 16): Switched Output Phase with Pin. Provides sync signal control secondary side FETs forward converter applications requiring highly efficient synchronous rectification. SOUT actively clamped 12V. Active pull-off exists shutdown (see electrical specification).
19521fd
LT1952/LT1952-1 TIMING DIAGRAM
tDELAY: PROGRAMMABLE SYNCHRONOUS DELAY SOUT
SS_MAXDC FAULTS TRIGGERING SOFT-START 8.75V SD_VSEC 1.32V (UVLO) 107mV (OVERCURRENT) SOFT-START LATCH 0.8V (ACTIVE THRESHOLD) 0.45V (RESET THRESHOLD) 0.2V SOFT-START LATCH RESET: 14.25V 8.75V LATCH SD_VSEC 1.32V 107mV SS_MAXDC 0.45V 1952
Figure Timing Diagram
BLOCK DIAGRAM
LT1952 ISTART 460A 14.25V 8.75V LT1952-1 ISTART 400A 7.75V 6.5V VINON VINOFF START-UP INPUT CURRENT (ISTART) 0.45V VREF SS_MAXDC
SOFT-START CONTROL
VREF >90%
2.5V SOURCE 2.5mA
1.23V ADAPTIVE MAXIMUM DUTY CYCLE CLAMP
50mA SOUT
(TYPICAL 200kHz) SD_VSEC ROSC 1.32V (100 500)kHz RAMP SYNC (VOLTAGE) ERROR AMPLIFIER 1.23V BLANK SENSE CURRENT OVER CURRENT (LINEAR) SLOPE COMP PGND DELAY DRIVER
220mV
107mV
COMP
DELAY BLANK
Figure Block Diagram
19521fd
ISENSE
1952
IHYST SD_VSEC 1.32V SD_VSEC 1.32V
LT1952/LT1952-1 OPERATION
Introduction LT1952/LT1952-1 current mode synchronous controllers optimized control simplest forward converter topology-using only primary MOSFET. LT1952/LT1952-1 ideal 500W power systems where very high efficiency reliability, complexity cost required small space. features LT1952/LT1952-1 include adaptive maximum duty cycle clamp single primary MOSFET. additional output signal included synchronous rectifier control. precision 107mV threshold senses overcurrent conditions triggers Soft-Start stress short-circuit protection control. functions LT1952/LT1952-1 shown Block Diagram Figure Part Start-up normal operation SD_VSEC must exceed 1.32V must exceed 14.25V (7.75V LT1952-1) allow part turn This combination voltages allows 2.5V VREF become active, supplying LT1952/LT1952-1 control circuitry providing 2.5mA external drive. SD_VSEC threshold used externally programming undervoltage lockout (UVLO) threshold system input voltage. Hysteresis UVLO threshold also programmed since SD_VSEC draws just before part turn after part turn With LT1952/LT1952-1 turned drop 8.75V (6.5V LT1952-1) before part shutdown occurs. This hysteresis (5.5V LT1952; 1.25V LT1952-1) combined with 460A (400A LT1952-1) start-up input current allows power start-up using resistor/capacitor network from system supply (Figure capacitor value chosen prevent falling below turn threshold before auxiliary winding converter takes over supply pin. Output Drivers LT1952/LT1952-1 have outputs, SOUT OUT. provides peak MOSFET gate drive clamped 13V. SOUT ±50mA peak drive clamped provides sync signal timing synchronous rectification control. SOUT turn latch start each main oscillator cycle. turn delayed from SOUT turn time tDELAY (Figure tDELAY programmed using resistor from DELAY ground used timing control secondary synchronous rectifiers optimum efficiency. SOUT turn same time each cycle three methods: MOSFET peak current sense ISENSE Adaptive maximum duty cycle clamp reached during load/line transients Maximum duty cycle reset latch During following conditions-low SD_VSEC overcurrent detection pin-a softstart event latched both SOUT turn immediately (Figure Leading Edge Blanking prevent MOSFET switching noise causing premature turn SOUT OUT, programmable leading edge blanking exists. This means both current sense comparator overcurrent comparator outputs ignored during MOSFET turn extended period after leading edge (Figure extended blanking period programmable adjusting resistor from BLANK ground. Adaptive Maximum Duty Cycle Clamp (Volt-Second Clamp) forward converter applications using simplest topology single MOSFET primary, maximum switch duty cycle clamp which adapts transformer input voltage necessary reliable control MOSFET. This volt-second clamp provides safeguard transformer reset that prevents transformer saturation. Instantaneous load changes cause converter loop demand maximum duty cycle. maximum duty cycle switch great, transformer reset voltage exceed voltage rating primary-side MOSFET with
19521fd
LT1952/LT1952-1 OPERATION
catastrophic damage. Many converters solve this problem limiting operational duty cycle MOSFET less-or using fixed (non-adaptive) maximum duty cycle clamp with very large voltage rated MOSFETs. LT1952/LT1952-1 provide volt-second clamp allow MOSFET duty cycles well above 50%. This gives greater power utilization MOSFET, rectifiers transformer resulting less space given power output. addition, volt-second clamp allows reduced voltage rating MOSFET resulting lower RDSON greater efficiency. volt-second clamp defines maximum duty cycle `guard rail' which falls when system input voltage increases. LT1952/LT1952-1 SD_VSEC SS_MAXDC pins provide capacitorless, programmable volt-second clamp solution. Some controllers with volt-second clamps control switch maximum duty cycle using external capacitor program maximum switch time. Such techniques have volt-second clamp inaccuracy directly related error external capacitor/pin capacitance error/drift internal oscillator. LT1952/LT19521 simple resistor ratios implement volt-second clamp without need accurate external capacitor with order magnitude less dependency oscillator error. increase voltage SD_VSEC causes maximum duty cycle clamp decrease. SD_VSEC resistively divided down from transformer input voltage, volt-second clamp realised. adjust initial maximum duty cycle clamp, SS_MAXDC voltage programmed resistor divider from 2.5V VREF ground. increase programmed voltage SS_MAXDC provides increase switch maximum duty cycle clamp. Soft-Start LT1952/LT1952-1 provide true soft-start using SS_MAXDC control soft-start timing. proportional relationship between SS_MAXDC voltage switch maximum duty cycle clamp allows SS_MAXDC slowly ramp output voltage ramping maximum switch duty cycle clamp-until switch duty cycle clamp seamlessly meets natural duty cycle converter. soft-start event triggered whenever low, SD_VSEC (UVLO), 107mV overcurrent threshold exceeded. Whenever soft-start event triggered, switching SOUT stopped immediately. SS_MAXDC discharged only released charging when fallen below it's reset threshold 0.45V faults have been removed. Increasing voltage SS_MAXDC above 0.8V will increase switch maximum duty cycle. capacitor ground SS_MAXDC combination with resistor divider from VREF defines soft-start timing. Current Mode Topology (ISENSE Pin) LT1952/LT1952-1 current mode topology eases frequency compensation requirements because output inductor does contribute phase delay regulator loop. This current mode technique means that error amplifier (nonisolated applications) optocoupler (isolated applications) commands current (rather than voltage) delivered output. This makes frequency compensation easier provides faster loop response output load transients. resistor divider from application's output voltage generates voltage inverting input LT1952/ LT1952-1 error amplifier input external optocoupler) compared accurate reference (1.23V LT1952/LT1952-1). error amplifier output (COMP) defines input threshold (ISENSE) current sense comparator. COMP voltages between 0.8V (active threshold) 2.5V define maximum ISENSE threshold from 220mV. connecting ISENSE sense resistor series with source external power MOSFET, MOSFET peak current trip point (turn off) controlled COMP level hence output voltage. increase output load current causing output voltage fall, will cause COMP rise, increasing ISENSE threshold, increasing current delivered output. isolated applications, error amplifier COMP output disabled allow optocoupler take control. Setting VREF disables error amplifier COMP output, reducing current (COMP 0.7)/40k.
19521fd
LT1952/LT1952-1 OPERATION
Slope Compensation current mode architecture requires slope compensation added current sensing loop prevent subharmonic oscillations which occur duty cycles above 50%. Unlike most current mode converters which have slope compensation ramp that fixed internally, placing constraint inductor value operating frequency, LT1952/LT1952-1 have externally adjustable slope compensation. Slope compensation programmed inserting external resistor (RSLOPE) series with ISENSE pin. LT1952/LT1952-1 have linear slope compensation ramp which sources current ISENSE approximately duty cycle duty cycle. Overcurrent Detection Soft-Start Pin) added feature LT1952/LT1952-1 precise 100mV sense threshold used detect overcurrent conditions converter soft-start latch. connected directly source primary side MOSFET monitor peak current MOSFET (Figure 107mV threshold constant over entire duty cycle range converter because unaffected slope compensation added ISENSE pin. Synchronizing SYNC allows LT1952/LT1952-1 oscillator synchronized external clock. SYNC driven from logic level output, requiring less than 0.8V logic level greater than 2.2V logic level high. Duty cycle should between 90%. avoid loss slope compensation during synchronization, free running oscillator frequency (fOSC) should programmed external clock frequency (fSYNC). RSLOPE resistor chosen non-synchronized operation should increased 1.25x fSYNC/fOSC).
APPLICATIONS INFORMATION
Shutdown Programming Undervoltage Lockout LT1952/LT1952-1 have accurate 1.32V shutdown threshold SD_VSEC pin. This threshold used conjunction with resistor divider define undervoltage lockout threshold (UVLO) system input voltage (VS) power converter (Figure current hysteresis (10A before part turn after part turn allows UVLO hysteresis programmed. Calculation ON/OFF thresholds supply (SVIN) power converter made follows: Threshold 1.32[1 (R1/R2)] Threshold SVIN (10A simple open drain transistor added resistor divider network SD_VSEC control turn LT1952/LT1952-1 (Figure SD_VSEC must left open since there must external source current >10A lift past 1.32V threshold part turn
SYSTEM INPUT (VS) SD_VSEC OPTIONAL SHUTDOWN TRANSISTOR 1.32V
LT1952/LT1952-1
1952
Figure Programming Undervoltage Lockout (UVLO)
Micropower Start-Up: Selection Start-Up Resistor Capacitor LT1952/LT1952-1 turn-on voltage hysteresis start-up current allow micro-power start-up (Figure LT1952/LT1952-1 monitor voltage allow part turn 14.25V (7.75V LT1952-1) part turn 8.75V (6.5V LT1952-1). start-up
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
current (460A LT1952; 400A LT1952-1) allows large resistor connected between system input supply Once part turned input current increases drive (4.5mA) output drivers (IDRIVE). large enough capacitor chosen prevent falling below turn threshold before auxiliary winding converter takes over supply This technique allows simple resistor/capacitor start-up which draws power from system supply converter. values RSTART CSTART given RSTART(MAX) (VS(MIN) ON(max))/ISTART(MAX) CSTART(MIN) (IQ(MAX) IDRIVE(MAX)) tSTART/ HYST(MIN) Example: (LT1952) VS(MIN) 36V, ON(MAX) 15.75V, ISTART(MAX) 700A, IQ(MAX) 5.5mA, IDRIVE(MAX) 5mA, HYST(MIN) 3.75V tSTART 100s, RSTART 15.75)/700A 28.9k (choose 28.7k)
FREQUENCY (kHz)
possibly exceeding rating pin. zener voltage should obey ON(MAX) 25V. Programming Oscillator Frequency oscillator frequency (fOSC) LT1952/LT1952-1 programmed using external resistor (ROSC) connected between ROSC ground. Figure shows typical fOSC ROSC resistor values. LT1952/LT1952-1 freerunning oscillator frequency programmable range 100kHz 500kHz. Stray capacitance potential noise pickup ROSC should minimized placing ROSC resistor close possible ROSC keeping area ROSC node small possible. ground side ROSC resistor should returned directly (analog ground) pin. ROSC calculated ROSC 9.125k [(4100k/fOSC)
ROSC
CSTART (5.5mA 5mA) 100s/3.75V 0.28F (typically choose system input voltages exceeding absolute maximum rating LT1952/LT1952-1 pin, external zener should connected from ground. This covers condition where charges past part does turn because SD_VSEC 1.32V. this condition will continue charge towards system
SYSTEM INPUT (VS) FROM AUXILIARY WINDING RSTART (14.25V 8.75V OFF) LT1952 (7.75V 6.5V OFF) LT1952-1
1952
Figure Oscillator Frequency (fOSC) ROSC
Programming Leading Edge Blank Time controllers driving external MOSFETs, noise generated source MOSFET during gate rise time some time thereafter. This noise potentially exceed ISENSE thresholds LT1952/LT1952-1 cause premature turn SOUT addition false trigger soft-start. LT1952/ LT1952-1 provide programmable leading edge blanking ISENSE comparator outputs avoid false current sensing during MOSFET switching.
19521fd
1.32V CSTART
*FOR 25V, ZENER RECOMMENDED (VIN ON(MAX) 25V) 1952
Figure Power Start-Up
LT1952/LT1952-1 APPLICATIONS INFORMATION
Blanking provided phases (Figure first phase automatically blanks during gate rise time. Gate rise times vary depending MOSFET type. this reason LT1952/LT1952-1 perform true `leading edge blanking' automatically blanking ISENSE comparator outputs until rises within 0.5V reaches clamp level 13V. second phase blanking starts after leading edge been completed. This phase programmable user with resistor connected from BLANK ground. Typical durations this portion blanking period from 45ns RBLANK 540ns RBLANK 120k. Blanking duration approximated Blanking (extended) [45(RBLANK/10k)]ns (see graph Typical Performance Characteristics)
(AUTOMATIC) LEADING EDGE BLANKING (PROGRAMMABLE) EXTENDED BLANKING CURRENT SENSE DELAY
MOSFET. current limit converter programmed Current limit (107mV/RS)(NP/NS) (1/2)(IRIPPLE) where: sense resistor source primary MOSFET IRIPPLE ripple current output inductor number transformer secondary turns number transformer primary turns Programming Slope Compensation LT1952/LT1952-1 current mode architecture provide fast response load transients ease frequency compensation requirements. Current mode switching regulators which operate with duty cycles above have continuous inductor current must slope compensation their current sensing loop prevent subharmonic oscillations. (For more information slope compensation, Application Note 19.) LT1952/ LT1952-1 have programmable slope compensation allow wide range inductor values, reduce susceptibility generated noise optimize loop bandwidth. LT1952/LT1952-1 program slope compensation inserting resistor RSLOPE series with ISENSE (Figure LT1952/LT1952-1 generate current ISENSE which linear from duty cycle maximum duty cycle pin. simple calculation I(ISENSE) RSLOPE gives added ramp voltage ISENSE programmable slope compensation. (See both graphs `ISENSE Current Duty Cycle' `ISENSE Maximum Threshold Duty Cycle' Typical Performance Characteristics section.)
CURRENT SLOPE LT1952/ LT1952-1 ISENSE
1952
RBLANK
(MIN)
RBLANK
240k
100ns
BLANKING
45ns
45(RBLANK/10k)]ns
1952
Figure Leading Edge Blank Timing
Programming Current Limit Pin) LT1952/LT1952-1 precise 107mV sense threshold detect overcurrent conditions converter soft-start latch. independent duty cycle because affected slope compensation programmed ISENSE pin. monitors peak current primary MOSFET sensing voltage across sense resistor (RS) source
RSLOPE
V(ISENSE) (ISENSE RSLOPE) ISENSE 35DC DUTY CYCLE SYNC OPERATION ISENSE(SYNC) 35DC)A fOSC/fSYNC
Figure Programming Slope Compensation
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
Programming Synchronous Rectifier Timing: SOUT delay (`tDELAY') LT1952/LT1952-1 have additional output SOUT which provides ±50mA peak drive clamped 12V. applications requiring synchronous rectification high efficiency, LT1952/LT1952-1 SOUT provides sync signal secondary side control synchronous rectifier MOSFETs (Figure 11). Timing delays through converter cause non-optimum control timing synchronous rectifier MOSFETs. LT1952/LT1952-1 provide programmable delay (tDELAY Figure between SOUT rising edge rising edge optimize timing control synchronous rectifier MOSFETs achieve maximum efficiency gains. resistor RDELAY connected from DELAY ground sets value tDELAY. Typical values tDELAY range from 10ns with RDELAY 160ns with RDELAY 160k. (see graph Typical Performance Characteristics)
tDELAY LT1952/ LT1952-1 DELAY
1952
SS_MAXDC using resistor divider from VREF increase voltage SS_MAXDC causes maximum duty cycle clamp increase. program volt-second clamp, following steps should taken: (1)The maximum operational duty cycle converter should calculated given application. (2)An initial value maximum duty cycle clamp should calculated using equation below with first pass guess SS_MAXDC. Note: Since maximum operational duty cycle occurs minimum system input voltage (UVLO), voltage SD_VSEC 1.32V. Duty Cycle Clamp (OUT pin) 0.522(SS_MAXDC(DC)/SD_VSEC) (tDELAY fOSC) where, SS_MAXDC(DC) VREF(RB /(RT SD_VSEC 1.32V minimum system input voltage
SOUT
RDELAY
tDELAY programmed delay between SOUT 1.11 5.5e-7 (fOSC) maximum duty cycle clamp calculated should programmed greater than maximum operational duty cycle calculated (1). Simple adjustment maximum duty cycle achieved adjusting SS_MAXDC.
SYSTEM INPUT VOLTAGE ADAPTIVE DUTY CYCLE CLAMP INPUT VREF
1952
Figure Programming SOUT Delay: tDELAY
Programming Maximum Duty Cycle Clamp forward converter applications using simplest topology single MOSFET primary, maximum switch duty cycle clamp which adapts transformer input voltage necessary reliable control MOSFET. This volt-second clamp provides safeguard transformer reset that prevents transformer saturation. LT1952/LT1952-1 SD_VSEC SS_MAXDC pins provide capacitor-less, programmable volt-second clamp solution using simple resistor ratios (Figure increase voltage SD_VSEC causes maximum duty cycle clamp decrease. Deriving SD_VSEC from resistor divider connected system input voltage creates volt-second clamp. maximum duty cycle clamp adjusted programming voltage
LT1952/ LT1952-1 SD_VSEC SS_MAXDC
DUTY CYCLE CLAMP ADJUST INPUT *MINIMUM ALLOWABLE GUARANTEE SOFT-START PULL-OFF
Figure Programming Maximum Duty Cycle Clamp
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
Example calculation 35.7k, 100k, VREF 2.5V, RDELAY 40k, fOSC 200kHz SD_VSEC 1.32V, this gives SS_MAXDC(DC) 1.84V, tDELAY 40ns Maximum Duty Cycle Clamp 0.522(1.84/1.32) (40ns 200kHz) 0.728 0.008 0.72 (Duty Cycle Clamp 72%) Note achieve same maximum duty cycle clamp 100kHz calculated 200kHz, SS_MAXDC voltage should reprogrammed SS_MAXDC(DC) (100kHz) SS_MAXDC(DC) (200kHz) (200kHz)/k (100kHz) 1.84 1.0/1.055 1.74V 1.055 100kHz) Note achieve same maximum duty cycle clamp while synchronizing external clock SYNC pin, SS_MAXDC voltage should re-programmed SS_MAXDC (DC) (fsync) SS_MAXDC (DC) (200kHz) [(fosc/fsync) 0.09(fosc/200kHz)0.6] SS_MAXDC (DC) (200kHz) 1.84V duty cycle SS_MAXDC (DC) (fsync 250kHz) duty cycle 1.84 [(200kHz/250kHz) 0.09(1)0.6] 1.638V Programming Soft-Start Timing LT1952/LT1952-1 have built-in soft-start capability provide stress controlled start-up from list fault conditions that occur application (see Figure Figure 10). LT1952/LT1952-1 provide true soft-start using SS_MAXDC control soft-start timing. proportional relationship between SS_MAXDC voltage switch maximum duty cycle clamp allows SS_MAXDC slowly ramp output voltage ramping maximum switch duty cycle clamp-until switch duty cycle clamp seamlessly meets natural duty cycle converter. capacitor SS_MAXDC resistor divider from VREF used program maximum switch duty cycle clamp, determine soft-start timing (Figure 11). soft-start event triggered following faults: 8.75V, SD_VSEC 1.32V (UVLO), 107mV (overcurrent condition) When soft-start event triggered, switching SOUT stopped immediately. soft-start latch SS_MAXDC discharged. SS_MAXDC only recharge when soft-start latch been reset. Note: soft-start event caused above, also causes VREF disabled fall ground. Soft-start latch reset requires following:
SS_MAXDC
SOFT-START SOFT-START EVENT TRIGGERED
0.8V (ACTIVE THRESHOLD) 0.45V (RESET THRESHOLD) TIMING (A): SOFT START FAULT REMOVED START FAULT REMOVED BEFORE SS_MAXDC FALLS 0.45V
SS_MAXDC
0.8V (ACTIVE THRESHOLD) 0.45V (RESET THRESHOLD) 0.2V TIMING (B): SOFT-STARTFAULT REMOVED SOFT-START FAULT REMOVED AFTER SS_MAXDC FALLS PAST 0.45V PAST 0.45V
1952
Figure Soft-Start Timing
SS_MAXDC(DC) LT1952/ LT1952-1 SS_MAXDC VREF
1952
RCHARGE
LT1952/ LT1952-1 SS_MAXDC
SS_MAXDC CHARGING MODEL SS_MAXDC(DC) VREF [RB/(RT RB)] RCHARGE RB/(RT RB)]
Figure Programming Soft-Start Timing
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
14.25* (7.75V LT1952-1), SD_VSEC 1.32V, 107mV, SS_MAXDC 0.45V (SS_MAXDC reset threshold) *VIN 8.75V (6.5V LT1952-1) latch reset latch only overcurrent condition above. SS_MAXDC Discharge Timing seen Figure that types discharge occur SS_MAXDC pin. timing fault that caused soft-start event been removed before SS_MAXDC falls 0.45V. This means soft-start latch will reset when SS_MAXDC falls 0.45V SS_MAXDC will begin charging. timing (B), fault that caused soft-start event removed until some time after SS_MAXDC fallen past 0.45V. SS_MAXDC continues discharge 0.2V remains until faults removed. time SS_MAXDC fall given voltage approximated SS_MAXDC (tFALL) (CSS/IDIS) [SS_MAXDC(DC) VSS(MIN)] where: IDIS discharge current capacitor value SS_MAXDC SS_MAXDC(DC) programmed voltage VSS(MIN) minimum SS_MAXDC voltage before recharge IDIS 8e-4 (VREF VSS(MIN))[(1/2RB) (1/RT)] faults arising from (2), VREF 100mV. fault arising from (3), VREF 2.5V. SS_MAXDC(DC) VREF[RB/(RT RB)] VSS(MIN) SS_MAXDC reset threshold 0.45V fault removed before tFALL)
19521fd
Example: overcurrent fault 100mV), VREF 2.5V, 35.7k, 100k, 0.1F assume VSS(MIN) 0.45V, IDIS 8e-4 (2.5 0.45)[(1/2 100k) (1/35.7k)] 8e-4 (2.05)(-0.23e-4) 7.5e-4 SS_MAXDC(DC) 1.84V SS_MAXDC (tFALL) 7/7.5e-4) (1.84 0.45) 1.85e-4 fault removed before 185s then SS_MAXDC will continue fall past 0.45V towards VSS(MIN). typical SS_MAXDC 150A 0.2V. SS_MAXDC Charge Timing When faults removed SS_MAXDC fallen reset threshold 0.45V lower, SS_MAXDC will released allowed charge. SS_MAXDC will rise until settles programmed voltage-setting maximum switch duty cycle clamp. calculation charging time SS_MAXDC between voltage levels approximated charging waveform using model shown Figure ability predict SS_MAXDC rise time between voltages allows prediction several timing periods: (1)No Switching Period (time from SS_MAXDC(DC) VSS(MIN) time from VSS(MIN) VSS(ACTIVE)) (2)Converter Output Rise Time (time from VSS(ACTIVE) VSS(REG); VSS(REG) level SS_MAXDC where maximum duty cycle clamp equals natural duty cycle switch) (3)Time Maximum Duty Cycle Clamp within Target Value time SS_MAXDC charge given voltage found re-arranging:
LT1952/LT1952-1 APPLICATIONS INFORMATION
VSS(t) SS_MAXDC(DC) e(-t/RC)) give: (-1) ln(1 VSS/SS_MAXDC(DC)) where: SS_MAXDC voltage time SS_MAXDC(DC) programmed voltage setting maximum duty cycle clamp VREF(RB /(RT RCHARGE (Figure /(RT (Figure Example Switching Period period switching converter, when soft-start event occurred, depends SS_MAXDC fall before recharging occurs long fault exists. will assumed that fault triggering soft-start removed before SS_MAXDC reach reset threshold (0.45V). Switching Period tDISCHARGE tCHARGE tDISCHARGE discharge time from SS_MAXDC(DC) 0.45V tCHARGE charge time from 0.45V VSS(ACTIVE) tDISCHARGE already calculated earlier 185s. tCHARGE calculated assuming following: VREF 2.5V, 35.7k, 100k, 0.1F VSS(MIN) 0.45V. tCHARGE t(VSS 0.8V) t(VSS 0.45V) Step SS_MAXDC(DC) 2.5[100k/(35.7k 100k)] 1.84V RCHARGE (35.7k 100k/135.7k) 26.3k Step t(VSS 0.45V) calculated from, RCHARGE (-1) ln(1 VSS/SS_MAXDC(DC)) 2.63e4 1e-7 (-1) ln(1 0.45/1.84) 2.63e-3 (-1) ln(0.755) 7.3e-4 Step t(VSS 0.8V) calculated from: RCHARGE (-1) ln(1 VSS/SS_MAXDC(DC)) 2.63e4 1e-7 (-1) ln(1 0.8/1.84) 2.63e-3 (-1) ln(0.565) 1.5e-3 From Step Step tCHARGE (1.5 0.73)e-3 7.7e-4 total time switching converter soft-start event: tDISCHARGE tCHARGE 1.85e-4 7.7e-4 9.55e-4 Example Converter Output Rise Time rise time converter output reach regulation closely approximated time between start switching (SS_MAXDC VSS(ACTIVE)) time where converter duty cycle regulation (DC(REG)) longer controlled SS_MAXDC (SS_MAXDC VSS(REG)). Converter output rise time expressed Output Rise Time t(VSS(REG)) t(VSS(ACTIVE)) Step Determine converter duty cycle DC(REG) output regulation. natural duty cycle DC(REG) converter depends several factors. this example assumed that DC(REG) system input voltage near undervoltage lockout threshold (UVLO). This gives SD_VSEC 1.32V. Also assume that maximum duty cycle clamp programmed this condition SS_MAXDC(DC) 1.84V, fOSC 200kHz RDELAY 40k. Step Calculate VSS(REG) calculate level SS_MAXDC (VSS(REG)) that longer clamps natural duty cycle converter, equation maximum duty cycle clamp must used (see previous section `Programming Maximum Duty Cycle Clamp'). point where maximum duty cycle clamp meets DC(REG) during soft-start given DC(REG) Duty Cycle clamp 0.522(SS_MAXDC(DC)/SD_VSEC) (tDELAY fOSC)
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
SD_VSEC 1.32V, fOSC 200kHz RDELAY This gives tDELAY 40ns. Re-arranging above equation solve SS_MAXDC VSS(REG) [0.6 (tDELAY fOSC)(SD_VSEC)]/(k 0.522) [0.6 (40ns 200kHz)(1.32V)]/(1 0.522) (0.608)(1.32)/0.522 1.537V Step Calculate t(VSS(REG)) t(VSS(ACTIVE)) Recall time SS_MAXDC charge given voltage given RCHARGE (-1) ln(1 VSS/SS_MAXDC(DC)) (Figure gives model SS_MAXDC charging) 35.7k, 100k, RCHARGE 26.3k 0.1F, this gives t(VSS(ACTIVE)) t(VSS(0.8V)) 2.63e4 1e-7 (-1) ln(1 0.8/1.84) 2.63e-3 (-1) ln(0.565) 1.5e-3 t(VSS(REG)) t(VSS(1.537V)) 26.3k 0.1F ln(1 1.66/1.84) 2.63e-3 (-1) ln(0.146) 5e-3 rise time converter output t(VSS(REG)) t(VSS(ACTIVE)) 1.5)e-3 3.5e-3 Example Time Maximum Duty Cycle Clamp Reach Within Target Value maximum duty cycle clamp calculated previously section `Programming Maximum Duty Cycle Clamp'. programmed value used SS_MAXDC(DC) 1.84V. time SS_MAXDC charge from minimum value VSS(MIN) within SS_MAXDC(DC) given t(SS_MAXDC charge time within target) t[(1 (X/100) SS_MAXDC(DC)] t(VSS(MIN)) VSS(MIN) 0.45V, t(0.98 1.84) t(0.45) t(1.803) t(0.45) From previous calculations, t(0.45) 7.3e Using previous values CSS,
19521fd
t(1.803) 2.63e-4 1e-7 (-1) ln(1 1.803/1.84) 2.63e-3 (-1) ln(0.02) 1.03e-2 Hence time SS_MAXDC charge from minimum reset threshold 0.45V within target value given t(1.803) t(0.45) 1.03e-2 7.3e-4 9.57e-3 Forward Converter Applications following section covers applications where LT1952/LT1952-1 used conjunction with other parts provide highly efficient power converters using single switch forward converter topology. Efficient, Synchronous Forward Converter circuit Figure based LT1952-1 provide simplest forward power converter circuit-using only primary MOSFET. SOUT LT1952-1 provides synchronous control signal LTC1698 located secondary. LTC1698 drives secondary side synchronous rectifier MOSFETs achieve high efficiency. LTC1698 also serves error amplifier optocoupler driver. Efficiency transient response shown Figures Peak efficiencies ultra-fast transient response superior presently available power modules. Integrated soft-start, overcurrent detection short-circuit hiccup mode provide stress, reliable protection. addition, circuit Figure allceramic capacitor solution providing output ripple voltage improved reliability. LT1952-based converter used replace power module converters much lower cost. LT1952 solution benefits from thermal conduction system board resulting higher efficiencies lower rise component temperatures. height allows dense packaging circuit easily adjusted provide output voltage from 1.23V 26V. Higher currents achievable simple scaling power components. LT1952-1-based solution Figure powerful topology replacement wide range power modules.
LT1952/LT1952-1 APPLICATIONS INFORMATION
EFFICIENCY VOUT fOSC 300kHz LOAD CURRENT
1952
IOUT (5A/DIV)
VOUT (200mV/DIV)
20s/DIV
1952
Figure Output Voltage Transient Response Load Step 6A/s)
Figure LT1952-Based Synchronous Forward Converter Efficiency Load Current (For Circuit Figure
+VIN
2.2F 100V
PA0491
PA1393.152
475k SOUT 100k 0.1F 0.1F 115k SYNC BLANK DELAY 4.75k COMP SOUT 220pF SYNC ROSC VREF SOUT SS_MAXDC SD_VSEC ISENSE LT1952-1 PGND 10VBIAS 9.53k 6.8nF 1.2k +V0UT 38.3k 12.4k 7VBIAS PGND OPTO VCOMP LTC1698 SYNC VAUX ICOMP +ISNS -ISNS SYNC 18.2k 0.015 PH3830 PH3830
+V0UT 100F
0.1F
10VBIAS PHM15NQ20 PHILIPS 0.1F
HCPL-M453
1952
Figure Input Synchronous Forward Converter
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
Isolated 12V, Opto-Coupler) `Bus Converter' wide programmable range accuracy LT1952/LT1952-1 Volt-Second clamp makes LT1952/ LT1952-1 ideal choice `Bus Converter' applications where Volt-Second clamp provides line regulation converter output. `Bus Converter' application Figure16 shows semi-regulated isolated output without need optocoupler, optocoupler driver, reference feedback network. Some `Bus Converter' solutions with fixed duty cycle resulting output variation 2-to-1 applications with input range. LT1952/LT1952-1 accurate wide programmable range Volt-Second clamp initially program then control power supply output voltage typically ±10% same input range. Efficiency LT1952 based converter Figure achieves high (Figure 15). solution only slightly larger than "brick" size uses only ceramic capacitors high reliability.
96.0 95.5 EFFICIENCY 95.0 94.5 94.0 93.5 93.0
VOUT LOAD CURRENT
1952
Figure LT1952-Based Synchronous `Bus Converter' Efficiency Load Current (For Circuit Figure
BAS516 0.1F 2.2F, 100V
PA0815.002
2.4H
VOUT 12V, COUT 33F, X5R,
BCX55
Si7370
PH4840
LTC3900 BIAS
370k 13.2k 115k 0.47F SD_VSEC ROSC BLANK SS_MAXDC LT1952 0.1F VREF COMP PGND DELAY ISENSE SOUT BAT760
PH21NQ15
SYNC TIMER
BIAS 560W
220pF Q4470-B
PA1494.242 PULSE ENGINEERING PULSE ENGINEERING COILCRAFT
1952
Figure Input `Optocoupler' Synchronous `Bus Converter'
19521fd
LT1952/LT1952-1 APPLICATIONS INFORMATION
Input, 3.3V Converter LT1952-based synchronous forward converter provides ideal solution power supplies requiring high efficiency output voltages high load currents. 3.3V solution Figure achieves peak efficiencies 92.5% (Figure minimizing power loss rectification output. Synchronous rectifier control output SOUT, with programmable delay, optimizes timing control secondary side synchronous MOSFET controller (LTC3900) which results high efficiency synchronous rectification. LT1952/LT1952-1 precision current limit threshold combined with soft-start hiccup mode provide stress output short-circuit protection. maximum output current will vary only over full range. During short-circuit average power dissipation circuit will lower than maximum rated power thanks soft-start controlled hiccup mode.
BAS516 0.1F PH3230 2.2mF PH3230 LTC3900 SD_VSEC ROSC BLANK LT1952 PGND DELAY 0.1F 2.2k 2.5V COMP 1.23V ISENSE SOUT 220pF Q4470-B PA0713, PULSE ENGINEERING CAPACITORS X7R, CERAMIC, COILCRAFT PS2801 LT1797 249k BIAS 2.2nF 80.6k BIAS BAT760 BIAS Si7846 COUT 100F
This allows significant reduction power component sizing using LT1952-based converter.
EFFICIENCY VOUT 3.3V fOSC 300kHz OUTPUT CURRENT
1952
Figure LT1952-Based Synchronous Forward Converter Efficiency Load Current (For Circuit Figure
+VIN
PA0912.002
VOUT 3.3V,
BCX55
370k 13.2k 115k 0.22F
SYNC TIMER
SS_MAXDC
Figure 72V, 3.3V Synchronous Forward Converter
19521fd
LT1009
0.1F
1952
LT1952/LT1952-1 APPLICATIONS INFORMATION
Converter: Optimum Output Voltage Tolerance Converter applications shown page Figure provide semi-regulated isolated outputs without need optocoupler, optocoupler driver, reference feedback network. LT1952/LT1952-1Volt-Second clamp adjusts switch duty cycle inversely proportional input voltage provide output voltage that regulated against input line variations. Some converters switch duty cycle limit which causes output voltage variation typically ±33% over input voltage range. LT1952/LT1952-1 typically provide ±10% output variation same input variation. Typical output tolerance further improved LT1952 inserting resistor from system input voltage SS_MAXDC Figure 19). LT1952/LT1952-1 electrical specifications Duty Cycle Clamp show typical switch duty cycle move from change input voltage (SS_MAXDC 1.84V). Since output voltage regulation follows Duty Cycle, switch duty cycle change (for input voltage change) provides minimal output voltage variation LT1952/LT1952-1 converter. achieve this, SS_MAXDC voltage increase 1.09x (36/33) would required high input line. resistor inserted between SS_MAXDC system input voltage (Figure increases SS_MAXDC voltage input voltage increases, minimizing output voltage variation over input voltage change. following steps determine values (1)Program switch duty cycle minimum system input voltage (VS(MIN)) (a)RT(1) (minimum allowed still guarantee softstart pull-down)
SYSTEM INPUT VOLTAGE
(b)Select switch duty cycle Converter given output voltage VS(MIN) calculate SS_MAXDC voltage (SS1) (See Applications Information "Programming Maximum Duty Cycle Clamp") (c)Calculate RB(1) [SS1/(2.5 SS1)] RT(1) (2)Calculate ([VS(MAX) VS(MIN)]/[SS1 1)]) RTHEV(1) RTHEV(1) RB(1) RT(1)/(RB(1) RT(1)), ideal duty cycle (VS(MAX))/actual duty cycle (VS(MAX)) (3)The addition causes increase original programmed SS_MAXDC voltage SS1. value RB(1) should calculated provide lower SS_MAXDC voltage (SS2) correct this offset: (a)SS2 [(VS(MIN) SS1) RTHEV(1)/Rx] (b)RB(2) [SS2/(2.5 SS2)] RT(1) (4)The thevinin resistance RTHEV(1) used calculate should re-established (final value) RB(2) (RTHEV(1)/RTHEV(2)) (final value) RT(1) (RTHEV(1)/RTHEV(2)) where RTHEV(2) RB(2) RT(1)/(RB(2) RT(1)) Example: Converter running from input, VS(MIN) 36V, VS(MAX) 72V. choose RT(1) 10k, SS_MAXDC 1.84V (for duty cycle VS(MIN) 36V) RB(1) [1.84V/(2.5V 1.84V)] RTHEV(1) [28k 10k/(28k 10k)] 7.4k SS_MAXDC correction 36%/33% 1.09 [(72V 36V)/(1.84 0.09)] 7.4k 1.6M 1.84 [(36V 1.84) 7.4k/1.6M] 1.682V RB(2) [1.682/(2.5 1.682)] 20.6k RTHEV(2) [20.6k 10k/(20.6k 10k)] 6.7k
VOLT-SECOND CLAMP INPUT VOLT-SECOND CLAMP ADJUST INPUT
LT1952/ LT1952-1 SD_VSEC SS_MAXDC
VREF
1952
RTHEV(1)/RTHEV(2) 7.4k/6.7k 1.104 (final value) 20.6k 1.104 22.7k (choose 22.6k) (final value) 1.104
19521fd
Figure Optimal Programming Maximum Duty Cycle Clamp Converter Applications (Adding
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
LT1952/LT1952-1 PACKAGE DESCRIPTION
Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference 05-08-1641
.045 .005 .189 .196* (4.801 4.978)
.009 (0.229)
.254
.150 .165 .229 .244 (5.817 6.198) .150 .157** (3.810 3.988)
.0165 .0015
.0250 .015 .004 (0.38 0.10) .0532 .0688 (1.35 1.75) .004 .0098 (0.102 0.249)
RECOMMENDED SOLDER LAYOUT
.007 .0098 (0.178 0.249) .016 .050 (0.406 1.270) NOTE: CONTROLLING DIMENSION: INCHES INCHES DIMENSIONS (MILLIMETERS)
.008 .012 (0.203 0.305)
.0250 (0.635)
GN16 (SSOP) 0204
DRAWING SCALE *DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH SHALL EXCEED 0.006" (0.152mm) SIDE **DIMENSION DOES INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL EXCEED 0.010" (0.254mm) SIDE
RELATED PARTS
PART NUMBER LT1681/LT3781 LT1698 LT1725 LT1950 LTC3722-1/LTC3722-2 LTC3723-1/LTC3723-2 LTC3803 LTC3806 LTC3900 DESCRIPTION Synchronous Forward Controllers Secondary Synchronous Rectifier Controller General Purpose Isolated Flyback Controller Single Switch Forward Controller COMMENTS High Efficiency 2-Switch Forward Control Isolated Power Supplies, Contains Voltage Margining, Optocoupler Driver, Synchronization Circuit with Primary Side, Error Amplifier Drives External Power MOSFET, Senses Output Voltage Directly from Primary Side Switching-No Optoisolator Required, 16-pin SSOP 25V, 500W, Adaptive Duty Cycle Clamp, Programmable Slope Compensation, 100mV Sense Threshold, 16-Pin SSOP High Efficiency Push-Pull Adjustable Slope Compensation, Internal Soft-Start, 200kHz Excellent Cross Regulation, High Efficiency, Multiple Outputs Isolated Power Supplies, 4.5V 11V, N-channel Synchronous MOSFET Driver, Programmable Timeout, Reverse Inductor Current Sense, 16-pin SSOP
Dual Mode Phase Modulated Full-Bridge Controllers Full-Bridge Controllers Synchronous Push-Pull Controllers SOT-23 Flyback Controller Synchronous Flyback Controller Synchronous Rectifier Driver Forward Converters
19521fd
Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1108 PRINTED
1630 McCarthy Blvd., Milpitas, 95035-7417
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2004
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