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PI49FCT804T Fast CMOS Buffer/Clock Driver Product Features


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Name OEA, INA, OAN, Description Hi-Z State Output Enable Inputs (Active LOW) Clock Inputs Clock Outputs Ground Power
PI49FCT804T
Fast CMOS Buffer/Clock Driver
Product Features
output skew: 0.8ns Clock busing with Hi-Z state control input output levels, reducing problematic ground bounce High output drive, 64mA Extremely static power typ.) Hysteresis inputs Packages available: 16-pin wide plastic 16-pin wide plastic SOIC
Product Description
Pericom Semiconductors PI49FCT series logic circuits produced Companys advanced micron CMOS technology, achieving industry leading speed grades. PI49FCT804T non-inverting clock driver designed with independent groups buffers. These buffers have Hi-Z state Output Enable inputs (active LOW) with 1-in, 4-out configuration group. Each clock driver consists banks drivers, driving four outputs each from standard compatible CMOS input.
Logic Block Diagram
Product Configuration
OA3-OA0
OB3-OB0
16-PIN
Truth Table(1)
Inputs OEA, INA, Outputs OAN,
Note: High Voltage Level Voltage Level High Impedance
PS7005A 02/04/99
PI49FCT804T BUFFER/CLOCK DRIVER
Maximum Ratings
(Above which useful life impaired. user guidelines, tested.) Storage Temperature -65°C +150°C Ambient Temperature with Power Applied .0°C +70°C Supply Voltage Ground Potential (Inputs Only) -0.5V +7.0V Supply Voltage Ground Potential (Outputs Only) -0.5V +7.0V Input Voltage -0.5V +7.0V Output Current 120mA Power Dissipation .0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
Electrical Characteristics (Over Operating Range, +70°C, 5.0V
Parameters Description IOZH IOZL Output HIGH Voltage Output Current Input HIGH Voltage Input Voltage Input HIGH Current Input Current High Impedance Output Current Input HIGH Current Clamp Diode Voltage Short Circuit Current Input Hysteresis Max., =VCC (Max.) Min., Max.(3), VOUT -0.7 -120 Test Conditions(1) Min., Min., Guaranteed Logic HIGH Level Guaranteed Logic Level Max. Max. Max. VOUT VOUT -24.0mA 64mA -1.2 -225 Min. Typ.(2) 0.55 Max. Units
Capacitance 25°C, MHz)
Parameters(4) COUT Description Input Capacitance Output Capacitance Test Conditions VOUT Typ. Max. Units
Notes: Max. Min. conditions, appropriate value specified under Electrical Characteristics applicable device type. Typical values 5.0V, +25°C ambient maximum loading. more than output should shorted time. Duration test should exceed second. This parameter determined device characterization production tested.
PS7005A 02/04/99
PI49FCT804T BUFFER/CLOCK DRIVER
Power Supply Characteristics
Parameters Description ICCD Quiescent Power Supply Current Supply Current Input HIGH Supply Current Input MHz(4) Max. Max. Max., Outputs Open Output Toggling Duty Cycle Max., Outputs Open Duty Cycle Four Outputs Toggling Max., Outputs Open Duty Cycle Eight Outputs Toggling Test Conditions(1) 3.4V(3) Min. Typ.(2) 0.15 Max. 0.25 Units
Total Power Supply Current(6)
3.4V
11.2(5)
12(5)
6.3(5)
3.4V
7.6(5)
Notes: Max. Min. conditions, appropriate value specified under Electrical Characteristics applicable device. Typical values 5.0V, +25°C ambient. driven input (VIN 3.4V); other inputs GND. This parameter directly testable, derived Total Power Supply Calculations. Values these conditions examples formula. These limits guaranteed tested. =IQUIESCENT IINPUTS IDYNAMIC DHNT ICCD (fCP/2 fINI) Quiescent Current Power Supply Current High Input (VIN 3.4V) Duty Cycle Inputs High Number Inputs ICCD Dynamic Current Caused Input Transition Pair (HLH LHL) Clock Frequency Register Devices (Zero Non-Register Devices) Input Frequency Number Inputs currents milliamps frequencies megahertz.
PS7005A 02/04/99
PI49FCT804T BUFFER/CLOCK DRIVER
PI49FCT804T Switching Characteristics over Operating Range
804T Com. 804AT Com. Unit
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tSKEW(o)(3)
Description Propagation Delay OAN, Output Enable Time OAN, Output Disable Time OAN, Skew between outputs same package (same transition) Skew between opposite transitions (tPHL-tPLH) same output Skew between outputs different package same temperature (same transition)
Conditions(1)
tSKEW(p)(3)
tSKEW(t)(3)
Notes: test circuit wave forms. Minimum limits guaranteed tested Propagation Delays. Skew measured worse cast temperature (max. temp).
Tests Circuits Outputs(1)
7.0V
Switch Position
Test Open Drain Disable Enable Other Inputs
Switch Closed Open
Pulse Generator D.U.T.
VOUT
50pF
DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator.
PS7005A 02/04/99
PI49FCT804T BUFFER/CLOCK DRIVER
Switching Waveforms
Propagation Delay
Input 1.5V tPLH tPHL Output 1.5V
Output Skew tSK(o)
Input tPLHx tSK(o) tPLHy tPHLy tSK(o) 1.5V tPHLx 1.5V 1.5V
Enable Disable Times
Enable Disable 1.5V tPZL Output Normally 3.5V Switch Closed 1.5V 0.3V tPHZ 0.3V 1.5V tPLZ 3.5V
tSK(o) tPLHy tPLHx tPHLy tPHLx
Pulse Skew tSK(p)
Input 1.5V tPLH tPHL Output 1.5V
tPZH Output Normally High
Switch Open
tSK(p) tPHL tPLH
Package Skew tSK(t)
Input tPLH1 Package Output tSK(t) Package Output tPLH2 tPHL2 tSK(t) 1.5V tPHL1 1.5V 1.5V
tSK(t) tPLH2 tPLH1 tPHL2 tPHL1
Pericom Semiconductor Corporation 2380 Bering Drive Jose, 95131 1-800-435-2336 (408) 435-1100 http://www.pericom.com
PS7005A 02/04/99

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