ASAHI KASEI [AK2358FI Base-band kopian Cordless Telephones(C
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ASAHI KASEI
[AK2358FI
Base-band kopian Cordless Telephones(CTl, CT1+)
Meets specification europian cordless telephones (CT1, CT1+) Built-in voice filter cordless telephone, MODEM (2400bps), COMPANDOR, scrambler circuit wide operation voltage range (1.9 5.5V) Built-in COMPANDOR output transient response circuit time constant circuit external component needed COMPANDOR Built-in buffer amplifier ceramic receiver driving. Built-in electronic volume microphone sensitivity modulator/demodulator sensitivity Receiving level switchable steps (-12 +9dB) Built-in uting function voice transmitting receiving External adjustment limiter level Built-in amplifier transmission reception gain adjustment power CMOS power-down function Built-in 3.58MHz oscillator circuit Scrambler circuit with frequency inversion. inversion frequencies selected. Bypassing scrambler circuit available Built-in frame detection function demodulator Control register MODEM data buffer controlled serial interface external component necessary resulting cost reduction small size. Package: VSOP
splatter lter Transmission output
Control data
.58NHz control register data buffer !4S1 MODEM
!rane Reception signal Receiver input
Eecept nutput
0152
1996/12
TXINO
TXIN
TXHPF +VR1 Compressor
TXAFSW Scrambler Preemphasis~ TAGND Limiter Splatter filter
+VR2
TDATA TCLK SCLK 01/0 ROF/FD
Control register data buffer
Modulator
Denodulator
BUFON
PCONT emphasis J&&J Expander Scrambler RXHPF +VR3 RXIN
RXAFSW RECSW +kMP3,.,;:
eiver
BUFOP
Y71'I
Operating mode
ASAHI KASEI
[AK2358FI
AK2358F, abase-band europian cordless telephone (CT1, CT1+), built-in voice filters, 2400bps MODEM data communication, frame detection circuit, COMPANDOR noise reduction, scrambler circuits. CMOS process provides power operation. Application VSOP package with feature significant reduction external component provides minimum mounting area. time constant circuit COMPANDOR output transient response built into LSI. Using 2400bps MODEM data communication realized high data reliability high speed communication same time. This suitable cordless system telephones etc. which requires complicated protocol control. oscillation circuit with 3.58MHz crystal oscillator built other frequency source required MODEM. oscillator also used other DTMF generator etc. scrambler circuit uses simple inversion ethod with inversion voice spectrum around carrier frequency. inversion frequencies selected. Built-in electronic volumes provided transmission reception part realize automatic adjustment microphone sensitivity modulator/demodulator sensitivity external EEPROM microprocessor. transmission part composed high-pass filter, compressor, pre-emphasis circuit. scrambler, limiter, modulator, splatter filter, electronic volume control, etc. reception part composed band pass filter, de-emphasis circuit, de-scrambler, expander, buffer amplifier, demodulator, frame detection circuit, electronic volume control, etc.
Arrangement
24pin VSOP
AGNDINC TAGNDC TXINC TXINOC LIMLVC MODC Vssc TCLKC TDATAC D1/Oc ROF/FDc SCLK
RAGND XXIN RXINO BUFOP BUFON RXAF aBxAFIx EXPOL'T XOL'I ~DIR
0152-E-00
199612
ASAHI KASEI
[AK2358FI
Block AMP1
TXHPF Compressor Pre-emphasis
Scrambler (Tx)
Limiter
Splatter filter
modulator AMP2
RXLPF
RXHPF De-emphasis De-scrambler (Rx)
Function operational amplifier voice signal transmission gain adjustment filter eliminate aliasing noise SCF(switched capacitor filter) following stage. external resistor capacitor gain less than 30dB cut-off frequency about 10kHz. circuit eliminate frequency component less than 300Hz from transmission voice signal. circuit compress amplitude transmission voice signal. circuit emphasis high-frequency component transmission voice signal improve modulation signal. circuit inverse transmission voice spectrum regard carrier frequency. Carrier frequency selected from frequencies KEY. PCONT select scrambler pre-emphasis circuit. amplitude-limiting circuit suppress frequency deviation modulation signal. limitation level adjusted applying voltage LIMLV pin. LIMLV open, default limitation level applied. circuit eliminate high frequency component higher than 3.4kHz from limiter output signal odulator signal. circuit generate 2400bps signal according received digital signal logic from TDATA pin. operational amplifier adjust reception demodulation signal gain filter eliminate aliasing noise following stage. gain less than 30dB cut-off frequency about 10kHz external resister capacitor. circuit eliminate high frequency component higher than 3.4kHz from limiter output signal modulator signal. circuit eliminate frequency component lower than 300Hz from reception voice signal. circuit de-emphasis emphasized signal pre-emphasis circuit. circuit re-inverse spectrum scrambled receiving voice signal respect carrier frequency. Carrier frequency selected from candidates KEY. de-scrambler(Rx) reemphasis circuit selected PCONT. `the circuit expand signal amplitude compressed compressor.
Expander
0152-E-00
1996,
ASAHI KASEI Block AMP3
[AK2358FI Function operational amplifier used smoothing filter reception output. gain cut-off frequency about 20kHz external resister capacitor. circuit eliminate frequency component lower than 100Hz from reception signal. circuit reproduce 2400bps receiving data clock from received signal RXIN pin. inverting non-inverting buffer amplifier drive ceramic receiver. circuit generate reference voltage internal analog signal. circuit oscillate 3.58 reference clock using external crystal oscillator resistor. volume control input amplitude transmission voice signal. adjustment range -8dB +7dB step. volume control output amplitude. adjustment range -4dB +3.5dB 0.5dB step. volume control input amplitude reception demodulation signal. "The adjustment range -4dB t3.5dB 0.5dB step. volume control receiving voice amplitude. adjustment range -12dB +9dB step. control register contlols status internal switches internal volumes serial data consists address bits data bits. start power-on-reset circuit works default values control register. (see control register map.) data buffer stores bits receiving data smooth signal interface with CPU.
MSKHPF demodulator AMP4 A!!P5 AGND Oscillation circuit
Control register data buffer
name AGNDIN
TAGND
TXIN
TXINO LIMLV
Function Analog ground input pin. Connect capacitor stabilize analog ground. Analog ground transmission system. Connect capacitor stabilize analog ground. Transmission voice input pin. This inverting input AMP1. composes microphone amplifier with external resister caDacitor. AilPl output pin. Limitation level adjustment pin. limitation level adjusted applying voltage this pin. default limitation level adopted voltage applied.
0152-E-00
199612
ASAHI KASEI name TCLK
[AK2358FI Function Output modulated transmission signal. load impedance larger than 10kQ driven. Negative power supply pin. Clock output data transmission. 2.4kHz clock setting internal register "O". register "1", goes level. transmission data input pin. Data latched synchronizing with TCLK rising edge. Serial data input output pin. signal reception flag output Frame detection signal output pin. This puts types information, depending status internal register FSL. "l", klSK signal reception mode, reaches after bits reception signal have been written data register. "O", frame detection signal output mode, pulse after frame pattern detected. Clock input serial data 1/0. Serial data control pin. Crystal oscillator connection pin. reference clock generated connecting 3.58MHz crystal oscillator parallel lMf2 resistor between this pin. case external clock operation, connect XOUT apply clock XIN. Crystal oscillator connection pin. Positive power supply pin. Expander output pin. Reception voice input pin. This inverting input AMP3. composes smoothing filter external resistor capacitor. Reception voice output pin. This output AVP3. load impedance more than 10kQ driven. Receiver amplifier output pins. Connect ceramic receiver between these pins. AMP2 output pin. Demodulated receiving signal input pin. This inverting input AUP2. composes prefilter with external resistor capacitor. Analog ground reception systcm. Connect capacitor stabilize analog ground.
TDATA
DI/O RFD/FD
SCLK XOUT
EXPOUT RXAFIN
RXAF
BUFON BUFOP RXINO RXIN
RiGiYD
0152-E-00
199612
ASAHI KASEI
[AK2358FI
VSS=OV; Note
Parameter Power supply voltage: (VDD) Input current (except power supply pins) Analog input voltage Digital input voltage Storage temperature
Symbol
-0.3
Unit
VINA VIND
-0.3 -0.3
(VA+)+O.3 (VA+)+O.3
Note voltages with respect pin. Warning: Operation beyond these limits result permanent damage device. Normal operation guaranteed these extremes.
VSS=OV; Note Parameter 10~eration temperature Power supply ;oltage: (VDD) Analog reference voltage Current consumption Mode Mode hlode Mode
Symbol AGND IddO lddl Idd2 Idd3
l/2VD+
Unit
Note voltages with respect pin.
0152-E-00
1996
ASAHI KASEI
[AK2358FI
f=lkHz, PCONT=''1", TC="l", EM=''1", VR4=OdB: unless otherwise specified, OdBm=O.775Vrms OdBx=-5dBm AVDD=2V Note system Parameter Standard input level @TXINO Absolute gain TXINO-+MOD Note lkHz Limiter level Note external Adjustment range external Compressor linearity TXINO~MOD Note TXINO=-44dBx TXINO=-50dBx Noise without input TXINO+MOD Note Compressor distortion TXINO-hlOD TXINO=-10dBx Transmission Note @MOD signal level 1.2kHz signal output Transmission Note @MOD signal distortion 1.2kHz si~nal outDut system Parameter Standard input level @RXINO Absolute gain RXINO~BUFON, BUFOP -1.5 Note RXINO-BUFON, BUFOP Expander linearity Note RXINO=-25dBx -33.0 -30.0 -27.0 RXINO=-30dBx -45.0 -40.0 -35.0 Noise with input RXINO-BUFON, BUFOP Xote Expander distortion RXINO~RXAF RXINO=-5dBx Reception @RXINO signal level 1.2kHz signal output Unit -4.5 -3.5 -2.5 -2.5 Unit
-17.0 -20.0
-36.5
-4.5
-3.5
-2.5
0152-E-00
1996
ASAHI KASEI Overall characteristics Parameter Absolute gain TXIliO~BUFO!l, BUFOP Note TXINO=-10dBx KEY="O" TXINO~BUFON,BUFOP Note Distortion TXINO=-10dBx KEY="O" Crosstalk Note @BUFON,BUFOP Transmission Reception -f~=fto. TXINO=OdBx Crosstalk Note @MOD Reception Transmission -56.5 -0.5
[AK2358FI
Unit
Filter characteristics Parameter Transmission overall characteristics (See Fig.1) TXINO 100Hz TC="O" EM="l° PCONT="l" 300Hz Relative value with gain 3kHz lkHz 4kHz 6kHz Reception overall characteristics (See Fig.2) RXINO EXPOUT 100Hz TC="O" EM="l° PCONT="l° 250Hz Relative value with gain 300Hz lkHz 4kHz 5kHz Unit
-10.5
13.5
10.5 -10.5
Note With external circuit shown application circuit example. Note Relative value with output level time input standard input level (-10dBx) TXINO. Note With C-message filter. Note Relative value with BUFON, BUFOP output level time input standard input level (-10dBx) RXINO. Note With external circuit shown application circuit example. Further, AMP2 gain should -3.5dB, hfOD RXIN should loop connection. Note TC='' PCONT="O" Note TC=''O", PCONT="O" Note standardized unit valid various power supply voltages from 5.5V. voltage OdBx should -5dBm. With other voltage [V], dBml. OdBx
0152-E-00
1996/12
ASAHI KASEI Filter characteristics
IN(dB)
[AK2358FI
Fig.
FREQUENCY
Transmission overall characteristics
GAIN(dB)
Fig.
FREQUENCY
Rc'ceptiorl overall characteristics
0152 E-00
1996/'l2
ASAHI KASEI system
[AK2358FI
MOdu ator
f=lkHz TXINO
SdBx(USK -6.3dBx(reference
-Z3.WBX -26.5,8X
system
RXINO EXPOUT RX*F BUFOP
a~'HO';dBHp''';terH'''")=
-5,0
$dBx(max.
output level)
.-".
-4dBx(referenca
.34,Bx
-44dBx
vote)
standardized unit valid pOwer supply vOltages frOm 5.5V. voltage should 5dBm. With other ioltage [v:, OdBx dllm:.
ASAHI KASEI
[AK2358FI
Unit 30%VD+ 20%VD+I iuAl
Characteristics
Parameter High-1evel inuut voltage Low-level inDut voltaze High-level input voltage Low-level input voltage High-level inuut current inDut current ---- -igh-level output voltage Low-1evel outuut voltage (l). TDATA, DI/O SCLK, TCLK, RDF, DI/O
Symbol 70%VD+ VIH1 v,,., 80%VD+ VIH2 VIL2 V,H=VD+ (l)(2) V,,=OV (1)(2) 90%VD+ I~H=O. `"1~=0.6mA
Characteristics Parameter Master clock frequency Modulator timing Falling TCLK Rising TCLK period Rising TXAFSW Falling TDATA time TDATA Hold time TDATA Hold time2 Demodulator timing RCLK Period pules width Serial data input timing Clock pulse width Clock pulse width SDATA time SDATA Hold time time Hold time falling SCLK falling time SCLKi'DIR input rising time SCLK/DIR input falling time falling SCLK falling time SCLK rising falling time Symbol fclk 3.579545 208.3 416.7 402.2 416.7 Unit /!.Ls
0152-E
1996/'12
ASAHI KASEI
[AK2358FI
TCLK TXAFSW Internal register Note) Internal register TDATA Voice signal Voice signal
SCLK DI/O
0.8DVDD
SCLKIDIR input timing rewrite internal registers TXAFSW synchronized with falling edge DIR.
[AK2358FI
ASAHI KASEI
[AK2358FI
Register composition
Address Control register Volume register Volume register Control register volume register Reception data register
Data FCLN PCONT RECSW
FRPT
TXAF RXAF
MODEhl reception data
reception data register read only register. others write only registers. reception data register address information proceeding Data. bits volume register address "01" "l". they "O", changed test mode.
Register
Control register Address (Default) Data FCLN PCONT TXAFSW RXAFSW
Transmission signal control
TXAFSW
Transmission output Voice signal h[ute simal
Reception signal control
RXAFSW
RECSW
RXAF hlute
BUFOP/BUFON Nute Mute
Scrambler circuit PCONT Bypass (Scrambler OFF) Scrambler works (ON)
0152-E-00
-15-
1996
ASAHI KASEI Frame detection circuit ON/OFF
[AK2358FI
frame detection function used (OFF). frame detection function used (ON).
Note) FCLN automatically changes from when synchronized frame detected. Power-down mode
hlode name modeO model mode2 mode3
Voice system transmission
Reception
Oscillator
RDF/FD selection signal reception flag (RDF) from RDF/FD pin. frame detection signal (FD) from RDF/FD pin.
Control register Address (Default) Data name FRPT Data FRPT
Function Carrier inverting frequency 3.496kHz "O": 3.729kHz Frame detector detection pattern "l": 1100010011010110 (base unit) 1001001100110110 (portable unit) Emphasis circuit Passage (ON) "O": Bypass (OFF) Passage (ON) COMPANDOR circuit "O": BvDass (OFF)
Volume register Address Data VR23 YR22 YR21 f'RPT VR20 RECSW VR13 VR33 VR42 VR12 VR32 \'Rl VR31 VR40 VR1O VR30
-16-
ASAHI KASEI volume control VR13 VR12 VRII VR1O Volume gain (dB)
[AK2358FI
VR2, volume control VR22 VR21 VR23 VR32 VR31 VR33 101011 VR20 VR30 Volume gain (dB)
+1.0 +1.5
10101
0152-E-OO
1996,
ASAH KASEI volume control
VR42
VR41
VR40
Volume ~ain (dB)
Note) reset, gain volumes RECSW changed "o". MODEM reception data
Data
Function "1'': l.2kHz 4kHz
Data name
reception data first received data.
0152-E-00
1996
ASAHI KASEI
[AK2358FI Modem
signal transmission flow
signal transmission
transmission data transmitted synchronized TCLK.
transmission start
During transmission
Transmission
TDE=
data transmission completion
WAIT more
TXAFSW
Switching voice signal
serial register "TDE" "TXAFSW" "l", that lISK transmission state provided. 2400Hz clock from TCLK. Synchronizing with rising edge TCLK, AK2358F reads transmission data from TDATA them pin. After transrniss!on necessary number signal bit, "TDE" serial register Afterwards, before switching voice signal transmission mode, wait east after "TDE" complete signal final transmission. Then TXAFSW register "O".
0152-E-00
1996/12
ASAHI KASEI Signal Reception
signal
[AK2358FI
"O". RXAFSW
frase fros RDF/FD
Synchronization frame detection?
Reception voice
Reception data read
(RDF) from RDF/FD
Reception data?
RDF/FD
FCLN
Waiting
frame
internal register "FCLN" "O", internal nodes RDATA, RCLK fixed "l". After synchronization frame detected, goes during period "T", then FCLN "l". RDATA RCLK data following synchronized frame pattern, these stored internal buffer. After reception data have been entered internal buffer, goes "L". After detect that "L", puts clock bits SCLK, then read reception data from SDATA pin. with input clock bits SCLK, goes "H". Afterwards, repeating steps necessary data bits read. After necessary data have been read, goes "H", "FCLN" serial interface, internal nodes RDATA RCLK "l", then system waits next synchronization frame.
0152-E-00
-20"
1996/12
ASAHI KASEI
[AK2358FI
Application Circuit
OAMP transmitting microphone amplifier. gain should less than 30dB. eliminate high frequency noise component over than 100kHz from input signal, order order anti-aliasing filter necessary. following drawing example order anti-aliasing filter, which 30dB gain 10kHz cut-off frequency. AMP1
TXINO
C1=2200PF C2=33PF
TXINR2
Rl=R2=10k R3-330k
@3moothing filter output signal Realize low-pass filter eliminate l12kHz clock signal component from output signal. following example order low-pass filter which 8.7kHz cut-off frequency. 10kQ modulator load resistor(RL) provide 3.3dB signal attenuation.
R=3.9k
cl=4700pF
CZ=OI~F
RL=lOk (Load resistance MOD)
0AMP2 amplifier receiving gain adjustment anti-aliasing filtering eliminate high frequency noise component over 100kHz. gain should less than 30dB. following example order pass filter, which gain 40kHz cut-off frequency. RXINO C1=560PF C2=27pF Rl=lOkQ AMP2
R2=9. R3=100k
0152-E-00
1996,
ASAHI KASEI
[AK2358FI
0AMP3 smoothing filter eliminate 448kHz clock component from EXPOUT signal provided this amplifier. Also works adjust receiving gain. Adding other pass signal possible. following example order low-pass filter, which gain 19kHz cut-off frequency. EXPOUT RXAFIN RXAF AMP3 Cl=150pF C2=0 .022 Rl=R2=56k
OAGNIl stabilizing capacitor stabilize AGND potential, connect capacitors larger than 0.3KF between TACND pin, RAGND AVSS pin. Also between AGNDIN AVSS some capacitor necessary reduce ripple power.
QVDD stabilizing capacitor reduce noise VDD, connect capacitors between VSS.
C1-22,UF
(Aluminium Electrolytic Capacitor) C2-O.l~F (Ceramic Capacitor)
0152-E-00
1996
ASAHI KASEI
[AK2358FI
OCrystal oscillator Crystal resonator resistor capacitors should connected shown Fig.3 on-chip oscillator operation. external clock operation, high(H) level input clock signal amplitude equals greater than 1.5V, low(L) level equals smaller than 0.5V, then connection should made shown Fig.4. input clock signal amplitude (peak-to-peak) equals smaller than equals greater than 200mV, then coupling should illustrated Fig.5.
22pF
XOUT
3.58MHz
22pF
FXIN Fig.4
External clock signal
Fig.3
XOUT
O.Ol#F ~External clock signal
fig.5
OLimit level adjusting resistor limiting level controled externally applying voltage LIMIV pin. Applied voltage should larger than TAGND, then limiting level shown TAGND*Va(V), while voltage between LIMIV TAGND. Keeping LIMIV open provides default limit level. following exampleVDD LIMLV R=50k
0152-E-00
1996/]2 -23-
ASAHI KASEI
[AK2358FI
Marking
[Contents XXXYZ] XXX: Date manufacture Last digit year, week number year digits Production number Assembled place
Shape dimensions package
VSOP
Unit: 7.8%;
IUIUURUUURU[
Note:
0.65
Q@@4L
T-F-
Dimensions marked include residual resin.
0-10"
eriall Resin: Low-stress Lead frame:
epoxy resin
0152-E-00
1996;12
IMPORTANT NOTICE These products andtheir specifications aresubject tochange without notice. Before considering anyuseorapPfiCatiOn, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes noliabili~ forinfringernent ofanypatent, intellectual property, orotherright application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange,
strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life SUppOfl r-maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result IOSS fife significant injury damage person property. critical component whose failure function pedorm reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards pefiormance reliability. responsibility buyer distributor product distributes, disposes otherwise plaCeS product with third party notify that advance above content conditions, buyer distributor agr@eS aSSUMe ally responsibility liability hold harmless from C]aiMS afiSing frOn'1 said product absence such notification.
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