Plastic Fiber Optic Receiver including OS8300 MOST® data sheet 4-

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Plastic Fiber Optic Receiver including OS8300 MOST® data sheet 4-

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Plastic Fiber Optic Receiver including OS8300 MOST®
data sheet 4-pin MOST Optical Receiver (MOR 003) taken preliminary. Samples which delivered before qualification production release engineering samples.
Features
Description
4-pin MOST Optical Receiver (MOR 003) Excellent solution converting high speed data from Plastic Optical Fiber (POF) highly integrated CMOS (OS8300) combined with high speed diode designed receive digital output. 25Mbit/s optical data which bi-phase coded 50Mbaud convert this optical data High speed receiver MBaud compatible data stream. (25Mbit/s data rate) Data Output (Light Logic Function) This high performance, cost, CMOS receiver consists noise transimpedance amplifier Network activity sensing during comparator data path. timer circuit puts ZeroPower Mode (ICC<10µA) part into power mode optical data Activity Status Output received 10µs (typ.). During power mode, Good 650nm sensitivity working diode still being observed activity attenuation range PMMA Fiber detected, OS8300 will resume full power operation cost within 3.5ms (typ.). STATUS-pin indicates modulated light received Applications (Light STATUS low). With STATUS-pin power supply whole MOST device Optical Receiver MOST Systems switched
Bigfoot Receiver
Amplification/Data Slicing/Pulse Width Correction
RX_DATA
Activity Detection STATUS
Actual design status: OS8300 Revision Package type Optical Sensitivity Device marking Date code Data sheet valid since 14-May-01 (calendar week
Preliminary Product Information 14-may-01
Infineon Oasis SiliconSystems
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Maximum Ratings
Parameter Storage Temperature Range Junction Temperature Soldering Temperature (>2.5 from case bottom t5s) Power Dissipation Power Supply Voltage Current Except Power Symbol TSTG PTOT VCCMax II/OMax -0.5 Unit
Recommended Operating Conditions
Parameter Supply Voltage Operating Temperature Range Symbol 4.75 5.25 Unit
data this specification refers operating conditions above, unless otherwise stated.
Optical Signal Characteristics (22.5 MBit MOST Data)
Parameter Maximum Photosensitivity Wavelength (TA=25°C) Photosensitivity Spectral Range (TA=25°C) Smax) Optical Sensitivity Optical overload Symbol Smax Pmax POFF 1100 Unit
Optical receivable power power mode
Optical power data average values when using MOST optical transmitter with peak typical. proposed OptoLyzer4MOST, MOST Optical Network Analyzer, described http://www.oasis.de (with MOST Data @44.1KHz Standard Measuring Equipment running with MBaud (BER 10-7 with 2exp7-1 word length). values determined locking OS8104 Slave-mode signal.
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Preliminary Product Information 14-may-01
Characteristics
Parameter Supply Voltage Level Output Voltage High Level Output Voltage Supply Current Test Conditions 2.4mA 2.4mA Full power mode power mode Symbol 4.75 VCC-1.0 18.5 5.25 Unit
Electrical Characteristics
Parameter Power Supply Rejection Ratio Output Rise Time Output Fall Time Output Pulse Width Variation Output Average Pulse Width Distortion Power-up time detection rising Power-up time from zero power mode Zero Power mode timer delay Test Conditions Power Supply Noise CL=10pF CL=10pF MOST Data 44.1 (-2.-25dBm) MOST Data 44.1 (-2.-25dBm) When part first powers Time from detection inactivity zero power mode Symbol PSRR tTLH tTHL tPWV tAPW tPUO TLPM 15.5 32.8 Unit
With 25pF, rise/ fall increases about Therefore, keep distance from OS8300 MOST chip short possible keeping low. MOST Data 44.1KHz corresponds MBaud data stream. Since OS8300 transmitter used optical source, this link PWV/ APWD, which appears from node node. Optical power data average values when using MOST optical transmitter with peak typical. receiving circuitry receiving data from RX_DATA must powered within 50ms after /STATUS gets active. There must protective resistor 50Ohm (minimum) between RX_DATA receiving circuitry. typical value this resistor 150Ohm.
Preliminary Product Information 14-may-01
Infineon Oasis SiliconSystems
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Typical output signal (TA=25 VCC=5.0
average power, good 10-7 MBaud), PRBS with 2exp7-1 word length
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Preliminary Product Information 14-may-01
Mechanical Design 003: package (cavity interface)
Typical packing delivery reels:
number, production week, component type, given backside laser marking.
Preliminary Product Information 14-may-01 Infineon Oasis SiliconSystems Page
STATUS DATA
Application Circuit:
Place these components close possible their corresponding pins FOT. Values change different light output power LED. This just proposal Rext application. There used also other circuits switch Rext from 30K.
Design Layout rules:
100nF bypass capacitors FOTs must located close possible between pins FOTs. ceramic caps tantalum caps with ESR. Also inductor/ ferrite bead (receiver) -3dB control circuit (transmitter) must placed close possible FOTs. prefer ferrite beads (e.g. type 74279214 Elektronik) since D.C. resistance very low. case other inductors used, D.C. resistance should less than 3Ohm. EMC, ferrite bead should connected power supply, close transmitter receiver. only ferrite bead together receiver transmitter!
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ground connection ground plane recommended (Y-structure). That means ground planes transmitter, receiver shielding must separated. three ground planes should connected together behind bypass capacitors (refer design below). This ground signal should connected directly ground plane MOST controller (e.g. OS8104) power supply layer and/or bottom layer ground layer indicated example below. multi layer design used ground layer must have same ground separation like shown layer! serial resistor data line will also reduce problems. resistor must placed near receiver resistor must placed near MOST controller chip. value depends distance between FOTs MOST chip 5cm) within range 150R. Higher values resistors will increase jitter therefore cause locking problems MOST PLL! signals should routed parallel over long distance, embedded with ground copper, possible. Rext (15K resistor) transmitter used heat dissipation. Therefore there should good connection isolation gaps! Both pins should into copper area (see layout example below).
Layout example:
reference board from OASIS Silicon Systems follows requirements above. schematic very similar example above, does include connection power supply, OS8104 micro controller.
example top- bottom layer (shown below) layout reference design board shows layout around optical receiver transmitter should look like. strongly recommended these examples your design best performance! Note: buffer circuit (IC1), connectors jumpers middle right section schematic used reference board only. They relevant other MOST hardware designs.
Preliminary Product Information 14-may-01
Infineon Oasis SiliconSystems
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Layer with 180° version pigtail:
OS8104 Power Supply
Bottom Layer (seen from side PCB):
OS8104 Power Supply
Bottom Layer: Bottom side positions
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Preliminary Product Information 14-may-01
Other items: shown circuit -3dB attenuation just proposal. other circuitry that double value Rext permitted well. fact that optical average level jumps power control signal (/-3dB) toggled, LOCK/ coding errors occur subsequent device short time. This very critical, since occurs only diagnosis mode. After time 10ms, device should lock again optical attenuation between devices high. signals measured using standard probes (>1M/<10pF). However, signal quality very bad, LOCK signal MOST chip flaky, connecting passive probe signal modify MOST chip's lock behavior either better, worse. capacitance analog probe (usually range 12pF), which causes this behavior shifting phase signal. this case, active probe with capacitance less than recommended. reference test board, which corresponds layout examples above, available Oasis SiliconSystems
Preliminary Product Information 14-may-01
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History Design Specification Status MOST Receiver:
Data Sheet Status Okt.98 May.99, Rev. OS8300 device Revision color comments, cause change, important differences last Status preliminary data sheet samples preliminary data sheet change from package (change from package type 002) Actualization data sheet: Data sheet target specification, first page gives information about status description, difference current revision target specification shown table: sensitivity (final test) storage temperature minimum output jitter/PWD; rise/fall times diagram application circuit; design layout rules layout examples other items history added 002, OS8300 Revision device color green, sensitivity (final test) Optical maximum receivable power power mode. Note regarding toggling DATA_OUT light level pattern
24-Nov-99
01-Mar-00
green
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Preliminary Product Information 14-may-01
Data Sheet Status 21-July-00 OS8300 device Revision color green comments, cause change, important differences last Status review data sheet: data sheet corresponds characterized values! Change name Change package type from Sidelooker Update block diagram Soldering parameters changed according JEDEC JESD22-B106-B Changed table Characteristics Photodiode into Optical Signal Characteristics. Removed user-relevant data PIN-diode Updated values sensitivity, overload opt. power switch ON/OFF. Added note with conditions sensitivity measurement. Modified notes. Updated values current consumption, r/f-times, jitter, PWD, power-up/down times. Modified notes. Updated typ. Output signal -20dBm. Drawing mechanical design with CAI. Added device color: Green. Update Application Circuit. Added point regarding good heat dissipation Changed section Layout Example reference board design (also p.10: Changed last item: test board available OS8300 revision sensitivity -24.5 device color yellow. improved sensitivities, modified notes. Added values max. current pins table 'Maximum Ratings' Updated electrical characteristics, modified notes. Notes added power-on time max. voltage ensure power-on reset function. Updated typ. Output signal -24.5dBm. Coupling fiber: left because package, change device color yellow. Improved sensitivity, change marking. Change Soldering Conditions, improved Sensitivity, modified note. Updated Output signal dBm. Change marking. Update preliminary data sheet section, description, status p.2: Change overload specified values p.3: Update parameters, Changed Jitter definition APWD definition according MOST Specification, Removed Note regarding Power-up problem Update Drawing.
08-Nov-00
yellow
01-Dec-00
silver date code
14-May-01
date code
Preliminary Product Information 14-may-01
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Notes:
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Preliminary Product Information 14-may-01

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