Description T7296 fully integrated line-driver intended (44.736 M

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Description T7296 fully integrated line-driver intended (44.736 M

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T7296 DS3/STS-1/E3 Integrated Line Transmitter
Description
T7296 fully integrated line-driver intended (44.736 Mbits/s), SONET STS-1 (51.84 Mbits/s), (34.368 Mbits/s) applications. designed complement T7295-6 DS3/ SONET STS-1 T7295-1 Integrated Line Receivers. T7296 converts input clock dualrail unipolar data into pulses according AT&T Technical Advisory ITU-T G.703 recommendations. device provides B3ZS (DS3) HDB3 (E3) encoding functions data transmitted line. complementary decoder circuit also included T7296 decoding received signals from external line receiver. Both encoder decoder functions disabled independently with external control pins. receive direction, coding errors bipolar violations detected flagged output pin. On-chip pulse shaper circuitry eliminates need external components line equalization meet cross connect template (DSX-3 STSX-1). system-level trouble shooting testing, both transmit receive loopbacks possible with builtin loopback circuit. T7296 manufactured BiCMOS technology packaged 28-pin, plastic packages. device requires single power supply dissipates maximum power
Fully integrated transmit interface DS3, STS-1, applications Integrated pulse shaping circuit Intended systems which must comply with AT&T CB119, ITU-T G.703, ITU-T G.824, Bellcore TR-NWT-000499, ANSI T1.404 Built-in B3ZS/HDB3 encoder decoder Remote local loopback functions Single power supply
Application
Interface SONET, DS3, network equipment Digital cross connect systems CSU/DSU equipment test equipment Fiber-optic terminals Multiplexer
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Description (continued)
VDDD VDDA GNDD GNDA TAOS ENCODIS TXLEV
TPDATA TNDATA TCLK B3ZS/HDB3 ENCODER
AMP1
TTIP
PULSE SHAPER
AMP2
TRING
DECODIS RNRZ RNEG RPOS RCLK RCLKO DS3, STS-1/E3 LLOOP RLOOP RPDATA RNDATA B3ZS/HDB3 DECODER LOOPBACK DRIVER MONITOR MRING MTIP
5-2140(C)r.5
Figure Block Diagram
Information
RCLK RLOOP LLOOP DS3, STS-1/E3 TAOS VDDD TPDATA TNDATA TCLK GNDD ENCODIS DECODIS RNRZ RNDATA RPDATA TXLEV VDDA TTIP TRING GNDA MTIP MRING RCLKO RPOS RNEG
T7296
5-2141(C)r.4
Figure Diagram
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Information (continued)
Table Descriptions Symbol RCLK RLOOP Type Name/Function Receive Clock Input. Input sampling clock RPDATA RNDATA. Remote Loopback. high this causes RPDATA RNDATA transI mitted line using RCLK. Setting LLOOP RLOOP high simultaneously permitted. Local Loopback. high this causes TPDATA TNDATA pass through encoder output RPOS RNEG, respectively. Setting LLOOP RLOOP high simultaneously permitted. DS3, STS-1, Select. high this selects STS-1 operation sets encoder decoder B3ZS mode. selects operation sets encoder decoder HDB3 mode. Transmit Select. high this causes continuous all-1s pattern transmitted line. frequency determined TCLK. Digital Supply (±5%). logic circuitry. Transmit Positive Data. TPDATA sampled falling edge TCLK. Pins tied together binary input signals. Transmit Negative Data. TNDATA sampled falling edge TCLK. Pins tied together binary input signals. Transmit Clock TPDATA TNDATA. Digital Ground. logic circuitry. Encoder Disable. high this disables B3ZS HDB3 encoding functions, unless overridden TAOS request. ENCODIS high TPDATA TNDATA already encoded. Decoder Disable. high this disables B3ZS HDB3 decoding functions. Bipolar Violation Output. This goes high period when bipolar violation coding error corresponding appropriate coding rule detected RPDATA/RNDATA signals. Receive Binary Data. signal this ORed-output RPOS RNEG. Receive Negative Data. This signal decoded version RNDATA.* Receive Positive Data. This signal decoded version RPDATA.* Receive Clock Output. This signal inverted version RCLK. Driver Monitor Output. transmitted signal present MTIP MRING TCLK clock periods, goes high until next signal detected. Monitor Ring Input. signal from TRING connected this line driver failure detection. Internally pulled high. Monitor Input. signal from TTIP connected this line driver failure detection. Internally pulled high. Analog Ground. analog circuitry. Transmit Ring Output. Transmit signal driven line transformer from this pin. Transmit Output. Transmit signal driven line transformer from this pin. Analog Supply (±5%). analog circuitry.
LLOOP
DS3, STS-1/E3
TAOS VDDD TPDATA TNDATA TCLK GNDD ENCODIS
DECODIS
RNRZ RNEG RPOS RCLKO
MRING MTIP GNDA TRING TTIP VDDA
bipolar violation occurs, RPOS RNEG correspond decoded versions RPDATA RNDATA, respectively. DECODIS high, RPOS RNEG always track RPDATA RNDATA, respectively. Note: Pins with designation have internal pull-up.
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Information (continued)
Table Descriptions (continued) Symbol TXLEV Type Name/Function Transmit Level Select. output signal amplitude TTIP TRING varied setting this high low. When cable length greater than ft., TXLEV should high. When below ft., should low. This active only when DS3, STS-1/E3 input (pin high (DS3, STS-1 mode). In-Circuit Testing (Active-Low). this causes digital analog outputs into high-impedance state allow in-circuit testing. Internally pulled high. Receive Positive Data. input data decoder block. Sampled falling edge RCLK. Receive Negative Data. input data decoder block. Sampled falling edge RCLK.
RPDATA RNDATA
bipolar violation occurs, RPOS RNEG correspond decoded versions RPDATA RNDATA respectively. DECODIS high, RPOS RNEG always track RPDATA RNDATA, respectively. Note: Pins with designation have internal pull-up.
Overview
T7295-6 0.01
728A CABLE
SHIELD BEAD*
RCLK RLOOP LLOOP DS3,STS-1/E3 TAOS
RNDATA RPDATA TXLEV VDDA TTIP TRING GNDA MTIP MRING RCLKO RPOS RNEG
728A CABLE
VDDD TPDATA
FROM SYSTEM
TNDATA TCLK GNDD ENCODIS DECODIS RNRZ
SYSTEM
5-2142(C)r.8
Shield bead FairRite 2643000101 equivalent. Output transformer Pulse PE-65966 (through-hole) PE-65967 (surface mount) equivalent. FairRite registered trademark FairRite Products Corporation. Pulse Engineering registered trademark Pulse Engineering, Inc. Note: Lucent Technologies does endorse assume liability bead transformer.
Figure T7296 Application Mode, Less Than Feet Cable Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
B3ZS/HDB3 Decoder decoder block included perform B3ZS HDB3 decoding determined state DS3, STS-1/E3 pin. B3ZS format, decoder detects both codes replaces them with data. HDB3 decoding selected setting DS3, STS-1/E3 low, B00V 000V codes detected replaced with 0000 code. both cases, bipolar violation coding errors that conform coding scheme detected indicated output pin. Decoder Disable testing purposes applications where decoder needs bypassed, decoder disabled setting DECODIS high. this mode, bipolar violation pulses indicated pin. Bipolar Violation Detection goes high period when code error bipolar violation corresponding appropriate coding rule detected RPDATA/ RNDATA signal. violation pulse always removed from decoder outputs RPOS/RNEG when DECODIS low. Pulse Shaper
Overview (continued)
System Description
B3ZS/HDB3 Encoder Data transmitted input encoder block encoded either B3ZS HDB3 determined state DS3, STS-1/E3 pin. Input data format unipolar binary. binary signals, TPDATA TNDATA need connected together externally. line code used B3ZS. this mode, each block three consecutive zeros removed replaced codes that contain bipolar violations. These replacement codes 00V, where indicates pulse conforming with bipolar rule, represents pulse violating rule. choice these codes made such that number pulses will transmitted between consecutive bipolar violation (BPV) pulses. format, line code HDB3. encoding rule HDB3 similar B3ZS except that number consecutive zeros increased four before code replacement take place. replacement codes this case 000V B00V. STS-1 operation achieved placing part mode using 51.84 clocks. Logic operation STS-1 same DS3. Transmit Select Setting TAOS high causes continuous encoded transmitted line. this mode, input TPDATA TNDATA ignored. remote loopback (RLOOP) high, TAOS request ignored. Remote Loopback Setting RLOOP high causes received RPDATA RNDATA transmitted line through TTIP TRING. data rate determined RCLK. this mode, TPDATA TNDATA ignored. Local Loopback Setting LLOOP high causes TPDATA TNDATA through both encoder decoder. this mode, signals transmitted RCLKO, RPOS, RNEG correspond those received TCLK, TPDATA, TNDATA, respectively. TPDATA TNDATA transmitted line unless overridden TAOS request. Setting both RLOOP LLOOP high simultaneously permitted.
pulse shaper circuit uses combination filters slew-rate control techniques preshape pulse transmitted line. amplitude transmit pulse adjusted using TXLEV (transmit level) pin. When distance cross connect exceeds ft., TXLEV should high. When distance less than ft., TXLEV should low. Setting TXLEV high enables transmitter send nominal peak pulse. Setting TXLEV enables transmitter send nominal peak pulse. state TXLEV effect operation. Driver Monitor Using TTIP TRING inputs, driver monitor detects driver failure monitoring activities MTIP MRING. signal detected these pins TCLK cycles, high until next signal detected.
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Signal Requirements
operation, pulse characteristics specified DSX-3, which interconnection test point referred cross connect. cross connect exists point where transmitted signal reaches distribution frame jack. T7296 transmit through 728A cable DSX-3 mode. Table lists signal requirements. Currently, isolated pulse template requirements exist: ANSI TI.404 pulse template (see Table Figure Bellcore TR-NWT-000499 pulse template (see Table Figure pulse transmitted T7296 meets these templates. Table DSX-3 Interconnection Specification Parameter Line Rate Line Code Test Load Pulse Shape Specification 44.736 Mbits/s ppm. Bipolar with three-0 substitution (B3ZS). isolated pulse must template Figure Figure pulse amplitude scaled constant factor template. pulse amplitude must between 0.36 0.85 measured center pulse. all-1s transmitted pattern, power 22.368 0.002 must -1.8 +5.7 dBm, power 44.736 0.002 must -21.8 -14.3 dBm.
Power Level
pulse template G.703 shown Figure specified Table proposed G.703 further states that voltage time slot containing zero must exceed peak pulse amplitude, except residue preceding pulses. power levels specified proposed G.703 identical except that power measured bands. all-1s pattern must pure all-1s signal, without framing other control bits.
Table DSX-3 Pulse Template Boundaries ANSI TI.404 (See Figure Lower Curve Time -0.36 -0.36 +0.36 +0.36
NORMALIZED AMPLITUDES -0.2 -1.0
Upper Curve Time -0.68 -0.68 +0.36 +0.36 Equation +0.03
0.34
Equation -0.03
0.03 0.18
0.03
-0.03
0.05 0.407e-1.84[T 0.36]
-0.5
TIME SLOTS-NORMALIZED PEAK LOCATION
5-1242(C)r.4
Figure DSX-3 Isolated Pulse Template ANSI T1.404 Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Signal Requirements (continued)
Table DSX-3 Pulse Template Boundaries Bellcore TR-NWT-000499 (See Figure Lower Curve Time -0.85 -0.36 -0.36 +0.36 +0.36 +1.4 Equation -0.03
0.03 0.18
Upper Curve Time -0.85 -0.68 -0.68 +0.36 +0.36 +1.4 Equation +0.03
0.03 0.34
-0.03
0.08 0.407e-1.84[T 0.36]
NORMALIZED AMPLITUDES -0.2 -1.0
-0.5
TIME SLOTS-NORMALIZED PEAK LOCATION
5-3755(C).a
Figure DSX-3 Isolated Pulse Template Bellcore TR-NWT-000499
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
STS-1 Signal Requirements STSX-1
STS-1 operation, pulse characteristics specified STSX-1, which interconnection test point referred cross connect. cross connect exists point where transmitted signal reaches distribution frame jack. T7296 transmit through 728A cable STSX-1 STS-1 mode. isolated pulse template specified ANSI T1.102 standards (see Figure pulse transmitted T7296 meets this template. Table STSX-1 Interconnection Specification Parameter Line Rate Line Code Test Load Power Levels Specification 51.84 Mbits/s. Bipolar with three-0 substitution (B3ZS). wide-band power level measurement STSX-1 interface using low-pass filter with cutoff frequency least within -2.7 dBm.
Table Pulse Template Boundaries ANSI T1.102 (See Figure Lower Curve Time -0.85 -0.38 -0.38 +0.36 +0.36 +1.4 Equation -0.03
0.03 0.18
Upper Curve Time -0.85 -0.68 -0.68 +0.26 +0.26 +1.4 Equation +0.03
0.03 0.34
-0.03
0.61e-2.4[T 0.26]
NORMALIZED AMPLITUDES -0.2 -1.0
-0.5
TIME SLOTS-NORMALIZED PEAK LOCATION
5-3755(C)r.1
Figure STSX-1 Isolated Pulse Template ANSI T1.102
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Signal RequirementFor operation, pulse characteristics defined below. Table lists signal requirements, Figure illustrates isolated pulse template requirements specified ITU-T recommendation G.703. pulse transmitted T7296 meets this template. Table Pulse Specifications Value marks valid signal must conform with mask (see Figure regardless sign. Test Load Impedance resistive. Nominal Peak Voltage Mark (pulse) Peak Voltage Space pulse) Nominal Pulse Width 14.55 Ratio Amplitudes Positive Negative Pulses 0.95 1.05. Center Pulse Interval Ratio Widths Positive Negative Pulses 0.95 1.05. Nominal Half-Amplitude Parameter Pulse Shape (nominally rectangular)
(14.55 2.45) 8.65 (14.55 5.90)
NOMINAL PULSE 14.55
12.1 (14.55 2.45)
24.5 (14.55 9.95)
29.1 (14.55 14.55)
5-2638(C)r.5
Figure Isolated Pulse Template G.703 Standard
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Absolute Maximum RatingStresses excess absolute maximum ratings cause permanent damage device. These absolute stress ratings only. Functional operation device implied these other conditions excess those given operational sections data sheet. Exposure absolute maximum ratings extended periods adversely affect device reliability. Parameter Power Supply Storage Temperature Power Dissipation Plastic Package Power Dissipation Plastic Package Input Voltage (any pin) Input Current (any pin) Symbol Tstg Pdiss Pdiss -0.5 -0.5 Unit
Handling PrecautionAlthough protection circuitry been designed into this device, proper precautions should taken avoid exposure electrostatic discharge (ESD) during handling mounting. Lucent Technologies Microelectronics Group employs human-body model (HBM) charged-device model (CDM) ESD-susceptibility testing protection design evaluation. voltage thresholds dependent circuit parameters used define model. industry-wide standard been adopted CDM. standard (resistance 1500 capacitance widely accepted used comparison. threshold presented here obtained using these circuit parameters: Threshold Device Voltage T7296 >2000
Electrical CharacteristicTest conditions: unless otherwise specified. Table Electrical Characteristics Parameter Supply Voltage Supply Current* Input Voltage Input High Voltage Output Voltage: Iout -4.0 Output High Voltage: Iout Input Leakage Current (all pins except MRING, MTIP ICT) Input Leakage Current (MRING, MTIP pins Input Capacitance Load Capacitance Symbol VDDD, VDDA 4.75 0.7VDDD GNDD VDDD Unit 5.25 VDDD VDDD -150
Supply current measured with transmitter sending all-1s signal with transmit level (TXLEV) high.
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Timing CharacteristicTest conditions: unless otherwise specified. timing characteristics measured with loading. Table Timing Specifications Symbol tTSU tTHO tTDY tRSU tRHO tRDY Parameter TCLK Clock Duty Cycle (DS3/STS-1) TCLK Clock Duty Cycle (E3) TCLK Clock Rise Time (10% 90%) TCLK Clock Fall Time (90% 10%) Setup Time: TPDATA/TNDATA TCLK Falling Hold Time: TCLK Falling TPDATA/TNDATA Propagation Delay: TCLK Rising TTIP/TRING* RCLK Clock Duty Cycle RCLK Clock Rise Time (10% 90%) RCLK Clock Fall Time (90% 10%) Setup Time: RPDATA/RNDATA RCLK Falling Hold Time: RCLK Falling RPDATA/RNDATA RCLKO Clock Rise Time (10% 90%) RCLKO Clock Fall Time (90% 10%) Propagation Delay: RCLKO Rising RPOS/RNEG/RNRZ Unit
When encoder enabled, handling delay four half TCLK clock cycles B3ZS five half clock cycles HDB3 always exists between TPDATA/TNDATA TTIP/TRING. handling delay reduced clock cycles when encoder disabled. When decoder enabled, handling delay half RCLK clock cycles always exists between RPDATA/RNDATA RPOS/ RNEG/RNRZ. handling delay reduced half RCLK clock cycles when decoder disabled.
TCLK tTSU TPDATA TNDATA tTDY TTIP TRING tTHO
5-3587(C)r.1
Figure Transmit System-Side Timing Diagram
RCLK tRSU RPDATA RNDATA
5-3588(C)r.1
tRHO
Figure Receive Line-Side Timing Diagram Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Timing Characteristics (continued)
RCLKO tRDY RPOS/RNEG RNRZ
5-3589(C)r.1
Figure Receive System-Side Timing Diagram
RPDATA
RNDATA
RPOS
RNEG
RNRZ
CORRESPONDING CODING RULE
CORRESPONDING CODING RULE
CODING ERROR
5-3590(C)r.1
Note: delay from RPDATA/RNDATA RPOS/RNEG/RNRZ shown this figure.
Figure Example Bipolar Violations B3ZS Mode
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Outline Diagram28-Pin, Plastic
Dimensions millimeters.
IDENTIFIER ZONE
SEATING PLANE 0.38 2.54 0.58
5-4410.R1
Number Pins
Package Dimensions (DIP) Maximum Length 37.34 Maximum Width Without Leads 13.97 Maximum Width Including Leads 15.49 Maximum Height Above Board 5.59
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
Outline Diagrams (continued)
28-Pin, Plastic
Dimensions millimeters.
IDENTIFIER ZONE
SEATING PLANE 0.10 1.27 0.51 0.79
5-4413.R4
Number Pins
Package Dimensions (SOJ) Maximum Length 18.03 Maximum Width Without Leads 7.62 Maximum Width Including Leads 8.81 Maximum Height Above Board 3.18
Ordering Information
Device Code 7296 7296 Package 28-Pin, Plastic 28-Pin, Plastic Temperature Comcode (Ordering Number) 106932056 106932064
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
ITU-T International Telecommunication UnionTelecommunication Sector Place Nations 1211 Geneve Switzerland Tel: 41-22-730-5285 FAX: 41-22-730-5991 (Japan): Standard Publishing Group Telecommunications Technology Committee Floor, Hamamatsucho Suzuki Building, 2-11, Hamamatsu-cho, Minato-ku, Tokyo Tel: 81-3-3432-1551 FAX: 81-3-3432-1553
Standards Documentation
Telecommunication technical standards reference documentation obtained from following sources: ANSI (U.S.A.): American National Standards Institute (ANSI) West 42nd Street York, 10036 Tel: 212-642-4900 FAX: 212-302-1286 AT&T Publications: AT&T Customer Information Center (CIC) Tel: 800-432-6600 FAX: 800-566-9568 U.S.A.) 317-322-6484 (outside U.S.A.) Bellcore (U.S.A.): Bellcore Customer Service Corporate Place Piscataway, 08854 Tel: 800-521-CORE U.S.A.) Tel: 908-699-5800 FAX: 908-336-2559
Lucent Technologies Inc.
T7296 DS3/STS-1/E3 Integrated Line Transmitter
DS00-143PDH Replaces DS97-039TIC Incorporate Following Update1. Page description TXLEV Figure changed Page Pulse Shaper section, changed Page Ordering Information section, corrected number pins plastic package
additional information, contact your Microelectronics Group Account Manager following: INTERNET: http://www.lucent.com/micro E-MAIL: docmaster@micro.lucent.com AMERICA: Microelectronics Group, Lucent Technologies Inc., Union Boulevard, Room 30L-15P-BA, Allentown, 18103 1-800-372-2447, 610-712-4106 CANADA: 1-800-553-2448, 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 8833, (65) 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Fong Universe Building, 1800 Zhong Shan Road, Shanghai 200233 China Tel. (86) 6440 0468, ext. 316, (86) 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 5421 1600, (81) 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 368, (44) 1189 Technical Inquiries: GERMANY: (49) 95086 (Munich), UNITED KINGDOM: (44) 1344 (Ascot), FRANCE: (33) (Paris), SWEDEN: (46) (Stockholm), FINLAND: (358) 4354 2800 (Helsinki), ITALY: (39) 6608131 (Milan), SPAIN: (34) 1441 (Madrid)
Lucent Technologies Inc. reserves right make changes product(s) information contained herein without notice. liability assumed result their application. rights under patent accompany sale such product(s) information.
Copyright 2000 Lucent Technologies Inc. Rights Reserved
February 2000 DS00-143PDH (Replaces DS97-039TIC)

Description T7296 fully integrated line-driver intended (44.736 M

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