SRAM-Based Devices December 2002, ver. 12.2 Features Se

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SRAM-Based Devices December 2002, ver. 12.2 Features Se

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Configuration Devices
SRAM-Based Devices
December 2002, ver. 12.2
Features
Serial device family configuring APEXII, APEX (including APEX 20K, APEX 20KC, APEX 20KE), MercuryTM, ACEX® FLEX® (FLEX 6000, FLEX 10KE, FLEX 10KA) devices Easy-to-use 4-pin interface APEX APEX 20K, Mercury, ACEX, FLEX devices current during configuration near-zero standby current 5.0-V 3.3-V operation Software design support with Altera® Quartus® MAX+PLUS® development systems Windows-based well SPARCstation, 9000 Series 700/800 Programming support with Altera's Master Programming Unit (MPU) programming hardware from Data I/O, Microsystems, other manufacturers Available compact plastic packages (see Figures 8-pin plastic dual in-line package (PDIP) 20-pin plastic J-lead chip carrier (PLCC) package 32-pin plastic thin quad flat pack (TQFP) package 100-pin plastic thin quad flat pack (TQPF) package 88-pin Ultra FineLine BGApackage EPC2 device reprogrammable Flash configuration memory 5.0-V 3.3-V in-system programmability (ISP) through built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1 circuitry compatible with IEEE Std. 1532 EPC2 configuration device Supports programming through Serial Vector Format Files (.svf), JamStandard Test Programming Language (STAPL) Files (.jam), STAPL Byte-Code Files (.jbc), MAX+PLUS software MasterBlasterTM, ByteBlasterMVTM, BitBlasterdownload cable nINIT_CONF allows JTAG instruction initiate device configuration programmed with Programmer Object Files (.pof) EPC1 EPC1441 devices Available 20-pin PLCC 32-pin TQFP packages
Altera Corporation
DS-EPROM-12.2
Configuration Devices SRAM-based Devices Data Sheet
EPC4, EPC8, EPC16 configuration devices have reprogrammable Flash configuration memory with density 16,000,000 32,000,000 bits with compression feature these devices.
detailed information configuration devices, refer Enhanced Configuration Devices (EPC4, EPC8, EPC16) Data Sheet. Note
N.C. N.C. N.C.
Figure EPC1, EPC1441, EPC1213, EPC1064, EPC1064V Package Pin-Out Diagrams
DATA N.C. N.C.
N.C.
DATA N.C. N.C. N.C.
N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C.
DCLK N.C.
DCLK
DATA DCLK nCASC
N.C. N.C. N.C. N.C.
N.C. N.C. N.C. N.C.
N.C. N.C. N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
nCASC
8-Pin PDIP EPC1 EPC1441 EPC1213 EPC1064 EPC1064V
Notes Figure
20-Pin PLCC EPC1 EPC1441 EPC1213 EPC1064 EPC1064V
32-Pin TQFP EPC1441 EPC1064 EPC1064V
EPC1, EPC1441, EPC1213, EPC1064 devices one-time programmable devices. programming available these devices because they have JTAG pins. nCASC available EPC1 EPC1213 devices. EPC1064, EPC1064V, EPC1441 devices, reserved should connected.
Altera Corporation
N.C.
Configuration Devices SRAM-Based Devices
Figure EPC2 Package Pin-Out Diagrams
DATA
N.C.
N.C.
N.C.
DATA
N.C.
N.C. N.C. N.C. N.C. N.C. N.C. VPPSEL
DCLK VCCSEL
DCLK VCCSEL N.C. N.C.
N.C. N.C. N.C. VPPSEL
N.C. N.C. N.C. N.C.
nINIT_CONF nCASC
N.C.
N.C.
N.C.
nCASC
20-Pin PLCC
32-Pin TQFP
Functional Description
With SRAM-based devices, configuration data must reloaded each time system initializes, when configuration data needed. Altera configuration devices store configuration data SRAM-based APEX APEX 20K, Mercury, ACEX, FLEX devices. Table lists Altera configuration devices. Table Configuration Devices Device
EPC16 EPC8 EPC4 EPC2 EPC1 EPC1441 EPC1213 EPC1064 EPC1064V Note Table
These devices one-time programable.
Description
16,000,000 with 3.3-V operation 8,000,000 with 3.3-V operation 4,000,000 1-bit device with 3.3-V operation 1,695,680 1-bit device with 5.0-V 3.3-V operation 1,046,496 1-bit device with 5.0-V 3.3-V operation 440,800 1-bit device with 5.0-V 3.3-V operation 212,942 1-bit device with 5.0-V operation 65,536 1-bit device with 5.0-V operation 65,536 1-bit device with 3.3-V operation
Altera Corporation
nINIT_CONF
Configuration Devices SRAM-based Devices
Table lists configuration device used with each APEX APEX 20K, Mercury, ACEX FLEX device. Table Configuration Devices Used Each APEX APEX 20K, Mercury, ACEX FLEX Device (Part Family
APEX (1.5
Device
EP2A15 EP2A25 EP2A40 EP2A70
Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (Bits) EPC1064V
4,714,000 6,276,000 9,612,000 17,390,000 1,297,000 4,383,000 1,964,000 3,901,000 5,564,000 8,938,000 347,000 641,000 1,009,000 1,523,000 1,964,000 2,733,000 3,901,000 5,564,000 8,938,000 985,000 1,950,000 3,878,000 178,000 470,000 785,000 1,337,000
Mercury (1.8
EP1M120 EP1M350
APEX 20KC EP20K200C (1.8 EP20K400C EP20K600C EP20K1000C APEX 20KE EP20K30E (1.8 EP20K60E EP20K100E EP20K160E EP20K200E EP20K300E EP20K400E EP20K600E EP20K1000E APEX (2.5 EP20K100 EP20K200 EP20K400 ACEX (2.5 EP1K10 EP1K30 EP1K50 EP1K100
EP20K1500E 12,011,000
Altera Corporation
Configuration Devices SRAM-Based Devices
Table Configuration Devices Used Each APEX APEX 20K, Mercury, ACEX FLEX Device (Part Family Device Data Size EPC1064 EPC1213 EPC1441 EPC1 EPC2 EPC4 EPC8 EPC16 (Bits) EPC1064V
470,000 785,000 785,000 1,336,000 1,840,000 2,757,000 2,757,000 120,000 402,000 621,000 1,200,000 1,582,000 3,292,000 118,000 231,000 376,000 498,000 621,000 893,000 1,200,000 260,000 260,000
FLEX 10KE EPF10K30E (2.5 EPF10K50E EPF10K50S EPF10K100E EPF10K130E EPF10K200E EPF10K200S FLEX 10KA EPF10K10A (3.3 EPF10K30A EPF10K50V EPF10K100A EPF10K130V EPF10K250A FLEX (5.0 EPF10K10 EPF10K20 EPF10K30 EPF10K40 EPF10K50 EPF10K70 EPF10K100 FLEX 6000/A (3.3 EPF6010A EPF6016 (5.0 EPF6016A EPF6024A FLEX 8000A (5.0 EPF8282A EPF8282AV (3.3 EPF8452A EPF8636A EPF8820A EPF81188A EPF1500A
EPF10K100B 1,2000,000
398,000 40,000
64,000 96,000 128,000 192,000 250,000
Altera Corporation
Configuration Devices SRAM-based Devices
Figure shows configuration device block diagram. Figure Configuration Device Block Diagram
(except FLEX 8000) Configuration Using EPC2, EPC1, EPC1441
DCLK Address Counter
Oscillator
nRESET
Oscillator Control Error Detection Circuitry
Address
Decode Logic nCASC
EPROM Array DATA Shift Register DATA
FLEX 8000 Device Configuration Using EPC1, EPC1441, EPC1213, EPC1064, EPC1064V
DCLK nRESET Address Counter
Address EPROM Array DATA Shift Register
Decode Logic nCASC
DATA
Notes Figure
EPC2 devices configure FLEX 6000 devices. EPC1441, EPC1064, EPC1064V devices support data cascading. EPC2, EPC1, EPC1213 devices support data cascading. bidirectional open-drain pin.
Altera Corporation
Configuration Devices SRAM-Based Devices
Device Configuration
control signals configuration devices-nCS, DCLK- interface directly with APEX APEX 20K, Mercury, ACEX FLEX device control signals. APEX APEX 20K, Mercury, ACEX FLEX devices configured configuration device without requiring external intelligent controller. configuration device's pins control tri-state buffer DATA output pin, enable address counter (and oscillator EPC4, EPC16, EPC2, EPC1, EPC1441 devices). When driven low, configuration device resets address counter tristates DATA pin. controls output configuration device. held high after reset pulse, counter disabled DATA output tri-stated. When driven low, counter DATA output enabled. When driven again, address counter reset DATA output tri-stated, regardless state nCS. EPC4, EPC8, EPC16, EPC2, EPC1, EPC1441 devices determine operation mode whether APEX 20K, Mercury, ACEX FLEX 10K, FLEX 8000, FLEX 6000 protocols should used when driven high.
When configuration device driven data driven nCASC low, device tri-states DATA avoid contention with other configuration devices. EPC2 device allows user initiate configuration additional pin, nINIT_CONF, that tied nCONFIG PLD(s) configured. JTAG instruction causes EPC4, EPC8, EPC16, EPC2 device drive nINIT_CONF low, which turn pulls nCONFIG low. EPC4, EPC8, EPC16, EPC2 device then drives nINIT_CONF high start configuration. When JTAG state machine exits this state, nINIT_CONF releases nCONFIG configuration initiated. EPC4, EPC8, EPC16, EPC2 device programmed with generated EPC1 EPC1441 device, however, EPC2 device cannot configure FLEX 6000 FLEX 8000 devices. EPC1 device programmed using generated EPC1441 device.
Altera Corporation
Configuration Devices SRAM-based Devices
APEX APEX 20K, Mercury, ACEX FLEX FLEX 6000 Device Configuration
APEX 20K, Mercury, ACEX FLEX devices configured with EPC4, EPC8, EPC16, EPC2, EPC1, EPC1441 devices. FLEX 6000 devices configured with EPC1 EPC1441 devices. APEX devices configured with EPC2, EPC4, EPC8, EPC16 devices. EPC4, EPC8, EPC16, EPC2, EPC1, EPC1441 device stores configuration data EPROM array serially clocks data with internal oscillator. nCS, DCLK pins supply control signals address counter output tri-state buffer. configuration device sends serial bitstream configuration data DATA pin, which routed DATA0 DATA input LUT-based device. Figure shows LUT-based configured with single EPC2, EPC1, EPC1441 device.
Altera Corporation
Configuration Devices SRAM-Based Devices
Figure ACEX APEX 20K, APEX FLEX 10K, FLEX 6000, Mercury Device Configured with EPC2, EPC1, EPC1441 Configuration Device Note
APEX ACEX Mercury, APEX 20KC, APEX FLEX Devices
LUT-Based
DCLK DATA0 nSTATUS CONF_DONE nCONFIG nCEO MSEL0 MSEL1 APEX 20KE Devices
Configuration Device
DCLK DATA nINIT_CONF
VCCINT
APEX 20KE
DCLK DATA0 nSTATUS CONF_DONE nCONFIG
Configuration Device
DCLK DATA nINIT_CONF
nCEO MSEL0 MSEL1
Notes Figure
EPC2 devices configure FLEX 6000 devices. pull-up resistor should connected same supply voltage configuration device. pull-up resistors APEX 20KE pull resistors nCS, nINIT_CONF pins EPC2, EPC4, EPC8, EPC16 devices have internal, user-configurable pull-up resistors. internal pull-up resistors used, external pull-up resistors should used these pins. Quartus software uses internal pull-up resistors default. turn internal pull-up resistors, check Disable pull-ups configuration device option when generating programming files. diagram shows APEX APEX 20K, Mercury, ACEX FLEX device, which MSEL0 MSEL1 tied ground. FLEX 6000 devices, MSEL tied ground, DATA0 named DATA. EPC4, EPC8, EPC16, EPC2 configuration devices cannot used with FLEX 6000 devices. other connections same APEX APEX 20K, Mercury, ACEX FLEX devices. nINIT_CONF only available EPC2, EPC4, EPC8, EPC16 devices internal pull that always active. nINIT_CONF available used, nCONFIG must pulled either directly through resistor. nCEO left unconnected. ensure successful configuration between APEX 20KE configuration devices possible power-up sequences, pull nCONFIG VCCINT. This diagram APEX 20KE devices only. isolate 1.8-V 3.3-V power supplies when configuration APEX 20KE devices, diode between APEX 20KE device's nCONFIG configuration device's nINIT_CONF pin. Select diode with threshold voltage (VT) less than equal diode will make nINIT_CONF open-drain pin; will only able drive tri-state.
Altera Corporation
Configuration Devices SRAM-based Devices
Table describes EPC2, EPC1, EPC1441 functions during APEX APEX 20K, Mercury, ACEX FLEX device configuration. information EPC4, EPC8, EPC16 devices, refer Enhanced Configuration Devices (EPC4, EPC8, EPC16) Data Sheet. Table EPC2, EPC1, EPC1441 Functions During APEX APEX 20K, Mercury, ACEX FLEX FLEX 6000 Configuration (Part Notes (1), Name Number 8-Pin PDIP
DATA
20-Pin 32-Pin PLCC TQFP
Type
Description
Output
Serial data output. DATA tri-stated before configuration when high, after configuration device finishes sending configuration data. This operation independent device's position cascade chain. DCLK clock output when configuring with single configuration device when configuration device first device configuration device chain. DCLK clock input subsequent configuration devices configuration device chain. Rising edges DCLK increment internal address counter present next data DATA pin. counter incremented only input held high, input held low, configuration data been transferred target device. When configuring with first EPC2 EPC1 device configuration device chain with single EPC1441 device, DCLK drives after configuration complete when low. Output enable (active high) reset (active low). logic level resets address counter. high logic level enables DATA permits address counter count. this (reset) during configuration, internal oscillator becomes inactive DCLK drives low. "Error Detection Circuitry" page Chip select input (active low). input allows DCLK increment address counter enables DATA drive out. EPC1 EPC2 reset with low, device initializes first device configuration chain. EPC1 EPC2 device reset with high, device initializes subsequent device chain.
DCLK
OpenDrain
Input
Altera Corporation
Configuration Devices SRAM-Based Devices
Table EPC2, EPC1, EPC1441 Functions During APEX APEX 20K, Mercury, ACEX FLEX FLEX 6000 Configuration (Part Notes (1), Name Number 8-Pin PDIP
nCASC
20-Pin 32-Pin PLCC TQFP
Type
Description
Output
Cascade select output (active low). This output goes when address counter reached maximum value. chain EPC1 EPC2 devices, nCASC device connected next device, which permits DCLK clock data from next EPC1 EPC2 device chain. Allows INIT_CONF JTAG instruction initiate configuration. This connected nCONFIG device initiate configuration from EPC2 JTAG instruction. multiple EPC2 devices used configure ACEX, APEX, FLEX Mercury device, only first EPC2 nINIT_CONF tied device's nCONFIG pin. JTAG data input pin. Connect this JTAG circuitry used. JTAG data output pin. connect this JTAG circuitry used. JTAG mode select pin. Connect this JTAG circuitry used. JTAG clock pin. Connect this ground JTAG circuitry used. Mode select supply. VCCSEL must connected ground device uses 5.0-V power supply (i.e., VCCSEL must connected device uses 3.3-V power supply (i.e., Mode select VPP. VPPSEL must connected ground uses 5.0-V power supply (i.e., VPPSEL must connected uses 3.3-V power supply (i.e, Programming power pin. EPC2 device, this normally tied VCC. EPC2 tied improve in-system programming times. EPC1 EPC1441 devices, must tied VCC.
nINIT_CONF (5),
OpenDrain Output
VCCSEL
Input Output Input Input Input
VPPSEL
Input
Power
Altera Corporation
Configuration Devices SRAM-based Devices
Table EPC2, EPC1, EPC1441 Functions During APEX APEX 20K, Mercury, ACEX FLEX FLEX 6000 Configuration (Part Notes (1), Name Number 8-Pin PDIP
20-Pin 32-Pin PLCC TQFP
Type
Description
Power
Power pin.
Ground Ground pin. 0.2-µF decoupling capacitor must placed between pins.
Notes Table
EPC2 devices configure FLEX 6000 devices. Pin-out information EPC8 EPC16 configuration devices, please refer each respective data sheet. This package available EPC1 EPC1441 devices only. This package available EPC2 EPC1441 devices only. nCS, nINIT_CONF pins EPC2 devices have internal, user-configurable pull-up resistors. internal pull-up resistors used, external pull-up resistors should used these pins. EPC1441 device does support data cascading. EPC2 EPC1 devices support data cascading. This applies EPC2 device only.
APEX APEX 20K, Merucry, ACEX FLEX FLEX 6000 Device Configuration with Multiple EPC2 EPC1 Configuration Devices
When configuration data APEX APEX 20K, Mercury, ACEX FLEX devices exceeds capacity single EPC2 EPC1 configuration device, multiple EPC2 EPC1 devices cascaded together. multiple EPC2 EPC1 devices required, nCASC pins provide handshaking between devices. EPC8 EPC16 configuration devices cannot cascaded together. EPC1441 device does support data cascading.
Altera Corporation
Configuration Devices SRAM-Based Devices
When configuring APEX APEX 20K, Mercury, ACEX FLEX devices with cascaded EPC2 EPC1 devices, position EPC2 EPC1 device chain determines operation. Similarly, when configuring FLEX 6000 devices with cascaded EPC1 devices, position EPC1 device chain determines operation. When first master device configuration device chain powered-up reset driven low, master device controls configuration. master device supplies clock pulses more LUT-based PLDs subsequent slave devices during configuration. master EPC2 EPC1 device also provides first stream data LUT-based during multi-device configuration. After master EPC2 EPC1 device finishes sending configuration data, master EPC2 EPC1 device drives nCASC low, which drives first slave EPC2 EPC1 device low. This action causes slave EPC2 EPC1 device send configuration data LUT-based PLDs. master EPC2 EPC1 device clocks subsequent slave devices until configuration complete. Once configuration data transferred master EPC2 EPC1 device driven high LUTbased PLD's CONF_DONE pin, master EPC2 EPC1 device clocks additional cycles initialize LUT-based PLD(s). master EPC2 EPC1 device then goes into zero-power (idle) state. master EPC2 EPC1 device driven high before configuration data transferred, driven high after configuration data transferred, master EPC2 EPC1 device drives APEX 20K, Mercury, ACEX FLEX device's nSTATUS low, indicating configuration error. Configuration automatically restarts project compiled with Auto-Restart Configuration Frame Error option turned MAX+PLUS software's Global Project Device Options dialog (Assign menu). Figure shows APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 device configured with EPC2 EPC1 devices. Additional EPC2 EPC1 devices added connecting nCASC subsequent slave EPC2 EPC1 device chain connecting DCLK, DATA, parallel. mixture APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 devices configured same chain. mixture FLEX 10K, FLEX 10KA, FLEX 10KE, 5.0-V 3.3-V FLEX 6000 devices configured same chain. "Configuration Chain with Multiple Voltage Levels" page
Altera Corporation
Configuration Devices SRAM-based Devices
Figure APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 Device Configured with EPC2 EPC1 Configuration Devices Note
APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 Devices
LUT-Based
DCLK DATA0 nSTATUS CONF_DONE nCONFIG MSEL0 MSEL1
Configuration Device
DCLK DATA nCASC nINIT_CONF
Configuration Device
DCLK DATA
APEX 20KE Devices
VCCINT
APEX 20KE Device
DCLK DATA0 nSTATUS CONF_DONE nCONFIG nCEO MSEL0 MSEL1
Configuration Device
DCLK DATA nINIT_CONF
N.C.
Notes Figure
EPC2 devices configure FLEX 6000 devices. pull-up resistor should connected same supply voltage configuration device. pull-up resistors (APEX 20KE pull-resistors pins EPC2 devices have internal, user-configurable pull-up resistors. internal pull-up resistors used, external pull-up resistors should used these pins. diagram shows APEX APEX 20K, Mercury, ACEX FLEX device, which MSEL0 MSEL1 tied ground. FLEX 6000 devices, MSEL tied ground, DATA0 named DATA. EPC8, EPC16, EPC2 devices cannot used with FLEX 6000 devices. other connections same FLEX 6000 devices. Quartus software uses internal pull-up resistors default. turn internal pull-up resistors, check Disable pull-ups configuration device option when generating programming files. EPC4, EPC8, EPC16 devices cannot cascaded. nINIT_CONF only available EPC2 devices internal pull that always active. nINIT_CONF available used, nCONFIG must pulled either directly through resistor. ensure successful configuration between APEX 20KE configuration devices possible power-up sequences, pull nCONFIG CCINT. isolate 1.8-V 3.3-V power supplies when configuring APEX 20KE devices, diode between APEX 20KE device's nCONFIG configuration device's nINIT_CONF pin. Select diode with threshold voltage less than equal diode will make nINIT_CONF open-drain pin; will only able drive tri-state. nCEO left unconnected.
Altera Corporation
Configuration Devices SRAM-Based Devices
Figure shows APEX APEX 20K, Mercury, ACEX FLEX devices configured with EPC2 EPC1 devices. Figure ACEX APEX 20K, APEX FLEX 10K, FLEX 6000, Mercury Devices Configured with EPC2 EPC1 Configuration Devices Note
APEX ACEX Mercury, APEX 20KC, APEX 20K, FLEX 10K, FLEX 6000 Devices
LUT-Based MSEL0 MSEL1 DCLK DATA0 nSTATUS CONF_DONE nCONFIG
LUT-Based MSEL0 MSEL1 DCLK DATA0 nSTATUS CONF_DONE nCONFIG
Configuration Device DCLK DATA nCASC nINIT_CONF
Configuration Device DCLK DATA
nCEO
APEX 20KE Devices
VCCINT
APEX 20KE MSEL0 MSEL1 DCLK DATA0 nSTATUS CONF_DONE nCONFIG
APEX 20KE MSEL0 MSEL1 DCLK DATA0 nSTATUS CONF_DONE nCONFIG
Configuration Device DCLK DATA nCASC nINIT_CONF
Configuration Device DCLK DATA
nCEO
Altera Corporation
Configuration Devices SRAM-based Devices Data Sheet Notes Figure
EPC2 devices configure FLEX 6000 devices. pull-up resistor should connected same supply voltage configuration device. pull-up resistors (APEX 20KE pull-resistors pins EPC2 devices have internal, userconfigurable pull-up resistors. internal pull-up resistors used, external pull-up resistors should used these pins. Quartus software uses internal pull-up resistors default. turn internal pull-up resistors, check Disable pull-ups configuration device option when generating programming files. diagram shows APEX APEX 20K, Mercury, ACEX FLEX device, which MSEL0 MSEL1 tied ground. FLEX 6000 devices, MSEL tied ground, DATA0 named DATA. EPC2 cannot used with FLEX 6000 devices. other connections same FLEX 6000 devices. EPC4, EPC8, EPC16 devices cannot cascaded. nINIT_CONF only available EPC2 devices internal pull that always active. nINIT_CONF available used, nCONFIG must pulled either directly through resistor. ensure successful configuration between APEX 20KE configuration devices possible power-up sequences, pull nCONFIG CCINT. This diagram APEX 20KE devices only. isolate 1.8-V 3.3-V power supplies when configuration APEX 20KE devices, diode between APEX 20KE device's nCONFIG configuration device's nINIT_CONF pin. Select diode with threshold voltage less than queal diode will make nINIT_CONF open-drain pin; will only able drive tri-state.
more information APEX 20K, ACEX FLEX 10K, FLEX 6000 device configuration, Application Note (Configuring ACEX APEX 20K, FLEX FLEX 6000 Devices). Figure shows timing waveform configuration device scheme.
Figure Configuration Device Scheme Timing Waveform
nINIT_CONF VCC/nCONFIG OE/nSTATUS nCS/CONF_DONE tDSU DCLK DATA User INIT_DONE tOEZX tPOR
User Mode
Tri-State
Tri-State
Notes Figure
configuration devivce will drive DATA after configuration. APEX APEX devices (except EP2A70 devices) enter user mode clock cycles after CONF_DONE goes high. EP2A70 devices enter user mode clock cycles after CONF_DONE goes high. FLEX FLEX 6000 devices enter user mode clock cycles after CONF_DONE goes high. Mercury devices enter user mode clock cycles after CONF_DONE goes high.
Altera Corporation
Configuration Devices SRAM-Based Devices
Table defines APEX 20K, FLEX 10K, FLEX 6000 timing parameters when using EPC2 devices Table APEX 20K, FLEX FLEX 6000 Timing Parameters using EPC2 Devices Note Symbol
tPOR tOEZX tDSU tOEW fCLK
Parameter
delay high DATA output enabled DCLK high time DCLK time Data setup time before rising edge DCLK Data hold time after rising edge DCLK DCLK DATA pulse width guarantee counter reset DCLK frequency
Units
12.5
Notes Table
more information regarding EPC4, EPC8, EPC16 configuration device timing parameters, Enhanced Configuration Device (EPC4, EPC8 EPC16) Data Sheet. configuration device imposes delay upon initial power-up allow voltage supply stabilize. Subsequent reconfigurations incur this delay.
Altera Corporation
Configuration Devices SRAM-based Devices
Table defines APEX 20K, FLEX 10K, FLEX 6000 timing parameters when using EPC1 EPC1441 devices Table APEX 20K, FLEX FLEX 6000 Timing Parameters using EPC1 EPC1441 Devices Note Symbol
tPOR tOEZX tDSU tOEW fCLK
Parameter
delay high DATA output enabled DCLK high time DCLK time Data setup time before rising edge DCLK Data hold time after rising edge DCLK DCLK DATA pulse width guarantee counter reset DCLK frequency
Units
Notes Table
more information regarding EPC4, EPC8, EPC16 configuration device timing parameters, Enhanced Configuration Device (EPC4, EPC8 EPC16) Data Sheet. configuration device imposes delay upon initial power-up allow voltage supply stabilize. Subsequent reconfigurations incur this delay.
Altera Corporation
Configuration Devices SRAM-Based Devices
Table defines APEX 20K, FLEX 10K, FLEX 6000 timing parameters when using EPC2, EPC1, EPC1441 devices Table APEX 20K, FLEX FLEX 6000 Timing Parameters using EPC2, EPC1 EPC1441 Devices Notes (1), Symbol
tPOR tOEZX tDSU tOEW fCLK
Parameter
delay high DATA output enabled DCLK high time DCLK time Data setup time before rising edge DCLK Data hold time after rising edge DCLK DCLK DATA pulse width guarantee counter reset DCLK frequency
Units
16.7
Notes Table
EPC16, EPC8, EPC4, EPC2 devices configure FLEX 6000 devices. more information regarding EPC4, EPC8, EPC16 configuration device timing parameters, Enhanced Configuration Device (EPC4, EPC8 EPC16) Data Sheet. configuration device imposes delay upon initial power-up allow voltage supply stabilize. Subsequent reconfigurations incur this delay.
FLEX 8000 Device Configuration
FLEX 8000 devices differ from ACEX APEX 20K, APEX FLEX 10K, FLEX 6000 devices that they have internal oscillators that provide DCLK signal configuration device. configuration device sends configuration data serial bitstream DATA output pin. This data routed into FLEX 8000 device DATA0 input pin. EPC1, EPC1441, EPC1213, EPC1064, EPC1064V configuration devices support this type configuration.
Altera Corporation
Configuration Devices SRAM-based Devices
EPC1 EPC1441 devices replace EPC1213, EPC1064, EPC1064V configuration devices. EPC1 EPC1441 device automatically emulates EPC1213, EPC1064, EPC1064V when programmed with appropriate POF. When EPC1 EPC1441 device programmed with EPC1213, EPC1064, EPC1064V POF, FLEX 8000 device drives EPC1 EPC1441 device's high clocks EPC1 EPC1441 device. EPC1 device store more configuration data than EPC1064, EPC1064V, EPC1213, EPC1441 device. Therefore, designers type configuration device FLEX devices. addition, single EPC1 EPC1441 device configure FLEX 8000 device. multi-device configuration FLEX 8000 devices, nCASC pins provide handshaking between multiple configuration devices, allowing several cascaded EPC1 EPC1213 devices serially configure multiple FLEX 8000 devices. EPC1441, EPC1064, EPC1064V support data cascading. Figure shows FLEX 8000 device configured with single EPC1, EPC1441, EPC1213, EPC1064, EPC1064V configuration device. Figure FLEX 8000 Device Configured with EPC1, EPC1441, EPC1213, EPC1064, EPC1064V Configuration Device
FLEX 8000 Device
nS/P MSEL1 MSEL0 CONF_DONE nSTATUS DCLK
Configuration Device
DCLK DATA
DATA0 nCONFIG
Notes Figure
pull-up resistor should connected same supply voltage configuration device. pull-up resistors
Figure shows three FLEX 8000 devices configured with EPC1 EPC1213 configuration devices.
Altera Corporation
Configuration Devices SRAM-Based Devices
Figure FLEX 8000 Multi-Device Configuration with EPC1 EPC1213 Configuration Devices
FLEX 8000 Device
nS/P MSEL1 MSEL0 CONF_DONE nSTATUS DCLK
Configuration Device
nCASC DATA DCLK
Configuration Device
DATA DCLK
DATA0 nCONFIG
FLEX 8000 Device
nS/P MSEL1 MSEL0 CONF_DONE nSTATUS
DCLK DATA0 nCONFIG
FLEX 8000 Device
nS/P MSEL1 MSEL0 CONF_DONE nSTATUS
DCLK DATA0 nCONFIG
Notes Figure
pull-resistor should connected same supply voltage confiuration device. pull-up resistors
Altera Corporation
Configuration Devices SRAM-based Devices
Table describes functions configuration devices during FLEX 8000 device configuration. Table Configuration Device Functions During FLEX 8000 Device Configuration Name 8-Pin PDIP
DATA
Number 20-Pin PLCC
32-Pin TQFP
Type
Description
Output Serial data output. DATA tri-stated before configuration when high after configuration device finishes sending configuration data. This operation independent device's position cascade chain. Input DCLK clock input when using EPC1, EPC1213, EPC1064, EPC1064V configuration devices. Rising edges DCLK increment internal address counter present next data DATA pin. counter incremented only input held high, input held low, configuration data been transferred target device. Output enable (active high) reset (active low). logic level resets address counter. high logic level enables DATA permits address counter count. Chip-select input (active low). input allows DCLK increment address counter enables DATA. Cascade-select output (active low). This output goes when address counter reached maximum value. nCASC output usually connected input next device configuration chain, next DCLK clocks data next device. Power pin.
DCLK
OpenDrain Input Output
nCASC
Power
Ground Ground pin. 0.2-µF decoupling capacitor must placed between pins.
Notes: Table
This package available EPC1, EPC1441, EPC1213, EPC1064, EPC1064V devices only. This package available EPC1441, EPC1064, EPC1064V devices only. EPC1441, EPC1064, EPC1064V devices support data cascading. EPC1 EPC1213 devices support data cascading FLEX 8000 devices.
more information FLEX 8000 device configuration, following documents:
Application Note (Configuring FLEX 8000 Devices) Application Note (Configuring Multiple FLEX 8000 Devices)
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Configuration Devices SRAM-Based Devices
Power Operation
This section describes Power-On Reset (POR) delay, error detection, 3.3-V 5.0-V operation Altera configuration devices.
Power-On Reset
During initial power-up, delay occurs permit voltage levels stabilize. When configuring APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 device with EPC4, EPC8, EPC16, EPC2, EPC1, EPC1441 device, delay occurs inside configuration device, delay maximum When configuring FLEX 8000 device with EPC1213, EPC1064, EPC1064V device, delay occurs inside FLEX 8000 device, delay typically with maximum
Error Detection Circuitry
EPC4, EPC8, EPC16, EPC2, EPC1, EPC1441 configuration devices have built-in error detection circuitry configuring APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 devices only. Built-in error-detection circuitry uses configuration device, which monitors CONF_DONE APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 device. error condition occurs CONF_DONE does high after configuration data been sent, CONF_DONE goes high before configuration device completed sending configuration data. When error condition occurs, configuration device drives low, which drives APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 device's nSTATUS low, indicating error. After error, configuration automatically restarts Auto-Restart Configuration Frame Error option turned Global Project Device Options dialog (Assign menu) MAX+PLUS software. APEX 20K, APEX Mercury devices, Quartus software provides similar option. addition, APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 device detects cyclic redundancy code (CRC) error received data, also flag error driving nSTATUS low. This signal nSTATUS resets configuration device, allowing reconfiguration. checking performed when configuring APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 devices.
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Configuration Devices SRAM-based Devices
3.3-V 5.0-V Operation
EPC2, EPC1, EPC1441 devices configure 5.0-V, 3.3-V, 2.5-V devices. each configuration device, option must 5.0-V 3.3-V operation (EPC4, EPC8, EPC16 devices EPC1 EPC1441 configuration devices, Low-Voltage Configuration EPROM option Global Project Device Options dialog (Assign menu) MAX+PLUS software sets this parameter. (For APEX 20K, APEX Mercury devices, Quartus software provides similar option.) EPC2 devices, this option externally VCCSEL pin. addition, EPC2 device externally controlled option, VPPSEL pin, adjust programming voltage functions VCCSEL VPPSEL pins described below.
VCCSEL pin-For EPC2 configuration devices, 5.0-V 3.3-V operation controlled VCCSEL option pin. device functions 5.0-V mode when VCCSEL connected GND; device functions 3.3-V mode when VCCSEL connected VCC. VPPSEL pin-The EPC2 programming power normally tied EPC2 devices operating with 3.3-V supply, possible improve EPC2 in-system programming times providing with 5.0-V supply. other devices, must tied VCC. EPC2 device's VPPSEL must accordance with EPC2 pin. supplied 5.0-V supply, VPPSEL must connected GND; supplied 3.3-V power supply, VPPSEL must connected VCC.
Table describes relationship between voltage levels required logic level VCCSEL VPPSEL (i.e., high logic level). Table VCCSEL VPPSEL Functions EPC2 Voltage Level Voltage Level VCCSEL Logic VPPSEL Logic Level Level
High High High
Altera Corporation
Configuration Devices SRAM-Based Devices
EPC1 EPC1441 configuration devices, 3.3-V 5.0-V operation controlled programming POF. programming value determined core supply voltage targeted device during design compilation with MAX+PLUS software. example, EPC1 devices programmed automatically operate 3.3-V mode when configuring FLEX 10KA devices, which have voltage this example, EPC1 device's connected 3.3-V power supply. Designers choose configuration device voltage when using MultiVoltfeature, which allows ACEX, APEX, APEX FLEX, Mercury device bridge between systems operating with different voltages. When compiling 3.3-V FLEX 6000 devices, configuration device low-voltage operation. EPC1 EPC1441 configuration devices low-voltage operation, turn Low-Voltage option Global Project Device Options dialog (Assign menu) MAX+PLUS software.
Configuration Chain with Multiple Voltage Levels
EPC2 EPC1 device configure device chain with multiple voltage levels. 3.3-V 2.5-V ACEX, APEX, APEX FLEX, Mercury devices driven higher-voltage signals. When configuring mixed-voltage device chain, APEX APEX 20K, Mercury, ACEX FLEX devices' VCCINT VCCIO pins connected depending upon device. configuration device powered EPC1, EPC1441, EPC1213, EPC1064, EPC1064V configuration device powered nSTATUS CONF_DONE pull-up resistors must connected these configuration devices powered nSTATUS CONF_DONE pull-up resistors must connected
Altera Corporation
Configuration Devices SRAM-based Devices
3.3-V operation, EPC2 inputs 5.0-V tolerant, except DATA, DCLK, nCASC. DATA, DCLK, nCEO pins used only interface between EPC2 configuration device APEX APEX 20K, Mercury, ACEX FLEX device configuring. voltage tolerances EPC2 pins listed Table Table EPC2 Input Bidirectional Voltage Tolerance 5.0-V Operation 5.0-V Tolerant
DATA DCLK nCASC VCCSEL VPPSEL nINIT_CONF
3.3-V Operation 5.0-V Tolerant 3.3-V Tolerant
3.3-V Tolerant
more information APEX APEX 20K, Mercury, ACEX FLEX 10K, FLEX 6000 devices, following documents:
ACEX Programmable Logic Device Family Data Sheet APEX Programmable Logic Device Family Data Sheet APEX Programmable Logic Device Family Data Sheet FLEX Embedded Programmable Logic Family Data Sheet FLEX 10KE Embedded Programmable Logic Family Data Sheet FLEX 8000 Programmable Logic Device Family Data Sheet FLEX 6000 Programmable Logic Device Family Data Sheet Mercury Programmable Logic Device Family
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Configuration Devices SRAM-Based Devices
Programming Configuration File Support
Quartus MAX+PLUS development systems provide programming support Altera configuration devices. Quartus MAX+PLUS software automatically generates program each configuration device project. multi-device project, software combine programming files multiple ACEX, APEX, APEX FLEX, Mercury devices into more configuration devices. software allows select appropriate configuration device most efficiently store data each APEX APEX 20K, Mercury, ACEX FLEX device. Moreover, when compiling ACEX FLEX 10KA, FLEX 10KE, Mercury devices, MAX+PLUS software automatically defaults generate EPC1 EPC1441 with programming 3.3-V operation. Altera configuration devices programmable using Altera programming hardware conjunction with Quartus MAX+PLUS software. addition, many manufacturers offer programming hardware that supports other Altera configuration devices. EPC4, EPC8, EPC16, EPC2 configuration devices programmed in-system through industry-standard 4-pin JTAG interface. capability EPC2, EPC4, EPC8, EPC16 devices provides ease prototyping updating APEX APEX 20K, Mercury, ACEX FLEX device functionality. EPC8 EPC16 devices programmed in-system test equipment using Files, STAPL Files (.jam), STAPL Byte-Code Files (.jbc), embedded processors using programming test language, MAX+PLUS Quartus software MasterBlaster ByteBlasterMV download cables. When programming multiple EPC2 devices JTAG chain, Quartus MAX+PLUS software other programming methods employ concurrent programming simultaneously program multiple devices reduce programming time. EPC2, EPC4, EPC8, EPC16 devices programmed erased times. After programming EPC2, EPC4, EPC8, EPC16 device in-system, APEX APEX 20K, Mercury, ACEX FLEX device configuration initiated including EPC2 JTAG configuration instruction. Table page
more information programming configuration support, following documents:
Altera Programming Hardware Data Sheet Programming Hardware Manufacturers MasterBlaster Serial/USB Communications Cable Data Sheet ByteBlasterMV Parallel Port Download Cable Data Sheet ByteBlaster Parallel Port Download Cable Data Sheet BitBlaster Serial Download Cable
Altera Corporation
Configuration Devices SRAM-based Devices
IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing
EPC2 provides JTAG circuitry that complies with IEEE Std. 1149.1-1990 specification. JTAG boundary-scan testing performed before after configuration, during configuration. EPC2 device supports JTAG instructions shown Table circuitry EPC2, EPC4, EPC8, EPC16 devices compatible with tools that support IEEE Std. 1532. IEEE Std. 1532 standard developed allow concurrent between multiple vendors. EPC4, EPC8, EPC16 JTAG instruction, refer Enhanced Configuration Devices (EPC4, EPC8, EPC16) Data Sheet.
Table EPC2 JTAG Instructions JTAG Instruction
SAMPLE/PRELOAD EXTEST BYPASS
Description
Allows snapshot signal device pins captured examined during normal device operation, permits initial data pattern output device pins. Allows external circuitry board-level interconnections tested forcing test pattern output pins capturing results input pins. Places 1-bit bypass register between pins, which allows data pass synchronously through selected device adjacent devices during normal device operation. Selects device IDCODE register places between TDO, allowing device IDCODE serially shifted TDO. device IDCODE EPC2 configuration device shown below: 0000 0001000000000010 00001101110 Selects USERCODE register places between TDO, allowing USERCODE serially shifted TDO. 32-bit USERCODE programmable user-defined pattern. These instructions used when programming EPC2 device JTAG ports with MasterBlaster, ByteBlaster ByteBlaster, BitBlaster download cable, using STAPL File (.jam), STAPL Byte-Code File (.jbc), File embedded processor. This function allows user initiate APEX FLEX configuration process tying nINIT_CONF APEX FLEX device(s) nCONFIG pin(s). After this instruction updated, nINIT_CONF driven low. When Initiate Configuration instruction cleared, nINIT_CONF released, which starts APEX FLEX device configuration. This instruction used MAX+PLUS software, STAPL Files, Files.
IDCODE
USERCODE
Instructions
INIT_CONF
more information, Application Note (IEEE 1149.1 (JTAG) Boundary-Scan Testing Altera Devices). Figure shows timing requirements JTAG signals.
Altera Corporation
Configuration Devices SRAM-Based Devices
Figure EPC2 JTAG Waveforms
tJCP tJCH tJCL tJPSU tJPH
tJPZX tJPCO tJPXZ
tJSSU tJSH
Signal Captured Signal Driven
tJSZX
tJSCO
tJSXZ
Table shows timing parameters values configuration devices. Table JTAG Timing Parameters Values Symbol
tJCP tJCH tJCL tJPSU tJPH tJPCO tJPZX tJPXZ tJSSU tJSH tJSCO tJSZX tJSXZ clock period clock high time clock time JTAG port setup time JTAG port hold time JTAG port clock output JTAG port high impedance valid output JTAG port valid output high impedance Capture register setup time Capture register hold time Update register clock output Update register high-impedance valid output Update register valid output high impedance
Parameter
Unit
Operating Conditions
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Tables through provide information absolute maximum ratings, recommended operating conditions, operating conditions, capacitance configuration devices.
Configuration Devices SRAM-based Devices
EPC4, EPC8, EPC16 device operating conditions, refer Enhanced Configuration Devices (EPC4, EPC8, EPC16) Data Sheet. Note Conditions
With respect ground With respect ground
Table Absolute Maximum Ratings Symbol
IMAX IOUT
Parameter
Supply voltage input voltage ground current output current, Power dissipation Storage temperature Ambient temperature Junction temperature bias Under bias Under bias
-2.0 -2.0
Unit
Table Recommended Operating Conditions Symbol
Parameter
Supply voltage 5.0-V operation Supply voltage 3.3-V operation Input voltage Output voltage Operating temperature Input rise time Input fall time (3), (3),
Conditions
(3.0) -0.3
(3.6)
Unit
4.75 (4.50) 5.25 (5.50)
With respect ground
commercial industrial
Table Operating Conditions Symbol
Parameter
High-level input voltage Low-level input voltage
Conditions
-0.3
Unit
5.0-V mode high-level output voltage 3.3-V mode high-level CMOS output voltage -0.1 ground ground
Low-level output voltage Input leakage current Tri-state output off-state current
Altera Corporation
Configuration Devices SRAM-Based Devices
Table EPC1213, EPC1064 EPC1064V Device Supply Current Values Symbol
ICC0 ICC1
Parameter
supply current (standby) supply current (during configuration)
Conditions
Unit
Table EPC2 Device Supply Current Values Symbol
ICC0 ICC1
Parameter
supply current (standby)
Conditions
Unit
supply current (during configuration)
Table EPC1 Device Supply Current Values Symbol
ICC0 ICC1
Parameter
supply current (standby)
Conditions
16.5
Unit
supply current (during configuration)
Table EPC1441 Device Supply Current Values Symbol
ICC0 ICC1 ICC1
Parameter
supply current (standby)
Conditions
Unit
supply current (during configuration) supply current (during configuration)
Table Capacitance Symbol
COUT
Note Conditions
VOUT
Parameter
Input capacitance Output capacitance
Unit
Notes Tables
Operating Requirements Altera Devices Data Sheet. minimum input -0.3 During transitions, inputs undershoot -2.0 overshoot input currents less than periods shorter than under no-load conditions. Numbers parentheses industrial-temperature-range devices. Maximum rise time Certain EPC2 pins driven 5.75 when operated with 3.3-V VCC. Table page parameter refers high-level CMOS output current; parameter refers low-level CMOS output current. Capacitance sample-tested only.
Altera Corporation
Configuration Devices SRAM-based Devices
Tables through show device configuration parameters APEX APEX 20K, Mercury, ACEX FLEX devices. Table ACEX FLEX FLEX 6000 Device Configuration Parameters Using EPC2 Devices 5.0-V Symbol
tOEZX tMCH tMCL tSCH tSCL tCASC tCCA fCDOE tOEC tNRCAS tNRR
Parameter
high first clock delay high data output enabled DCLK data delay DCLK high time first device configuration chain DCLK time first device configuration chain Clock frequency DCLK high time subsequent devices DCLK time subsequent devices rising edge nCASC nCASC cascade delay data enable/disable disable delay (reset) nCASC delay time (reset) minimum
Conditions
Unit
16.7
Table ACEX APEX 20K, APEX FLEX Mercury Device Configuration Parameters Using EPC2 Devices 3.3-V Symbol
tOEZX tMCH tMCL tSCH tSCL tCASC tCCA fCDOE tOEC tNRCAS tNRR
Parameter
high first clock delay high data output enabled DCLK data delay DCLK high time first device configuration chain DCLK time first device configuration chain Clock frequency DCLK high time subsequent devices DCLK time subsequent devices rising edge nCASC nCASC cascade delay data enable/disable disable delay (reset) nCASC delay time (reset) minimum
Conditions
Unit
12.5
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Configuration Devices SRAM-Based Devices
Table ACEX FLEX FLEX 6000 Device Configuration Parameters Using EPC1 EPC1441 Devices 5.0-V Symbol
tOEZX tMCH tMCL tSCH tSCL tCASC tCCA fCDOE tOEC tNRCAS tNRR
Parameter
high first clock delay high data output enabled DCLK data delay DCLK high time first device configuration chain DCLK time first device configuration chain Clock frequency DCLK high time subsequent devices DCLK time subsequent devices rising edge nCASC nCASC cascade delay data enable/disable disable delay (reset) nCASC delay time (reset) minimum
Conditions
Unit
16.7
Table ACEX FLEX FLEX 6000 Device Configuration Parameters Using EPC1 EPC1441 Devices 3.3-V Symbol
tOEZX tMCH tMCL tSCH tSCL tCASC tCCA fCDOE tOEC tNRCAS tNRR
Parameter
high first clock delay high data output enabled DCLK data delay DCLK high time first device configuration chain DCLK time first device configuration chain Clock frequency DCLK high time subsequent devices DCLK time subsequent devices rising edge nCASC nCASC cascade delay data enable/disable disable delay (reset) nCASC delay time (reset) minimum
Conditions
Unit
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Configuration Devices SRAM-based Devices
Table FLEX 8000 Device Configuration Parameters Using EPC1, EPC1441, EPC1213, EPC1064 EPC1064V Devices Symbol Parameter Conditions EPC1064V EPC1064 EPC1213 EPC1 Unit EPC1441
tOEZX tCSZX tCSXZ tCSS tCSH tDSU tOEW tCASC tCKXZ tCEOUT high DATA output enabled DATA output enabled high DATA output disabled setup time first DCLK rising edge hold time after DCLK rising edge Data setup time before rising edge DCLK Data hold time after rising edge DCLK DCLK DATA delay Clock period Clock frequency DCLK time DCLK high time high DATA output disabled pulse width guarantee counter reset Last DCLK nCASC delay Last DCLK DATA tri-state delay high nCASC high delay
Revision History
information contained Configuration Devices SRAM-Based Devices Data Sheet version 12.2 supersedes information published pervious versions. following changes were made Configuration Devices SRAM-Based Devices Data Sheet version 12.2:
Version 12.2
Corrected APEX 20KE voltate Table Updated Figure
Version 12.1
Updated Table Updated notes Figures Added APEX 20KE device diagrams Figures
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Configuration Devices SRAM-Based Devices
Notes:
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Configuration Devices SRAM-Based Devices
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Copyright 2002 Altera Corporation. rights reserved. Altera, Programmable Solutions Company, stylized Altera logo, specific device designations, other words logos that identified trademarks and/or service marks are, unless noted otherwise, trademarks service marks Altera Corporation U.S. other countries. other product service names property their respective holders. Altera products protected under numerous U.S. foreign patents pending applications, mask work rights, copyrights. Altera warrants performance semiconductor products current specifications accordance with Altera's standard warranty, reserves right make changes products services time without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services.
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SRAM-Based Devices December 2002, ver. 12.2 Features Se

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