Available Texas Instruments NanoStar NanoFree Packages 1.65-V 5.5-V Op
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
Available Texas Instruments NanoStar NanoFree Packages 1.65-V 5.5-V Operation Inputs Accept Voltages High On-Off Output Voltage Ratio High Degree Linearity High Speed, Typically (VCC Rail-to-Rail Input/Output On-State Resistance, Typically (VCC Latch-Up Performance Exceeds JESD Class
PACKAGE (TOP VIEW)
YEA, YEP, YZA, PACKAGE (BOTTOM VIEW)
description/ordering information
This dual bilateral analog switch designed 1.65-V 5.5-V operation. SN74LVC2G66 handle both analog digital signals. device permits signals with amplitudes (peak) transmitted either direction. NanoStar NanoFree package technology major breakthrough packaging concepts, using package. Each switch section enable-input control (C). high-level voltage applied turns associated switch section. ORDERING INFORMATION
PACKAGE NanoStar WCSP (DSBGA) 0.17-mm Small Bump NanoFree WCSP (DSBGA) 0.17-mm Small Bump (Pb-free) NanoStar WCSP (DSBGA) 0.23-mm Large Bump NanoFree WCSP (DSBGA) 0.23-mm Large Bump (Pb-free) SSOP VSSOP Reel 3000 Reel 3000 Reel ORDERABLE PART NUMBER SN74LVC2G66YEAR SN74LVC2G66YZAR Reel 3000 SN74LVC2G66YEPR SN74LVC2G66YZPR SN74LVC2G66DCTR SN74LVC2G66DCUR SN74LVC2G66DCUT C66_ C66_ _C6_ TOP-SIDE MARKING
-40°C 85°C
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. DCT: actual top-side marking three additional characters that designate year, month, assembly/test site. DCU: actual top-side marking additional character that designates assembly/test site. YEA/YZA, YEP/YZP: actual top-side marking three preceding characters denote year, month, sequence code, following character designate assembly/test site.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. NanoStar NanoFree trademarks Texas Instruments.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 2003, Texas Instruments Incorporated
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
description/ordering information (continued)
Applications include signal gating, chopping, modulation demodulation (modem), signal multiplexing analog-to-digital digital-to-analog conversion systems.
FUNCTION TABLE (each section) CONTROL INPUT SWITCH
logic diagram, each switch (positive logic)
Switches
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, (see Note -0.5 Input voltage range, (see Notes -0.5 Switch voltage range, VI/O (see Notes -0.5 Control input clamp current, port diode current, IIOK (VI/O VI/O VCC) On-state switch current, (VI/O VCC) Continuous current through ±100 Package thermal impedance, (see Note package 220°C/W package 227°C/W YEA/YZA package 140°C/W YEP/YZP package 102°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: voltages with respect ground unless otherwise specified. input output voltage ratings exceeded input output clamp-current ratings observed. This value limited maximum. package thermal impedance calculated accordance with JESD 51-7.
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
recommended operating conditions (see Note
VI/O Supply voltage port voltage 1.65 1.95 1.65 1.95 1.65 1.95 1.65 0.65 0.35 ns/V UNIT
High-level High level input voltage, control input voltage
Low-level level input voltage control input voltage,
Control input voltage
Input transition rise/fall time
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, (see Figures 1.65 1.65 1.65 12.5 ±0.1 ±0.1 ±0.1 UNIT
On-state state switch resistance
ron(p)
Peak on-state resistance state
GND, (see Figures
Difference on-state resistance between switches
GND, (see Figures
IS(off)
Off-state state switch leakage current
VCC, (see Figure GND, VIH, Open (see Figure
IS(on) Cio(off)
On-state state switch leakage current Control input current Supply current Supply-current change Control input capacitance Switch input/output capacitance
Cio(on) Switch input/output capacitance 25°C
switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure
PARAMETER FROM (INPUT) (OUTPUT) 0.15 UNIT
10.5 tPLH tPHL same tpd. propagation delay calculated time constant typical on-state resistance switch specified load capacitance, when driven ideal voltage source (zero output impedance). tPZL tPZH same ten. tPLZ tPHZ same tdis.
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
analog switch characteristics, 25°C
PARAMETER FROM (INPUT) (OUTPUT) TEST CONDITIONS sine wave (see Figure Frequency response (switch sine wave (see Figure 1.65 1.65 1.65 (sine wave) (see Figure Crosstalk (between switches) (sine wave) (see Figure 1.65 1.65 Crosstalk (control input signal output) (square wave) (see Figure 1.65 (sine wave) (see Figure Feed-through attenuation (switch off) (sine wave) (see Figure 1.65 1.65 (sine wave) (see Figure Sine-wave distortion (sine wave) (see Figure Adjust voltage obtain output. Increase frequency until meter reads Adjust voltage obtain input. 1.65 >300 >300 >300 >300 0.025 0.015 0.01 0.15 0.025 0.015 0.01 UNIT
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
PARAMETER MEASUREMENT INFORMATION
(On)
Figure On-State Resistance Test Circuit
1.65
Figure Typical Function Input Voltage (VI)
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
PARAMETER MEASUREMENT INFORMATION
(Off) Condition GND, Condition VCC,
Figure Off-State Switch Leakage-Current Test Circuit
Open
(On)
Figure On-State Leakage-Current Test Circuit
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
PARAMETER MEASUREMENT INFORMATION
VLOAD Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD
From Output Under Test (see Note
LOAD CIRCUIT INPUTS 0.15 tr/tf VCC/2 VCC/2 VCC/2 VCC/2 VLOAD
0.15 0.15
Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS Output Waveform (see Note Output Control tPZL tPZH Data Input
VOLTAGE WAVEFORMS SETUP HOLD TIMES tPLZ VLOAD/2 tPHZ
Output Waveform VLOAD (see Note
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement. tPLZ tPHZ same tdis. tPZL tPZH same ten. tPLH tPHL same tpd. parameters waveforms applicable devices.
Figure Load Circuit Voltage Waveforms
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
PARAMETER MEASUREMENT INFORMATION
(On) RL/CL: RL/CL:
VCC/2
Figure Frequency Response (Switch
(On) VCC/2
(Off)
VCC/2
20log10(VO2/VI1) 20log10(VO1/VI2)
Figure Crosstalk (Between Switches)
POST OFFICE 655303
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
PARAMETER MEASUREMENT INFORMATION
VCC/2
VCC/2
Figure Crosstalk (Control Input, Switch Output)
(Off)
VCC/2 RL/CL: RL/CL:
VCC/2
Figure Feed Through (Switch Off)
POST OFFICE 655303
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SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH
PARAMETER MEASUREMENT INFORMATION
(On)
VCC/2
1.65 VP-P VP-P VP-P VP-P
Figure Sine-Wave Distortion
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MECHANICAL DATA
MPDS049B 1999 REVISED OCTOBER 2002
(R-PDSO-G8)
0,30 0,15
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,13
0,15 2,90 2,70 4,25 3,75
INDEX AREA
0,10 0,00 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion Falls within JEDEC MO-187 variation
3,15 2,75
Gage Plane 0,25 0,60 0,20
1,30
Seating Plane 0,10 4188781/C 09/02
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MECHANICAL DATA
MXBG002B AUGUST 2001 REVISED 2002
(R-XBGA-N8)
DIE-SIZE BALL GRID ARRAY
0,50 0,95 0,85 0,25
1,95 1,85 1,50 0,25
0,35
0,50
NOTES:
linear dimensions millimeters. This drawing subject change without notice. NanoStar package configuration. Package complies JEDEC MO-211 variation This package tin-lead (SnPb). Refer package (drawing 4204151) lead-free.
0,50 INDEX AREA 0,19 0,15 0,05 0,05
0,05 SEATING PLANE 0,15 0,10
4203167 04/2002
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MECHANICAL DATA
MXBG006A JANUARY 2002 REVISED APRIL 2002
(R-XBGA-N8)
DIE-SIZE BALL GRID ARRAY
0,50 0,95 0,85 0,25
1,95 1,85 0,50 Index Area 0,19 0,15 0,05 0,05 0,35 1,50 0,25
0,05 0,50 Seating Plane 0,15 0,10
4204151-4/B 03/2002 NOTES: linear dimensions millimeters. This drawing subject change without notice. NanoFree package configuration. Package complies JEDEC MO-211 variation This package lead-free. Refer package (drawing 4203167) tin-lead (SnPb).
NanoFree trademark Texas Instruments.
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MECHANICAL DATA
MXBG020 OCTOBER 2002
(R-XBGA-N8)
DIE-SIZE BALL GRID ARRAY
0,50 0,95 0,85 0,25
1,95 1,85 0,50 Index Area 0,25 0,20 0,05 0,05 0,25 1,50
0,50
0,05 Seating Plane 0,20 0,15
4204741-4/A 10/2002 NOTES: linear dimensions millimeters. This drawing subject change without notice. NanoFree package configuration. This package lead-free. Refer package (drawing 4204725) tin-lead (SnPb).
NanoFree trademark Texas Instruments.
POST OFFICE 655303
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MECHANICAL DATA
MXBG023 OCTOBER 2002
(R-XBGA-N8)
DIE-SIZE BALL GRID ARRAY
0,50 0,95 0,85 0,25
1,95 1,85 0,50 Index Area 0,25 0,20 0,05 0,05 0,25 1,50
0,50
0,05 Seating Plane 0,20 0,15
4204725-4/A 10/2002 NOTES: linear dimensions millimeters. This drawing subject change without notice. NanoFree package configuration. This package tin-lead (SnPb). Refer package (drawing 420741) lead-free.
NanoFree trademark Texas Instruments.
POST OFFICE 655303
DALLAS, TEXAS 75265
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