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Available Texas Instruments NanoStar NanoFree Packages Supports Operat
Top Searches for this datasheetSN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER Available Texas Instruments NanoStar NanoFree Packages Supports Operation Inputs Accept Voltages Power Consumption, 10-µA ±24-mA Output Drive Typical VOLP (Output Ground Bounce) <0.8 25°C Typical VOHV (Output Undershoot) 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds JESD Class Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 1000-V Charged-Device Model (C101) PACKAGE (TOP VIEW) PACKAGE (BOTTOM VIEW) description/ordering information This dual Schmitt-trigger buffer designed 1.65-V 5.5-V operation. SN74LVC2G17 contains buffers performs Boolean function device functions independent buffers, because Schmitt action, have different input threshold levels positive-going (VT+) negative-going (VT-) signals. NanoStar NanoFree package technology major breakthrough packaging concepts, using package. This device fully specified partial-power-down applications using Ioff. Ioff circuitry disables outputs, preventing damaging current backflow through device when powered down. ORDERING INFORMATION NanoStar WCSP (DSBGA) NanoFree WCSP (DSBGA) (Pb-free) -40°C 85°C (SOT (SOT-23) PACKAGE Reel 3000 Reel 3000 Reel 3000 Reel Reel 3000 (SC-70) Reel ORDERABLE PART NUMBER SN74LVC2G17YEAR _C7_ SN74LVC2G17YZAR SN74LVC2G17DBVR SN74LVC2G17DBVT SN74LVC2G17DCKR SN74LVC2G17DCKT C17_ TOP-SIDE MARKING Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. DBV/DCK: actual top-side marking additional character that designates assembly/test site. YEA/YZA: actual top-side marking three preceding characters denote year, month, sequence code, following character designate assembly/test site. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. NanoStar NanoFree trademarks Texas Instruments. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 2003, Texas Instruments Incorporated POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER FUNCTION TABLE (each inverter) INPUT OUTPUT logic diagram (positive logic) absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Voltage range applied output high-impedance power-off state, (see Note -0.5 Voltage range applied output high state, (see Notes -0.5 Input clamp current, Output clamp current, Continuous output current, Continuous current through ±100 Package thermal impedance, (see Note package 165°C/W package 259°C/W YEA/YZA package 143°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input negative-voltage output voltage ratings exceeded input output current ratings observed. value provided recommended operating conditions table. package thermal impedance calculated accordance with JESD 51-7. POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER recommended operating conditions (see Note Supply voltage Input voltage Output voltage 1.65 High-level output current 1.65 Low-level output current Operating 1.65 UNIT Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 1.65 1.65 Negative-going input threshold voltage 1.65 Hysteresis (VT+ VT-) -100 Ioff input GND, input Other inputs 1.65 1.65 1.65 1.65 1.65 VCC-0.1 0.45 0.55 0.55 UNIT Positive-going input threshold voltage typical values 25°C. switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure PARAMETER FROM (INPUT) (OUTPUT) 0.15 UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER operating characteristics, 25°C PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER PARAMETER MEASUREMENT INFORMATION VLOAD Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD From Output Under Test (see Note LOAD CIRCUIT INPUTS 0.15 tr/tf VCC/2 VCC/2 VCC/2 VLOAD 0.15 0.15 Timing Input Input VOLTAGE WAVEFORMS PULSE DURATION Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS Output Waveform (see Note Output Control tPZL tPZH Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES tPLZ VLOAD/2 tPHZ Output Waveform VLOAD (see Note VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement. tPLZ tPHZ same tdis. tPZL tPZH same ten. tPLH tPHL same tpd. parameters waveforms applicable devices. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MPDS026D FEBRUARY 1997 REVISED FEBRUARY 2002 (R-PDSO-G6) PLASTIC SMALL-OUTLINE 0,95 0,50 0,25 0,20 1,70 1,50 3,00 2,60 0,15 3,00 2,80 Gage Plane 0,25 0°-8° 0,55 0,35 Seating Plane 1,45 0,95 0,05 0,10 4073253-5/G 01/02 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion. Leads wider than leads package orientation. POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MPDS114 FEBRUARY 2002 (R-PDSO-G6) PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,30 0,15 0,10 1,40 1,10 2,40 1,80 0,13 2,15 1,85 Gage Plane 0,15 0°-8° 0,46 0,26 Seating Plane 1,10 0,80 0,10 0,00 0,10 4093553-3/D 01/02 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion. Falls within JEDEC MO-203 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MXBG003A NOVEMBER 2001 REVISED 2002 (R-XBGA-N6) DIE-SIZE BALL GRID ARRAY 0,50 0,95 0,85 0,25 1,00 0,50 1,45 1,35 0,35 0,50 NOTES: linear dimensions millimeters. This drawing subject change without notice. NanoStar package configuration. Package complies JEDEC MO-211 variation This package tin-lead (SnPb). Refer package (drawing 4204151) lead-free. INDEX AREA 0,19 0,15 0,05 0,05 0,05 SEATING PLANE 0,15 0,10 4203167-3/C 04/2002 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MXBG005A JANUARY 2002 REVISED APRIL 2002 (R-XBGA-N6) DIE-SIZE BALL GRID ARRAY 0,50 0,95 0,85 0,25 1,00 0,50 Index Area 0,19 0,15 0,05 0,05 1,45 1,35 0,35 0,05 0,50 Seating Plane 0,15 0,10 4204151-3/B 03/2002 NOTES: linear dimensions millimeters. This drawing subject change without notice. NanoFree package configuration. Package complies JEDEC MO-211 variation This package lead-free. Refer package (drawing 4203167) tin-lead (SnPb). NanoFree trademark Texas Instruments. POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. 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Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements. Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2003, Texas Instruments Incorporated Other recent searchesMRFIC1505A - MRFIC1505A MRFIC1505A Datasheet LURF9UG3392-PF - LURF9UG3392-PF LURF9UG3392-PF Datasheet LTC1623 - LTC1623 LTC1623 Datasheet LTC1688 - LTC1688 LTC1688 Datasheet LTC1689 - LTC1689 LTC1689 Datasheet GN04042N - GN04042N GN04042N Datasheet AT52BR3224A - AT52BR3224A AT52BR3224A Datasheet AT52BR3228AT - AT52BR3228AT AT52BR3228AT Datasheet 8m123331 - 8m123331 8m123331 Datasheet
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