IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 First-In/First-Ou

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CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208
First-In/First-Out Dual-Port memory 2,048 organization (IDT7203) 4,096 organization (IDT7204) 8,192 organization (IDT7205) 16,384 organization (IDT7206) 32,768 organization (IDT7207) 65,636 organization (IDT7208) High-speed: 12ns access time power consumption Active: 660mW (max.) Power-down: 44mW (max.) Asynchronous simultaneous read write Fully expandable both word depth width functionally compatible with IDT720X family Status Flags: Empty, Half-Full, Full Retransmit capability High-performance CMOS technology Military product compliant MIL-STD-883, Class Standard Military Drawing #5962-88669 (IDT7203), 5962-89567 (IDT7203), 5962-89568 (IDT7204) listed this function
Industrial temperature range (-40°C +85°C) available (plastic packages only)
DESCRIPTION:
dual-port memory buffers with internal pointers that load empty data first-in/first-out basis. device uses Full Empty flags prevent data overflow underflow expansion logic allow unlimited expansion capability both word size depth. Data toggled device through Write Read pins. device's 9-bit width provides control parity user's option. also features Retransmit (RT) capability that allows read pointer reset initial position when pulsed LOW. Half-Full Flag available single device width expansion modes. These FIFOs fabricated using IDT's high-speed CMOS technology. They designed applications requiring asynchronous simultaneous read/writes multiprocessing, rate buffering other applications. Military grade product manufactured compliance with latest revision MIL-STD-883, Class
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS -D8) WRITE CONTROL
ARRAY
WRITE POINTER
2,048 4,096 8,192 16,384 32,768 65,536
READ POINTER
THREESTATE BUFFERS READ CONTROL FLAG LOGIC DATA OUTPUTS
RESET LOGIC FL/RT
logo registered trademark Integrated Device Technology, Inc.
EXPANSION LOGIC
XO/HF
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COMMERCIAL, MILITARY INDUSTRIAL TEMPERATURE RANGES
2001 Integrated Device Technology, Inc.
2001
DSC-2661/12
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
CONFIGURATIONS
FL/RT XO/HF
INDEX
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VIEW
Package Type PLASTIC PLASTIC THIN CERDIP THIN CERDIP SOIC
Reference Identifier P28-1 P28-2 D28-1 D28-3 SO28-3
Order Code
Device Availability devices except 7207/7208 except 7208 Only 7203/7204/7205 Only 7204
Package Type PLCC LCC(1)
Reference Identifier J32-1 L32-1
VIEW Order Code Symbol Parameter Supply Voltage Commercial/Industrial/Military Supply Voltage Input High Voltage Commercial/Industrial Input High Voltage Military Input Voltage Commercial/Industrial/Military Operating Temperature Commercial Operating Temperature Industrial Operating Temperature Military
FL/RT XO/HF
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Device Availability devices except 7208
NOTE: This package only available military temperature range.
RECOMMENDED OPERATING CONDITIONS
Min. Typ. Max. Unit
ABSOLUTE MAXIMUM RATINGS
Symbol TERM Rating Terminal Voltage with Respect Storage Temperature Output +Current Com'l Ind'l -0.5 +7.0 Military -0.5 +7.0 Unit
VIH(1) +155
TSTG
NOTE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
NOTES: RT/RS/XI input, 2.6V (commercial). RT/RS/XI input, 2.6V (military). 1.5V undershoots allowed 10ns once cycle.
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
ELECTRICAL CHARACTERISTICS
(Commercial: 10%, +70°C; Industrial: 10%, -40°C +85°C; Military: 10%, -55°C +125°C)
IDT7203(1) IDT7204(1) Commercial Industrial Symbol
IDT7203 IDT7204 Military(3) Min. Typ. IDT7205 IDT7206 IDT7207 Military Min. Typ. Max. Unit Max. Unit
Parameter Input Leakage Current (Any Input) Output Leakage Current Output Logic Voltage -2mA Output Logic Voltage Active Power Supply Current Standby Current (R=W=RS=FL/RT=VIH) Power Down Current
Min.
Typ.
Max.
ILO(7) ICC1(8,9,10) ICC2(8,10,11) ICC3(8,10,12)
IDT7205(2) IDT7206(2,4) IDT7207(2,4) IDT7208(2,5) Commercial Industrial Symbol ILI(6)
Parameter Input Leakage Current (Any Input) Output Leakage Current Output Logic Voltage -2mA Output Logic Voltage
Min.
Typ.
Max.
ICC1
(8,9,10)
Active Power Supply Current Standby Current (RS=FL/RT=VIH) Power Down Current
ICC2(8,10,11) ICC3(8,10,12)
NOTES: Industrial temperature range product 15ns 25ns speed grades available standard device. Industrial temperature range product 25ns speed grade only available standard device. other speed grades available special order. Military temperature range product 40ns only available 7203. Commercial temperature range product 12ns available. Commercial temperature range product 12ns, 15ns 50ns available.
Measurements with VCC. VIH, VOUT VCC. Tested with outputs open (IOUT toggle data inputs switch MHz. measurements made with outputs open. Inputs 0.2V 0.2V, except which toggle 20MHz. Inputs 0.2V 0.2V, except -0.2V.
TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load 3.0V 1.5V 1.5V Figure
1.1K D.U.T. 30pF*
CAPACITANCE
Symbol CIN(1) COUT(1,2)
+25°C, MHz)
Condition VOUT Max. Unit
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Parameter Input Capacitance Output Capacitance
equivalent circuit
NOTES: This parameter sampled 100% tested. With output deselected.
Figure Output Load
*Includes scope capacitances.
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
ELECTRICAL CHARACTERISTICS(1)
(Commercial: 10%, +70°C; Industrial: 10%, -40°C +85°C; Military: 10%, -55°C +125°C)
Commercial IDT7203L12 IDT7204L12 IDT7205L12 Com'l Ind'l IDT7203L15(2) IDT7204L15(2) IDT7205L15 IDT7206L15 IDT7207L15 Min. Max. Com'l Military IDT7203L20 IDT7204L20 IDT7205L20 IDT7206L20 IDT7207L20 Min. Max. 33.3 Commercial IDT7208L20 Com'l Ind'l IDT7203L25(2) IDT7204L25(2) IDT7205L25(3) IDT7206L25(3) IDT7207L25(3) IDT7208L25(3) Min. Max. 28.5 Unit
Symbol tRPW tRLZ tWLZ tRHZ tWPW tRSC tRSS tRTR tRTC tRTS tRTR tEFL tHFH, tFFH tRTF tREF tRFF tRPE tWEF tWFF tWHF tRHF tWPF tXOL tXOH tXIR tXIS
Parameters Shift Frequency Read Cycle Time Access Time Read Recovery Time Read Pulse Width(4) Read Data LOW(5) Write HIGH Data Low-Z(5,6) Data Valid from Read HIGH Read HIGH Data High-Z(5) Write Cycle Time Write Pulse Width(4) Write Recovery Time Data Set-up Time Data Hold Time Reset Cycle Time Reset Pulse Width(4) Reset Set-up Time(5) Reset Recovery Time Retransmit Cycle Time Retransmit Pulse Width(4) Retransmit Set-up Time(5) Retransmit Recovery Time Reset Reset HIGH Retransmit Flags Valid Read Read HIGH HIGH Read Pulse Width after HIGH Write HIGH HIGH Write Write Flag Read HIGH Flag HIGH Write Pulse Width after HIGH Read/Write Read/Write HIGH HIGH Pulse Width(4) Recovery Time Set-up Time
Min.
Max.
Min.
Max. 33.3
NOTES: Timings referenced Test Conditions. Industrial temperature range product 15ns 25ns speed grades available standard device. Industrial temperature range product 25ns speed grade only available standard device. other speed grades available special order. Pulse widths less than minimum allowed. Values guaranteed design, currently tested. Only applies read data flow-through mode.
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
ELECTRICAL CHARACTERISTICS(1) (Continued)
(Commercial: 10%, +70°C; Industrial: 10%, -40°C +85°C; Military: 10%, -55°C +125°C)
Military IDT7203L30 IDT7204L30 IDT7205L30 IDT7206L30 IDT7207L30 Symbol tRPW tRLZ tWLZ tRHZ tWPW tRSC tRSS tRTR tRTC tRTS tRTR tEFL tHFH, tFFH tRTF tREF tRFF tRPE tWEF tWFF tWHF tRHF tWPF tXOL tXOH tXIR tXIS Parameters Shift Frequency Read Cycle Time Access Time Read Recovery Time Read Pulse Width(2) Read Data LOW(3) Write HIGH Data Low-Z(3,4) Data Valid from Read HIGH Read HIGH Data High-Z(3) Write Cycle Time Write Pulse Width(2) Write Recovery Time Data Set-up Time Data Hold Time Reset Cycle Time Reset Pulse Width(2) Reset Set-up Time(3) Reset Recovery Time Retransmit Cycle Time Retransmit Pulse Width(2) Retransmit Set-up Time(3) Retransmit Recovery Time Reset Reset HIGH Retransmit Flags Valid Read Read HIGH HIGH Read Pulse Width after HIGH Write HIGH HIGH Write Write Flag Read HIGH Flag HIGH Write Pulse Width after HIGH Read/Write Read/Write HIGH HIGH Pulse Width(2) Recovery Time Set-up Time Min. Max. Commercial IDT7203L35 IDT7204L35 IDT7205L35 IDT7206L35 IDT7207L35 IDT7208L35 Min. Max. 22.22 Military IDT7203L40 Commercial IDT7203L50 IDT7204L50 IDT7205L50 IDT7206L50 IDT7207L50 Min. Max. Unit
Min.
Max.
NOTES: Timings referenced Test Conditions. Pulse widths less than minimum allowed. Values guaranteed design, currently tested. Only applies read data flow-through mode.
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
SIGNAL DESCRIPTIONS INPUTS:
DATA (D0-D8) Data inputs 9-bit wide data.
RESET Reset accomplished whenever Reset (RS) input taken state. During reset, both internal read write pointers first location. reset required after power-up before write operation take place. Both Read Enable Write Enable inputs must HIGH state during window shown Figure (i.e. tRSS before rising edge should change until tRSR after rising edge WRITE ENABLE write cycle initiated falling edge this input Full Flag (FF) set. Data set-up hold times must adheredto, with respect rising edge Write Enable (W). Data stored array sequentially independently on-going read operation. After half memory filled, falling edge next write operation, Half-Full Flag (HF) will LOW, will remain until difference between write pointer read pointer less-than equal one-half total memory device. Half-Full Flag (HF) then reset rising edge read operation. prevent data overflow, Full Flag (FF) will falling edge last write signal, which inhibits further write operations. Upon completion valid read operation, Full Flag (FF) will HIGH after tRFF, allowing valid write begin. When FIFO full, internal write pointer blocked from external changes will affect FIFO when full. READ ENABLE read cycle initiated falling edge Read Enable (R), provided Empty Flag (EF) set. data accessed First-In/First-Out basis, independent ongoing write operations. After Read Enable goes HIGH, Data Outputs through will return highimpedance condition until next Read operation. When data been read from FIFO, Empty Flag (EF) will LOW, allowing "final" read cycle inhibiting further read operations, with data outputs remaining highimpedance state. Once valid write operation been accomplished, Empty Flag (EF) will HIGH after tWEF valid Read then begin. When FIFO empty, internal read pointer blocked from external changes will affect FIFO when empty. FIRST LOAD/RETRANSMIT FL/RT This dual-purpose input. Depth Expansion Mode, this grounded indicate that first device
CONTROLS:
loaded (see Operating Modes). Single Device Mode initiated grounding Expansion (XI). made retransmit data when Retransmit Enable Control (RT) input pulsed LOW. retransmit operation will internal read pointer first location will affect write pointer. status Flags will change depending relative locations read write pointers. Read Enable Write Enable must HIGH state during retransmit. This feature useful when less than 2,048/ writes performed between resets. retransmit feature compatible with Depth Expansion Mode. EXPANSION This input dual-purpose pin. Expansion (XI) grounded indicate operation single device mode. Expansion (XI) connected Expansion (XO) previous device Depth Expansion Daisy-Chain Mode.
OUTPUTS:
FULL FLAG Full Flag (FF) will LOW, inhibiting further write operations, when device full. read pointer moved after Reset (RS), Full Flag (FF) will after writes. EMPTY FLAG Empty Flag (EF) will LOW, inhibiting further read operations, when read pointer equal write pointer, indicating that device empty. EXPANSION OUT/HALF-FULL FLAG XO/HF This dual-purpose output. single device mode, when Expansion (XI) grounded, this output acts indication half-full memory. After half memory filled, falling edge next write operation, Half-Full Flag (HF) will will remain until difference between write pointer read pointer less than equal half total memory device. Half-Full Flag (HF) then reset rising edge read operation. Depth Expansion Mode, Expansion (XI) connected Expansion (XO) previous device. This output acts signal next device Daisy Chain providing pulse next device when previous device reaches last location memory. There will pulse when Write pointer reaches last location memory, additional pulse when Read pointer reaches last location memory. DATA OUTPUTS (Q0-Q8) Q0-Q8 data outputs 9-bit wide data. These outputs high-impedance condition whenever Read HIGH state.
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
tRSC tRSS tEFL tHFH, tFFH
NOTE: around rising edge
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tRSS tRSR
Figure Reset
tRLZ Q0-Q8 tWPW D0-D8 DATA VALID
tRPW
tRHZ DATA VALID
DATA VALID
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DATA VALID
Figure Asynchronous Write Read Operation
LAST WRITE tWFF
IGNORED WRITE
FIRST READ
tRFF
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Figure Full Flag Timing From Last Write First Read
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
LAST READ
IGNORED READ
FIRST WRITE
tREF DATA VALID
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tWEF
Figure Empty Flag Timing From Last Read First Write
tRTC tRTS tRTR
tRTF
NOTE: change status during Retransmit, flags will valid tRTC.
FLAG VALID
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Figure Retransmit
tWEF tRPE
Figure Minimum Timing Empty Flag Coincident Read Pulse.
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tRFF tWPF
Figure Minimum Timing Full Flag Coincident Write Pulse.
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CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
tWHF
HALF-FULL LESS MORE THAN HALF-FULL
tRHF
HALF-FULL LESS
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Figure Half-Full Flag Timing
WRITE LAST PHYSICAL LOCATION READ FROM LAST PHYSICAL LOCATION
tXOL
tXOH
tXOL
tXOH
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Figure Expansion
tXIS
WRITE FIRST PHYSICAL LOCATION
tXIR
tXIS
READ FROM FIRST PHYSICAL LOCATION
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Figure Expansion
OPERATING MODES:
Care must taken assure that appropriate flag monitored each system (i.e. monitored device where used; monitored device where used). additional information IDT7203/7204/ 7205/7206/7207, refer Tech Note Operating FIFOs Full Empty Boundary Conditions Tech Note Designing with FIFOs. Single Device Mode single used when application requirements words less. These FIFOs Single Device Configuration when Expansion (XI) control input grounded (see Figure 12). Depth Expansion These FIFOs easily adapted applications when requirements greater than words. Figure demonstrates Depth Expansion using three IDT7203/7204/7205/ 7206/7207/7208s. depth attained adding additional IDT7203/
7204/7205/7206/7207/7208s. These devices operate Depth Expansion mode when following conditions met: first device must designated grounding First Load (FL) control input. other devices must have HIGH state. Expansion (XO) each device must tied Expansion (XI) next device. Figure External logic needed generate composite Full Flag (FF) Empty Flag (EF). This requires ORing ORing (i.e. must generate correct composite EF). Figure Retransmit (RT) function Half-Full Flag (HF) available Depth Expansion Mode. additional information IDT7203/7204/7205/7206/7207, refer Tech Note Cascading FIFOs FIFO Modules.
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
USAGE MODES:
Width Expansion Word width increased simply connecting corresponding input control signals multiple devices. Status flags (EF, detected from device. Figure demonstrates 18-bit word width using word width attained adding additional (Figure 13). Bidirectional Operation Applications which require data buffering between systems (each system capable Read Write operations) achieved pairing shown Figure Both Depth Expansion Width Expansion used this mode. Data Flow-Through types flow-through modes permitted, read flow-through write flow-through mode. read flow-through mode (Figure 17),
FIFO permits reading single word after writing word data into empty FIFO. data enabled (tWEF after rising edge called first write edge, remains until line raised from LOW-to-HIGH, after which would into three-state mode after tRHZ line would have pulse showing temporary deassertion then would asserted. write flow-through mode (Figure 18), FIFO permits writing single word data immediately after reading word data from full FIFO. line causes deasserted line being causes asserted again anticipation data word. rising edge word loaded FIFO. line must toggled when asserted write data FIFO increment write pointer. Compound Expansion expansion techniques described above applied together straightforward manner achieve large FIFO arrays (see Figure 15).
(HALF-FULL FLAG) WRITE DATA FULL FLAG (FF) RESET (RS)
(HF) 7203 7204 7205 7206 7207 7208 READ DATA EMPTY FLAG (EF) RETRANSMIT (RT)
EXPANSION (XI)
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Figure Block Diagram 2,048 4,096 8,192 16,384 32,768 65,536 FIFO Used Single Device Mode
DATA WRITE FULL FLAG (FF) RESET (RS) 7203 7204 7205 7206 7207 7208
7203 7204 7205 7206 7207 7208
READ EMPTY FLAG (EF) RETRANSMIT (RT)
DATA
NOTE: Flag detection accomplished monitoring signals either (any) device used width expansion configuration. connect output signals together.
2661 drw15
Figure Block Diagram 2,048 4,096 8,192 16,384 32,768 65,536 FIFO Memory Used Width Expansion Mode
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
TRUTH TABLES TABLE RESET RETRANSMIT
SINGLE DEVICE CONFIGURATION/WIDTH EXPANSION MODE
Mode Reset Retransmit Read/Write
NOTE: Pointer will Increment flag HIGH.
Inputs FL/RT
Read Pointer Location Zero Location Zero Increment(1)
Internal Status Write Pointer Location Zero Unchanged Increment(1)
Outputs
TABLE RESET FIRST LOAD
DEPTH EXPANSION/COMPOUND EXPANSION MODE
Mode Reset First Device Reset Other Devices Read/Write Inputs FL/RT Read Pointer Location Zero Location Zero Internal Status Write Pointer Location Zero Location Zero Outputs
NOTES: connected previous device. Figure Reset Input, FL/RT First Load/Retransmit, Empty Flag Output, Full Flag Output, Expansion Input, Half-Full Flag Output
7203 7204 7205 7206 7207 7208
FULL
7203 7204 7205 7206 7207 7208
EMPTY
7203 7204 7205 7206 7207 7208
2661 drw16
Figure Block Diagram 6,144 12,288 24,576 49,152 98,304 196,608 FIFO Memory (Depth Expansion)
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
Q0-Q8 Q0-Q8
IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 DEPTH EXPANSION BLOCK
Q9-Q17 Q9-Q17
IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 DEPTH EXPANSION BLOCK IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 DEPTH EXPANSION BLOCK
Q(N-8)-QN
Q(N-8)-QN
D0-D8 D0-DN D9-DN
NOTES: depth expansion block section Depth Expansion Figure Flag detection section Width Expansion Figure
D9-D17 D18-DN D(N-8)-DN
D(N-8)-DN
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Figure Compound FIFO Expansion
7203 7204 7205 7201A 7206 7207 7208
SYSTEM
SYSTEM
7203 7204 7205 7206 7207 7208
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Figure Bidirectional FIFO Operation
CMOS ASYNCHRONOUS FIFO 2,048 4,096 8,192 16,384 32,768 65,536
COMMERCIAL, INDUSTRIAL MILITARY TEMPERATURE RANGES
DATA tRPE
tWLZ DATA
Figure Read Data Flow-Through Mode
tWEF
tREF DATA VALID
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tWPF tRFF tWFF DATA
DATA
VALID
DATA
DATA
VALID
2661 drw20
Figure Write Data Flow-Through Mode
ORDERING INFORMATION
XXXX Device Type Power Speed Package Process/ Temperature Range Blank I(1) Commercial (0°C +70°C) Industrial (>40° +85°C) Military (>55°C +125°C) Compliant MIL-STD-883, Class Plastic P28-1 Plastic Thin P28-2 CERDIP D28-1 Thin CERDIP D28-3 Plastic Leaded Chip Carrier PLCC J32-1 Leadless Chip Carrier L32-1 Small Outline SOIC SO28-3 Commercial 7203/04/05 Only Commercial (Industrial only 7203/04) Commercial Military Commercial Industrial Military Only Commercial Only Military 7203 Only Commercial Only
L(2) 20(3) 25(3) 35(3)
(all except 7207/7208) (all except 7208) (only 7203/7204/7205) (all except 7208) (only 7204)
Access Time (tA) Speed Nanoseconds
Power
7203 2,048 FIFO 7204 4,096 FIFO 7205 8,192 FIFO 7206 16,384 FIFO 7207 32,768 FIFO 7208(3) 65,536 FIFO
2661 drw21
NOTES: Industrial temperature range product 15ns 25ns speed grades available standard device IDT7203/7204, 25ns speed grade only available standard device IDT7205/7206/7207/7208. other speed grades available special order. only available military temperature range. 7208 only available commercial speed grades
DATA SHEET HISTORY
05/10/2001 05/30/2001 pgs. CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054 SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com TECH SUPPORT: 408-330-1753 e-mail: FIFOhelp@idt.com
Pkg: www.idt.com/docs/PSC4003.pdf Pkg: www.idt.com/docs/PSC4018.pdf Pkg: www.idt.com/docs/PSC2025.pdf Pkg: www.idt.com/docs/PSC2066.pdf Pkg: www.idt.com/docs/PSC4013.pdf L(2) Pkg: www.idt.com/docs/PSC2002.pdf Pkg: www.idt.com/docs/PSC4016.pdf search sales office near you, please click sales button found home page dial 800# above press logo registered trademark Integrated Device Technology, Inc.

IDT7203 IDT7204 IDT7205 IDT7206 IDT7207 IDT7208 First-In/First-Ou

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