LC868900/10/50/60 LC868900/10/50/60 Column Driver Matrix Gra

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LC868900/10/50/60 LC868900/10/50/60 Column Driver Matrix Gra

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Ordering number ENN*6709
LC868900/10/50/60
LC868900/10/50/60
Column Driver Matrix Graphic
Preliminary Overview
LC868900 column (segment) driver with display liquid crystal matrix-graphic display. stores display data sent from 8-bit microcontroller internal display generates matrix signals. LC868900 control graphic mode, which each data from internal either lights does light LCD. LC868900 fabricated using CMOS process technology, combining with CMOS microcontroller produces devices power demand.
Feature
Classification Interfacing allowed with 80-family LC868900 640!8-bit LC868910 1280!8-bit Interfacing allowed with motorola-family LC868950 640!8-bit LC868960 1280!8-bit Segment outputs segment outputs Segment display direction programmable Automatic display controller Display duty duty Instruction functions display Control horizontal display bits Vertical display scroll function Selectable display data output Read Write display data Read busy flag
bits)!(horizontal display bytes) start address register 'Logical-OR output' 'Exclusive-OR output'
SANYO products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO representative nearest before using SANYO products described contained herein such applications. SANYO assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO products described contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Ver. 1.03 61295 D2800 (IM) No.6709-1/20
LC868900/10/50/60
Power supply Logic circuit (VDD) drive circuit VDD-15V CMOS process Factory shipment Chip delivery form QFP100
Assignment
ILC00170
Package Dimensions
unit 3151
0.825
0.575 0.65 23.2 20.0 0.575 0.15
17.2
14.0
0.65
0.825
21.6
SANYO QIP-100E
3.0max
15.6
No.6709-2/20
LC868900/10/50/60 Layout
Chip size (X!Y) Thickness chip size 5.71mm!4.43mm 480µs 120µm!120µm
ILC00171
No.6709-3/20
LC868900/10/50/60 Name cordinates table
Name Cordinates 2645 1974 2483 1974 2320 1974 2158 1974 1995 1974 1833 1974 1670 1974 1508 1974 1345 1974 1183 1974 1020 1974 1974 1974 1974 1974 1974 1974 1974 1974 1974 1974 1974 1974 1092 1974 1255 1974 1417 1974 1580 1974 1742 1974 1905 1974 2658 1985 2658 1823 2658 1660 2658 1498 2658 1335 2658 1173 2658 1010 2658 2658 2658 2658 2658 2658 2658 2658 2658 2658 2658 2658 2658 1102 2658 1265 Name Cordinates 2572 2019 2409 2019 2247 2019 2084 2019 1922 2019 1759 2019 1597 2019 1434 2019 1272 2019 1109 2019 2019 2019 2019 2019 2019 2019 2019 2019 2019 2019 2019 2019 1003 2019 1166 2019 1328 2019 1491 2019 1653 2019 1816 2019 1978 2019 2141 2019 2540 1905 2540 1734 2540 1563 2540 1392 2540 1221 2540 1051 2540 2540 2540 2540 2540 2540 2540 2540 2540 2540 2540 2517 2517 1106 2571 1268
Notes When chip used, connect substrate chip open). package immerse solder tank when mounting substrate, inquire company about conditions
No.6709-4/20
LC868900/10/50/60 Block Diagram
DRIVER Pararell-Serial
DUTY REGISTER MODE REGISTER TIMING GENERATOR
SCREEN START ADDRESS
DOUT
SCREEN START ADDRESS
UPPER ADDRESS
CURSOL ADDRESS HIGH
CURSOL ADDRESS
(640 BYTES) (1280 BYTES)
HORIZONTAL CHARACTER NUMBER REGISTER OUTPUT BUFFER INSTRUCTION REGISTER HORIZONTAL REGISTER
LOWER ADDRESS
DATA REGISTER
DOUT
ILC00172
Description
Input Output Input Output Function Description Should connected with negative supply voltage pin. Should connected with positive supply voltage pin. Built-in Data pull-up resistor terminal transmitting receiving data from Reset, built-in pull-up resistor Chip select Selection allowed when CS=0, built-in pull-up resistor Read signal LC868900 series, built-in pull-up resistor Write signal LC868900 series, built-in pull-up resistor Register select RS=1 instruction register, RS=0 data register Built-in Pull-up resistor Signal display (clock signal), built-in pull-down resistor Signal display (synchronization), built-in pull-up resistor Voltage supply pins drivers
Input Input Input Input Input Input Input Output
Segment driver pins display
No.6709-5/20
LC868900/10/50/60
Absolute Maximum Ratings VSS=0V Ta=25°C Parameter Supply voltage Input voltage Input voltage Symbol Pins Conditions VDD[V] min. VDD- VDD- 70°C Ratings typ. max. +7.0 VDD+0.3 VDD+0.3 VDD+0.3 VDD+0.3 VDD+0.3 unit
VNMAX VI(1) VI(2) CL2, (Input mode) (Output mode) QFP100E
Output voltage
VO(1) VO(2) Pdmax
Power dissipation (max.) Operating temperature range Storage temperature range
Topg
Tstg
*Satisfy next condition
No.6709-6/20
LC868900/10/50/60
Recommended Operating Range 30°C +70°C, VSS=0V Parameter Operating supply voltage range HOLD voltage Symbol Pins Conditions FCL2 500kHz min. Ratings typ. max. unit
Input high voltage
VIH(1) VIH(2) VIH(3)
CL2, CL2,
Input voltage
VIL(1) VIL(2) VIL(3)
Input clock frequency
FCL2
RAMs Registers hold voltage standby mode. Input mode Input mode
0.75VDD 0.75VDD 0.75VDD 0.75VDD
0.25VDD 0.25VDD 0.25VDD 0.25VDD
[Notes] specifications above mounted QFP100E type package. However, ship this product only, package chip. Therefore, operational characteristics vary depending user's packaging techniques.
No.6709-7/20
LC868900/10/50/60
Electrical Characteristics 30°C +70°C, VSS=0V Parameter Output high voltage Symbol IOH(1) Pins DB80 Conditions min. Ratings typ. max. 1500 1500 1500 unit
Output voltage
VOL(1)
VDD-Si drop voltage (i:1 VX-Si drop voltage (X:2, (i:1 Pull-up resistor
VD(1)
VD(2)
Rpu(1)
Rpu(2) Pull-down resistor Hysteresis voltage Current dissipation operaion Current dissipation stand-by mode RPD(1) VHIS IDD(1)
mode 0.6mA mode 0.1mA mode mode terminal 90µA V5=11V terminal 15µA V5=11V terminal 90µA V5=11V terminal 15µA V5=11V mode mode VIN=0V VIN=0V VIN=0V VIN=0V 0.1VDD
IDD(2)
0.05
0.02
Open
Open
FCL2=500kHz
FCL2=0Hz
Open
LC868900
Open
Open
LC868900
Open
Figure1. Current dissipation measuring circuit operation
ILC00173
Figure2. Current dissipation measuring circuit stand-by mode
ILC00174
No.6709-8/20
LC868900/10/50/60
Characteristics 30°C +70°C, VSS=0V Interface Reading cycle
DB0-7
ILC00175
Writing cycle
DB0-7
ILC00176
Item cycle time
Symbol tcyc1 tcyc2
Conditions
pulse width pulse width Rise fall time Address set-up time
tpw1 tr1, tAS1 tAS2
DB7, CL=50pF DB7, CL=50pF DB7, CL=50pF DB7, CL=50pF
Address hold time
tAH1 tAH2
Data delay time Data hold time Data set-up time Data hold time
tDDR1 tDHR1 tDSW1 tDHW1
Value min. max. (500) (500) (220) (20) (40) (40) (10) (10) (120) (20) (60) (10)
unit
CL=Load capacitance
No.6709-9/20
LC868900/10/50/60
Display Control Timing 30°C +70°C, VSS=0V
0.7VDD 0.3VDD 0.7VDD 0.3VDD
ILC00177
Item level pulse width High level pulse width Rise time Fall time delay time
Symbol tWLCL2 tWLCL2
Conditions
Value min. max. (800) (800) (20) (20) (60)
unit
No.6709-10/20
LC868900/10/50/60 Example reference circuit
dots
1~64 Panel 64x80 dots 1~80
LC868016 V1~V5
LC868900
ILC00178
dots
1~64 1~80 Panel 64x160 dots 81~160
LC868901
V1~V5
LC868900
V1~V5
LC868900
V1~V5
LC868016
ILC00179
dots
1~65 1~80 Panel 65x160 dots 81~160
LC868901
V1~V5
LC868910
V1~V5
LC868910
V1~V5
LC868016
ILC00180
No.6709-11/20
LC868900/10/50/60 Functions
Display Control instructions Display controlled writing data into instruction register data registers. instruction register data register distinguished signal. First, write 4-bit data into instruction register when RS=1, then specify code data register. Next, with RS=0, write 8-bit data data register, which executes specified instruction. instruction cannnot accepted while instruction being excuted. BUSY flag under this condition, write instruction only after reading BUSY flag making sure that '0'. BUSY flag does change when data written into instruction register (RS=1). flag when data written into data register RS=0. Therefore, BUSY flag need checked immediately after writing data into instruction register. Instruction register data registers display mode Write code '00H' hexadecimal notation) into instruction register specify mode control register. REGISTER Instruction MODE MODE0 Mode data (MODE)
MODE1
MODE2
MODE3
bit0 MODE MODE0=1 Screen1 display MODE0=0 Screen1 display bit1 MODE MODE1=1 Screen2 display MODE1=0 Screen2 display bit2 MODE MODE2=1 Exclusive-OR display between Screen1 Screen2 MODE2=0 display between Screen1 Screen2 bit3 MODE MODE3=1 Output data right-shift S80) MODE3=0 Output data left-shift (S80
[Note] MODE7 MODE5 must take '0'. malfunction occurs when these bits takes '1'. display pitch Write code '01H' hexadecimal notation) into instruction register specify Display Pitch register. REGISTER Instruction PITCH
No.6709-12/20
LC868900/10/50/60
indicates many bits dots) from appear 1-byte display. must take following three value. Display pitch
display number Write code '02H' hexadecimal notation) into instruction register specify Display Number register. REGISTER Instruction NUMBER
indicates number bytes horizontal direction. total number dots positioned horizontally screen, given following formura. N=Dp (N80) Numbers range decimal) number time division Write code '03H' hexadecimal notation) into instruction register specify Time Division register. REGISTER Instruction Division
represents number time divisions. Consequently, display duty. Numbers range decimal) screen1 display start address Write code '08H' hexadecimal notation) into instruction register specify Screen1 Start Address register. REGISTER Instruction Screen1 Screen1 Start Address
This instruction writes display-start upper address value Screen1 Start Address register. display start address address whitch data displayed leftmost position (MODE3=0) rightmost position (MODE3=1) line screen stored.
No.6709-13/20
LC868900/10/50/60
MODE3=1 Start rightmost position MODE3=0 Start leftmost position start upper address counter 7-bit down-counter with preset function. start upper address decremented when start lower address underflow. When start upper address decremented during state, start addressvalue automatically. Internal RAM=1280 bytes Start upper address counter=7FH Internal RAM= bytes Start upper address counter=3FH screen2 display start address Write code '09H' hexadecimal notation) into instruction register specify Screen2 Start Address register. REGISTER Instruction Screen2 Screen2 Start Address
This instruction writes display-start upper address value Screen2 Start Address register. display start address address whitch data displayed leftmost position (MODE3=0) rightmost position (MODE3=1) line screen stored. MODE3=1 Start rightmost position MODE3=0 Start leftmost position start upper address counter 7-bit down-counter with preset function. start upper address decremented when start lower address underflow.When start upper address decremented during state, start address value automatically. Internal RAM=1280 bytes Start upper address counter=7FH Internal RAM= bytes Start upper address counter=3FH cursor (lower) address (RAM read/write lower address) Write code '0AH' hexadecimal notation) into instruction register lower cursor address register. REGISTER Instruction Lower Lower cursor address
This instruction writes cursor address value cursor address counter. curosr address indicates address exchanging display data with display RAM. other words, data address specified cursor address read form written into display RAM. cursor address divided into lower address bits) cursor lower address counter 4-bit down-counter with preset function. cursor lower address decreased every read/write timing. When cursor lower address decreased during state, Dn-1 automatically.
No.6709-14/20
LC868900/10/50/60
cursor (upper) address (RAM read write upper address) Write code '0BH' hexadecimal notation) into instruction register upper cursor address register. REGISTER Instruction Upper Upper cursor address
This instruction writes cursor address value cursor address counter. curosr address indicates address exchanging display data with display RAM. other words, data address specified cursor address read form written into display RAM. cursor address divided into upper addres bits). cursor upper address counter 7-bit down-counter with preset funciton. cursor upper address decreased when cursor lower address underflow. When cursor upper address decreased during state, cursor upper address number automatically. Writing display data Write code '0EH' hexadecimal notation) into instruction register. REGISTER Instruction
After writing code '0EH' write 8-bit data with RS=0, data written into display data address specified cursor adress counter. After writing, count cursor address counter decrements one. Reading display data Write code '0FH' hexadecimal notation) into instruction register. REGISTER Instruction
read status established with RS=0, data read. procedure reading data follows: instruction outputs contents data output register DB7. Transfer data indicated cursor address data output registser. then decrements cursor address one. Refer next figure.
Conditions
Instruction register (IR)
Data output resister Data output register
data
Cursor address counter
bits
bits
control (OE)
ILC00181
No.6709-15/20
LC868900/10/50/60
correct data cannot read first read operation. specified value output second read operation. Accordingly, dummy read operation must performed once when reading data after setting cursor address. Read Busy flag REGISTER Instruction Busy meaning
Busy flag output when read mode extablished with RS=1. Busy flag while instructions through (10) being executed. completion execution, allowing next instruction accepted. other instruction accepted when Busy flag Accordingly, before writing instruction data, necessary ensure that Busy flag However, next instruction executed without checking Busy flag when maximum read cycle time write cycle time been exceeded after execution previous data read instruction data write instruction. Busy flag does change when data written into instruction register (RS=1). This flag when data written into data register (RS=0). Therefore, Busy flag need checked immediately after writing data into instruction register. Specification instruction register unnecessary read Busy flag.
ex.) Writing (reading) data display Lower cursor address (CAL) Upper cursor address (CAH) Display number (Dn) Internal size 1280 bytes Address
writing operation executed when counter '0', counter decremented after writing operation. counter -1).
Specification cursor address First all, data written this address.
Decrement after writing operation.
7F0H
7F1H
7F2H
7F3H
7F4H
writing operation executed when cursor address '00H', address specified internal size counter after writing operation. Internal size 1280 bytes Internal size bytes counter -1).
ILC00239
No.6709-16/20
LC868900/10/50/60 Display examples
Mode control register=01H (screen1 screen2 OFF, Dp=8, Dn=10, Nx=64, Screen1 start address register=3FH
(3F9H) (3F8H) (3F7H) (3F6H) (3F5H) (3F4H) (3F3H) (3F2H) (3F1H) (3F0H) (3E9H) (3E8H) (3E7H) (3E6H) (3E5H) (3E4H) (3E3H) (3E2H) (3E1H) (3E0H) (3D9H) (3D8H) (3D7H) (3D6H) (3D5H) (3D4H) (3D3H) (3D2H) (3D1H) (3D0H)
(049H) (048H) (047H) (046H) (045H) (044H) (043H) (042H) (041H) (040H) (039H) (038H) (037H) (036H) (035H) (034H) (033H) (032H) (031H) (030H) (029H) (028H) (027H) (026H) (025H) (024H) (023H) (022H) (021H) (020H) (019H) (018H) (017H) (016H) (015H) (014H) (013H) (012H) (011H) (010H) (009H) (008H) (007H) (006H) (005H) (004H) (003H) (002H) (001H) (000H)
ILC00182
Mode control register=09H (screen1 screen2 OFF, S80) Dp=8, Dn=10, Nx=64, Screen1 start address register=3FH
(3F0H) (3F1H) (3F2H) (3F3H) (3F4H) (3F5H) (3F6H) (3F7H) (3F8H) (3F9H) (3E0H) (3E1H) (3E2H) (3E3H) (3E4H) (3E5H) (3E6H) (3E7H) (3E8H) (3E9H) (3D0H) (3D1H) (3D2H) (3D3H) (3D4H) (3D5H) (3D6H) (3D7H) (3D8H) (3D9H)
(040H) (041H) (042H) (043H) (044H) (045H) (046H) (047H) (048H) (049H) (030H) (031H) (032H) (033H) (034H) (035H) (036H) (037H) (038H) (039H) (020H) (021H) (022H) (023H) (024H) (025H) (026H) (027H) (028H) (029H) (010H) (011H) (012H) (013H) (014H) (015H) (016H) (017H) (018H) (019H) (000H) (001H) (002H) (003H) (004H) (005H) (006H) (007H) (008H) (009H)
ILC00183
Mode control register=09H (screen1 screen2 OFF, S80) Dp=8, Dn=10, Nx=64, Screen1 start address register=3EH Internal display 1280 bytes
(3E0H) (3E1H) (3E2H) (3E3H) (3E4H) (3E5H) (3E6H) (3E7H) (3E8H) (3E9H) (3D0H) (3D1H) (3D2H) (3D3H) (3D4H) (3D5H) (3D6H) (3D7H) (3D8H) (3D9H) (3C0H) (3C1H) (3C2H) (3C3H) (3C4H) (3C5H) (3C6H) (3C7H) (3C8H) (3C9H)
(030H) (031H) (032H) (033H) (034H) (035H) (036H) (037H) (038H) (039H) (020H) (021H) (022H) (023H) (024H) (025H) (026H) (027H) (028H) (029H) (010H) (011H) (012H) (013H) (014H) (015H) (016H) (017H) (018H) (019H) (000H) (001H) (002H) (003H) (004H) (005H) (006H) (007H) (008H) (009H) (7F0H) (7F1H) (7F2H) (7F3H) (7F4H) (7F5H) (7F6H) (7F7H) (7F8H) (7F9H)
ILC00184
No.6709-17/20
LC868900/10/50/60
Mode control register=09H (screen1 screen2 OFF, S80) Dp=8, Dn=10, Nx=64, Screen1 start address register=3EH Internal display bytes
(3E0H) (3E1H) (3E2H) (3E3H) (3E4H) (3E5H) (3E6H) (3E7H) (3E8H) (3E9H) (3D0H) (3D1H) (3D2H) (3D3H) (3D4H) (3D5H) (3D6H) (3D7H) (3D8H) (3D9H) (3C0H) (3C1H) (3C2H) (3C3H) (3C4H) (3C5H) (3C6H) (3C7H) (3C8H) (3C9H)
(030H) (031H) (032H) (033H) (034H) (035H) (036H) (037H) (038H) (039H) (020H) (021H) (022H) (023H) (024H) (025H) (026H) (027H) (028H) (029H) (010H) (011H) (012H) (013H) (014H) (015H) (016H) (017H) (018H) (019H) (000H) (001H) (002H) (003H) (004H) (005H) (006H) (007H) (008H) (009H) (3F0H) (3F1H) (3F2H) (3F3H) (3F4H) (3F5H) (3F6H) (3F7H) (3F8H) (3F9H)
ILC00185
Mode control register=03H (screen1 screen2 logical output screen1 screen2, Dp=8, Dn=10, Nx=64, Screen1 start address register=3FH Screen2 start address register=7FH, Internal display 1280 bytes
(3F9H 7F9H) (3E9H 7E9H) (3D9H 7D9H)
(3F8H 7F8H) (3E8H 7E8H) (3D8H 7D8H)
(3F7H 7F7H) (3E7H 7E7H)
(3F6H 7F6H) (3E6H 7E6H)
(3F1H 7F1H) (3E1H 7E1H) (3D1H 7D1H)
(3F0H 7F0H) (3E0H 7E0H) (3D0H 7D0H)
(3D7H 7D7H) (3D6H 7D6H)
(049H 449H) (039H 439H) (029H 429H) (019H 419H) (009H 409H)
(048H 448H) (038H 438H) (028H 428H) (018H 418H) (008H 408H)
(047H 447H) (037H 437H) (027H 427H) (017H 417H) (007H 407H)
(046H 446H) (036H 436H) (026H 426H) (016H 416H) (006H 406H)
(041H 441H) (031H 431H) (021H 421H) (011H 411H) (001H 401H)
(040H 440H) (030H 430H) (020H 420H) (010H 410H) (000H 400H)
ILC00186
Mode control register=03H (screen1 screen2 logical output screen1 screen2, Dp=8, Dn=10, Nx=32, Screen1 start address register=3FH Screen2 start address register=1FH, Internal display bytes
(3F9H 1F9H) (3E9H 1E9H) (3D9H 1D9H)
(3F8H 1F8H) (3E8H 1E8H) (3D8H 1D8H)
(3F7H 1F7H) (3E7H 1E7H)
(3F6H 1F6H) (3E6H 1E6H)
(3F1H 1F1H) (3E1H 1E1H) (3D1H 1D1H)
(3F0H 1F0H) (3E0H 1E0H) (3D0H 1D0H)
(3D7H 1D7H) (3D6H 1D6H)
(249H 049H) (239H 039H) (229H 029H) (219H 019H) (209H 009H)
(248H 048H) (238H 038H) (228H 028H) (218H 018H) (208H 008H)
(247H 047H) (237H 037H) (227H 027H) (217H 017H) (207H 007H)
(246H 046H) (236H 036H) (226H 026H) (216H 016H) (206H 006H)
(241H 041H) (231H 031H) (221H 021H) (211H 011H) (201H 001H)
(240H 040H) (230H 030H) (220H 020H) (210H 010H) (200H 000H)
ILC00187
No.6709-18/20
LC868900/10/50/60
Mode control register=07H (screen1 screen2 exclusive-OR output screen1 screen2, Dp=8, Dn=10, Nx=64, Screen1 start address register=3FH Screen2 start address register=7FH, Internal display 1280 bytes
(3F9H 7F9H) (3F8H 7F8H) (3F7H 7F7H) (3F6H 7F6H) (3E9H 7E9H) (3E8H 7E8H) (3E7H 7E7H) (3E6H 7E6H) (3D9H 7D9H) (3D8H 7D8H) (3D7H 7D7H) (3D6H 7D6H)
(3F1H 7F1H) (3F0H 7F0H) (3E1H 7E1H) (3E0H 7E0H) (3D1H 7D1H) (3D0H 7D0H)
(049H 449H) (048H 448H) (047H 447H) (046H 446H) (039H 439H) (038H 438H) (037H 437H) (036H 436H) (029H 429H) (028H 428H) (027H 427H) (026H 426H) (019H 419H) (018H 418H) (017H 417H) (016H 416H) (009H 409H) (008H 408H) (007H 407H) (006H 406H)
(041H 441H) (040H 440H) (031H 431H) (030H 430H) (021H 421H) (020H 420H) (011H 411H) (010H 410H) (001H 401H) (000H 400H)
ILC00188
Mode control register=07H (screen1 screen2 exclusive-OR output screen1 screen2, Dp=8, Dn=10, Nx=16, Screen1 start address register=3FH Screen2 start address register=0FH
(3F9H 0F9H) (3F8H 0F8H) (3F7H 0F7H) (3F6H 0F6H) (3E9H 0E9H) (3E8H 0E8H) (3E7H 0E7H) (3E6H 0E6H) (3D9H 0D9H) (3D8H 0D8H) (3D7H 0D7H) (3D6H 0D6H)
(3F1H 0F1H) (3F0H 0F0H) (3E1H 0E1H) (3E0H 0E0H) (3D1H 0D1H) (3D0H 0D0H)
(349H 049H) (348H 048H) (347H 047H) (346H 046H) (339H 039H) (338H 038H) (337H 037H) (336H 036H) (329H 029H) (328H 028H) (327H 027H) (326H 026H) (319H 019H) (318H 018H) (317H 017H) (316H 016H) (309H 009H) (308H 008H) (307H 007H) (306H 006H)
(341H 041H) (340H 040H) (331H 031H) (330H 030H) (321H 021H) (320H 020H) (311H 011H) (310H 010H) (301H 001H) (300H 000H)
ILC00189
Mode control register=07H (screen1 screen2 output screen1 screen2, Dp=8, Dn=10, Nx=16, Screen1 start address register=3EH Screen2 start address register=0FH
(3E9H 0F9H) (3E8H 0F8H) (3E7H 0F7H) (3E6H 0F6H) (3D9H 0E9H) (3D8H 0E8H) (3D7H 0E7H) (3D6H 0E6H) (3C9H 0D9H) (3C8H 0D8H) (3C7H 0D7H) (3C6H 0D6H)
(3E1H 0F1H) (3E0H 0F0H) (3D1H 0E1H) (3D0H 0E0H) (3C1H 0D1H) (3C0H 0D0H)
(339H 049H) (338H 048H) (337H 047H) (336H 046H) (329H 039H) (328H 038H) (327H 037H) (326H 036H) (319H 029H) (318H 028H) (317H 027H) (316H 026H) (309H 019H) (308H 018H) (307H 017H) (306H 016H) (2F9H 009H) (2F8H 008H) (2F7H 007H) (2F6H 006H)
(331H 041H) (330H 040H) (321H 031H) (320H 030H) (311H 021H) (310H 020H) (301H 011H) (300H 010H) (2F1H 001H) (2F0H 000H)
ILC00190
No.6709-19/20
LC868900/10/50/60
Mode control register=02H (screen1 OFF, screen2 Dp=8, Dn=10, Nx=16, Screen2 start address register=0FH
(0F9H) (0F8H) (0F7H) (0F6H) (0F5H) (0F4H) (0F3H) (0F2H) (0F1H) (0F0H) (0E9H) (0E8H) (0E7H) (0E6H) (0E5H) (0E4H) (0E3H) (0E2H) (0E1H) (0E0H) (0D9H) (0D8H) (0D7H) (0D6H) (0D5H) (0D4H) (0D3H) (0D2H) (0D1H) (0D0H)
(049H) (048H) (047H) (046H) (045H) (044H) (043H) (042H) (041H) (040H) (039H) (038H) (037H) (036H) (035H) (034H) (033H) (032H) (031H) (030H) (029H) (028H) (027H) (026H) (025H) (024H) (023H) (022H) (021H) (020H) (019H) (018H) (017H) (016H) (015H) (014H) (013H) (012H) (011H) (010H) (009H) (008H) (007H) (006H) (005H) (004H) (003H) (002H) (001H) (000H)
ILC00200
Mode control register=09H (screen1 screen2 OFF, S80) Dp=6, Dn=8, Nx=16, Screen1 start address register=1FH
(1F0H) (1E0H) (1D0H)
(1F1H) (1E1H) (1D1H)
(1F2H) (1E2H) (1D2H)
(1F3H) (1E3H) (1D3H)
(1F4H) (1E4H) (1D4H)
(1F5H) (1E5H) (1D5H)
(1F6H) (1E6H) (1D6H)
(1F7H) (1E7H) (1D7H)
(140H) (130H) (120H) (110H) (100H)
(141H) (131H) (121H) (111H) (101H)
(142H) (132H) (122H) (112H) (102H)
(143H) (133H) (123H) (113H) (103H)
(144H) (134H) (124H) (114H) (104H)
(145H) (135H) (125H) (115H) (105H)
(146H) (136H) (126H) (116H) (106H)
(147H) (137H) (127H) (117H) (107H)
this example, constructed like following.
ILC00201
Specifications SANYO products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Electric Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO products(including technical data,services) described contained herein controlled under applicable local export control laws regulations, such products must expor without obtaining expor license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Electric Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO product that intend use. Information (including circuit diagrams circuit parameters) herein example only guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information December, 2000. Specifications information herein subject change without notice.
No.6709-20/20

LC868900/10/50/60 LC868900/10/50/60 Column Driver Matrix Gra

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