QIHPC QUAD ISDN/S(H)DSL High Voltage Power Controller Edition 200
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QIHPC QUAD ISDN/S(H)DSL High Voltage Power Controller
Edition 2001-10-31 Published Infineon Technologies St.-Martin-Strasse D-81541 Germany
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QIHPC QUAD ISDN/S(H)DSL High Voltage Power Controller
2426 Revision History: Previous Version: Page 2001-10-31 06.99 (Preliminary Data Sheet
Subjects (major changes since last revision) feature-comparison IEPC QIHPC S-feeding Updated proposal protection circuitry Table Item
questions technology, delivery prices please contact Infineon Technologies Offices Germany Infineon Technologies Companies Representatives worldwide: webpage http://www.infineon.com
2426
Table Contents Page
Overview Features Logic Symbol Typical Applications S/T-Feeding
Descriptions Configuration (top view) Definitions Functions Functional Description Functional Block Diagram Biasing Circuit Line Feed Control Circuit Line Current Control Circuit Relays Driver Circuit Application Hints Resistor RS1.4 Resistor Capacitor CS1.4 Protection Circuitry
Operational Description Electrical Characteristics Absolute Maximum Ratings AC/DC-Characteristics Operating Range Static Thermal Resistance Testing Electrical Parameters
Package Outlines
Data Sheet
2001-10-31
2426
List Figures Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Page
Logic Symbol 16-Line Card Application with DELIC, DFE-Q/T System integration Configuration Functional Block Diagram Delay time function value CS1.4 (typical values). Proposal Protection Circuitry Circuit with Power Source Test Loads" Simultaneous Power Sequence Supply Currents Line Currents Delay Time DMOS-RON resistance PF1.4, Logic Input Levels NACK1.4, Logic Output Levels RDin1.8, Relay Driver Inputs RDout1.8 Relay Driver Outputs Test circuit maximum DC-voltages, pulse voltages impulse voltages pins D1.4
Data Sheet
2001-10-31
2426
List Tables Table Table Table Table Table Page
Comparing Power Feeeding IC's: IEPC QIHPC. Definitions Functions Thermal Detector Threshold Levels. Function Table Controlling Line Characteristics
Data Sheet
2001-10-31
2426
Overview
Overview
QUAD ISDN/S(H)DSL High Voltage Power Controller provides power source four U-line interfaces S-interfaces. power source device local battery centralized power supply. Each powered line individually controlled monitored device interface. Line powering switched command. QIHPC indicates, when output current above threshold longer than programmable time tOC. second (higher) value current limited. values current limitation overcurrent indication threshold defined with external resistors, overcurrent indication setup delay selected external capacitances. status information each line (acknowledge requested power feed) returned system. status information enables easy detection overloads faults fast localization even large system. integrated intelligent chip temperature control guards QIHPC case overloads. Additionally eight drivers external relays their control logic integrated QIHPC. These relay drivers provide open collector output stages with high current capability.
Data Sheet
2001-10-31
QUAD ISDN/S(H)DSL High Voltage Power Controller QIHPC
2426
Version
Features
Supplies power four ISDN S(H)DSL transmission lines Central Office DSLAM Linecards ETSI compatible ITU-T G.991.2 Annex compatible Feediing multiple interfaces IADs PBXs. Line Feed Supply Voltage
P-MQFP-44
Separate Current Monitoring Limiting each line Current Limiting Level programmed external resistor Overcurrent indication threshold programmed with external resistors independently from current limitation. overcurrent indication setup delay programmed external capacitors, separately each line Intelligent Chip Temperature Control Automatically switching lines current limitation when expecting over temperature problems Automatically switching four lines case real overtemperature Integrated Relay Drivers Relay Driver Controlling eight relays Optimized working conjunction with PEB/F 24901 (DFE-T) PEB/F 24911 (DFE-Q). Small P-MQFP-44 Package Reliable Smart Power Technology
Type 2426
Data Sheet
Package P-MQFP-44
2001-10-31
2426
Overview
Logic Symbol
Relay Driver input pins
Relay Driver pins
RDin1 RDin8 VILF
Current Sensing Power Feed
RDout1 RDout8
Power Feed Control Pins Power Feed Status Pins
2001-10-31
QIHPC
Battery Voltage
NACK1 NACK2 NACK3 NACK4 RFpos RFneg
Current Sensing
Capacitor pass filter
Figure
Logic Symbol
Data Sheet
2426
Overview
Typical Applications
QIHPC integrated power controller especially designed feeding two-wire ISDN/S(H)DSL-transmission lines. Four interface lines powered QIHPC.
Test Unit
V2.1
24902
DFE-Q/T V2.1
24911 24901
IOM-2
DELIC
20570 Signalling
Q-IHPC
2426
VILF
Figure
16-Line Card Application with DELIC, DFE-Q/T
Data Sheet
2001-10-31
2426
Overview
Channel1
AC-Path Channel
OVP1
Channel2
AC-Path Channel
RDin1 RDin8
OVP2
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
Channel3
AC-Path Channel
QIHPC
VILF VILF
OVP3
RFpos CS1.4
RFneg
RS1.4
1700
Channel4
AC-Path Channel
VILF
VILF
OVP4
Figure
System integration
Figure gives general overview system integration QIHPC. integrated "pull-down current-sinks" input pins PF1.4 RDin1.8 only connections necessary switch power feeding lines switch relay drivers. When power feeding line switched this line normal feeding condition (current less than current limiting level), then QIHPC shows resistive connection from drain source integrated DMOS-transistor channel resistance value (DMOS-Ron) typically with total tolerance about 0.35
Data Sheet
2001-10-31
2426
Overview
S/T-Feeding
functional similarity 2025 IEPC, QIHPC used replacement 2025 applications such current feeding multiple interfaces:
Table Vbat Range Channels
Comparing Power Feeeding IC's: IEPC QIHPC 2025 IEPC -60V -12V 0.2mA max. 4.75V 5.25V typ.; 10mA max. 2426 QIHPC -130V 0.7mA typ.; 1.5mA max.
Vbat supply current (excl. Line feeding currents) Dig. supply voltage Dig. supply current Feeding current control Specified feeding current control settings Turn-on resistance System interface Relay drivers integrated Package
System controlled turn- Automatic current limitation; automatic turn-off system controlled turn-off 75mA; 152mA (approx. +25%) Parallel pins) None P-LCC-28; P-DIP-22 150mA (+12%) possible pins +85°C (PEF) P-MQFP-44
7Ohm typ., max. typ., max.
Operating temperature range
Data Sheet
2001-10-31
2426
Descriptions
Descriptions
Configuration (top view)
RDin4 RDout4 RDout3 RDout2 RDout1 RDout5 RDout6 RDout7 RDout8 RDin8
RDin3 RDin2 RDin1 VILF
RDin7 RDin6 RDin5
Figure
Configuration
Data Sheet
RFpos RFneg NACK1 NACK2 NACK3 NACK4
2001-10-31
2426
Descriptions
Definitions Functions
Definitions Functions
Table
Symbol Input Function Output Supply Supply Positive Supply Voltage, referred GND. Operating Voltage Range from Ground
VILF RFpos RFneg
Supply
Line Feed Voltage, referred GND. Operating Voltage Range from -130 Drain Connections Output Transistors Channels 1.4. These pins have connected (via external resistors) ISDN/S(H)DSL lines (ring) channels 1.4. Current limitation Channels 1.4. These pins have connected external resistor RS1.4 defining output current limit four lines. Overcurrent indication threshold. These pins have connected external resistors RS1.4 VILF defining overcurrent indication threshold each line individually. External capacitors defining OC-delays Channels 1.4. These pins have connected external capacitors VILF defining overcurrent indication delay. Power Feed Signal Channels 1.4. Logic high PF1.4 switches power feeding line channel 1.4.
Data Sheet
2001-10-31
2426
Descriptions Table Definitions Functions (Continued)
Symbol Input Function Output NACK1 NACK2 NACK3 NACK4 RDin1 RDin2 RDin3 RDin4 RDin5 RDin6 RDin7 RDin8 RDout1 RDout2 RDout3 RDout4 RDout5 RDout6 RDout7 RDout8 Acknowledged Signal Channels 1.4. Logic NACK1.4 signals that either ISDN/ S(H)DSL line channel powered normal power condition that power feed requested. Switch-On-Signal Relay-Channels 1.8. Logic high Rin1.8 switches relay driver npntransistor channel 1.8.
Open Collector Output Relay-Channels 1.8. When relay driver npn-transistor channel switched than this sinks current integrated zener diode guards QIHPC against inductive voltage peaks from relay coil.
Data Sheet
2001-10-31
2426
Functional Description
Functional Description
Functional Block Diagram
RDin1.8
Biasing
Junction Temperature Control
Bandgap
RDout1.8
Relay Drivers
PF1.4
NACK1.4
Logic
Line Feed Control
D1.4
Line Current Control
DMOS
RFpos
10.100 +/-20%
OPDC
S1.4
ZDGS
RFneg
+/-10%
RSubstrat Substrat
VILF CS1.4
Figure
Data Sheet
Functional Block Diagram
2001-10-31
2426
Functional Description Functional Block Diagram, Figure four different types circuit blocks: biasing circuit, four line feed control circuits, four line current control circuits eight relay driver circuits.
Biasing Circuit
bandgap circuit generates constant voltage with respect GND. This reference voltage converted into current about which necessary level shifting. This current converted back into 10.100 (depending value external resistor reference voltages with respect VILF. These reference voltages external resistors connected between pins S1.4 VILF defines line current limit overcurrent indication threshold. Currents about used level shifting power feed information. biasing block also other biasing currents used chip generated. Intelligent junction temperature control coordination with line current limiting protects QIHPC against overloads. Also fault condition line shall under circumstance disturb connection another line. Therefore junction temperature control circuit necessary. junction temperature QIHPC will monitored integrated thermal detector with three threshold levels, defined Table Table Thermal Detector Threshold Levels Test Conditions guaranteed design guaranteed design guaranteed design guaranteed design guaranteed design guaranteed design Limits Thermal Detector threshold Thermal Detector hysteresis Thermal Detector threshold Thermal Detector hysteresis Thermal Detector threshold Thermal Detector hysteresis Unit Symbol Parameter Description
Power requests will only executed junction temperature below (typical other line overcurrent condition. device junction temperature reaches second threshold (typical °C), then line drivers currentData Sheet 2001-10-31
2426
Functional Description overload condition will switched QIHPC. device junction temperature then still continues increase (typical °C), line drivers will turned QIHPC. line(s) current overload will switched sufficiently fast once second threshold reached, i.e. before threshold reached. This guarantees disturbance free operation lines affected fault condition. Once line been switched relevant PF-pin subsequently high, attempting power this line again. internal protection mechanisms (current limiting junction temperature control) already provide full protection D1.4 outputs against short circuits voltage between VILF Note: thermal protection mechanism QIHPC protection against instant damages overload outputs. Continuous high temperatures during operation, however, will reduce life time QIHPC. Measures have taken switch QIHPC case short-circuit. E.g. NACKx indicates current overload condition, QIHPC should deactivated after seconds using PFx.
Line Feed Control Circuit
QIHPC supply power four transmission lines simultaneously. exchange activation commands status information with QIHPC will occur parallel interface, consisting input (PF) output (NACK) line. power switch controlled (PF) each line individually. status information (NACK) monitored each line separately. Integrated "pull-down current-sinks" connected input pins PF1.4. these pins connected externally, logic level this "0". Logic level means that voltage this about logic level means that voltage level this about VDD. diagnostic possible fault conditions available status information pins (NACK) each line separately. NACK when PF="1" and: Current line reaches overcurrent indication threshold longer than tOC. Over temperature Tj3) detected. Power feed setting acknowledged QIHPC.
Data Sheet
2001-10-31
2426
Functional Description also Table Table Function Table Controlling Line current don't care current don't care don't care NACK Comment line feeding requested power feeding acknowledged line powered long other line overcurrent condition power feeding acknowledged line powered, long junction temperature high feeding: this line over current condition normal line feeding
(other channels) (this channel)
don't care don't care
least above indication threshold don't care
don't care
don't care
above indication threshold below indication threshold don't care
don't care
don't care
overtemperature condition, feeding switched
case simultaneous power requests (PF1.4) QIHPC take care proper start-up sequencing. four channels have different priority. First priority channel second priority channel etc. simultaneous power requests more than channel, channel with highest priority will powered first, will normally start with current limiting condition. When this channel powered drawn current drops below current indication level, next channel will powered. (see also figure table
Line Current Control Circuit
different current limiting circuits integrated control DMOS power switch. ultrafast fast current limiting circuit. also Figure ultrafast current limiting circuit consists bipolar npn-transistor TUF. Note that bipolar npn-transistors fastest devices from used technology. voltage
Data Sheet 2001-10-31
2426
Functional Description between S1.4 VILF exceeds about DMOS switched fast possible. divided RS1.4 results ultrafast current limiting level about This level strong temperature dependence (-40 junction temperature gives about +120 results about mA). ultrafast current limiting circuit protects QIHPC against short circuit line side with resulting current rising fast A/100 nsec. fast current limiting circuit keeps voltage between S1.4 VILF below programmable voltage level. This results current limitation. Zener diode ZDGS protects DMOS-gate. Diodes parasitic drain-bulk-diode drain-substrate-diode DMOS transistor (junction isolated technology). diodes provide overvoltage protection, negative surges would pass through S1.4 VILF affecting battery voltage. Extra overvoltage protection circuitry necessary conduct voltage surges form line ground, prevent that current flow into Diodes DPS. Typical value DMOS-on-resistance including internal wiring-resistance pins D1.4 S1.4 identify overcurrent, voltage between S1.4 VILF compared voltage exceeds this level, this indicated line current control circuits. resistor external capacitor define lowpass filter (time delay) suppress changes NACK short overcurrent surges. This enables filter effects longitudinal current. external capacitor with value about results delay time (tOC) about msec.
Relays Driver Circuit
output transistor bipolar npn. maximal collector current should exceed When switching inductive load, zener diode clamps voltage level RDout1.8 about resistor limits input current RDin1.8 additionally collector current. RDin1.8 connected, integrated "pull-down current-sink" holds respective relay driver switched-off condition.
Data Sheet
2001-10-31
2426
Application Hints
Application Hints
Resistor RS1.4
value this resistor defines overcurrent indication level. Note, that value this resistor must considered line symmetry. typical overcurrent indication level Iind programmed using following formula.
100mV Iind reason more ports QIHPC shall remain unused, respective resistor provided anyway. however, left unconnected.
Resistor
values resistors RS1.4 define current limiting level. typical overcurrent limitation level Ilim programmed using following formula.
100mV 20µA
Capacitor CS1.4
value this capacitor define resulting delay time overcurrent indication. typical values function CS1.4 Figure
Data Sheet
2001-10-31
2426
Application Hints
1000 CS1.4 [nF]
Figure
OC1.4 [msec]
Delay time function value CS1.4 (typical values)
Data Sheet
2001-10-31
2426
Application Hints
Protection Circuitry
VLIF
1N4007
T410
1N4007
D1.D4 QIHPC
path
Figure
Proposal Protection Circuitry
external circuitry needed protect QIHPC against damages high voltages from line. High voltages caused lightning surges foreign voltage contact. protection element this scheme Triac (T410). With positive going surges, Triac will fire through gate current flowing diode 1N4107 ground. With negative going surges, gate current supplied VILF second 1N4007 diode.This circuit capable protect QIHPC against damage with surges (1.2/ 50µs 10/700 pulse shape). Shorting voltage surges sensed QIHPC same shortcircuit line. will react according programmed overcurrent indication overcurrent limitation.
Data Sheet
2001-10-31
2426
Operational Description
Operational Description
QIHPC compliant ETSI "Dynamic power feeding requirements" using power test load (see Figure There requirement order powering lines, dependencies controlling between lines.
Channel1
Channel2
RDin1 RDin8
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
Channel3
QIHPC
VILF
Channel4
VILF RS1.4
RFpos RFneg CS1.4
1700
VILF
VILF
Figure
Circuit with Power Source Test Loads"
With power source test load from QIHPC power four line interfaces within about seconds "quasi simultaneous". input sequence expected output sequence with power dissipation diagram shown Figure power dissipation chip quite small. fault condition (short circuit) line does affect power other lines. Example: Assumed short circuit line simultaneous power request applied QIHPC. power lines will proceed expected. When powering line chip temperature control (Tj2) will switch this line. Lines still powered remain normal power condition. When junction temperature decreased QIHPC will power line there fault condition line lines finally normal power condition. Line still power off. repeat trial powering line input signal must again.
Data Sheet
2001-10-31
2426
Operational Description
NACK1
NACK2
NACK3
NACK4
Power Dissipation Chip
Figure
Simultaneous Power Sequence
Data Sheet
2001-10-31
2426
Electrical Characteristics
Electrical Characteristics
Absolute Maximum Ratings
Symbol Limit Values Unit
Parameter
Storage temperature range Tstg VDDmax Voltage with respect ground Voltage VILF with respect ground VILFmax VD1.4max Voltages pins D1.4 with respect VILF Voltages pins with respect VILF with VD1.4maxRs
Operating ambient temperature range: series resistor /figure Pulse voltages pins D1.4 with respect VILF with series resistor /figure msec msec 16.7
VD1.4pulse
Impulse voltages pins D1.4 with respect VD1.4impulse VILF with series resistor /figure Tdur µsec Trise nsec repetitive
VS1.4max Voltages pins with respect voltages VDS1.4max
Voltages pins S1.4 with respect VILF pins S1.4
VCS1.4max Voltages pins PF1.4 with respect ground VPF1.4max VNA1.4max Voltages pins NACK1.4 with respect
Voltages pins CS1.4 with respect VILF ground Voltages pins Rin1.4 with respect ground VRi1.4max Voltages pins Rout1.4 with respect ground ESD-voltage, pins (Human body model)
VRo1.4max VESD-HBM
Note: Stresses above those listed here cause permanent damage device. Exposure absolute maximum rating conditions extended periods affect device reliability. Maximum ratings absolute ratings; exceeding only these values cause irreversible damage integrated circuit.
Data Sheet
2001-10-31
2426
Electrical Characteristics
Parameter
Operating Range
Symbol Limit Values Unit
supply voltage VILF supply voltage
VILF
Note: operating range functions given circuit description fulfilled.
Parameter
Static Thermal Resistance
Symbol Limit Values 62.9 14.6 Unit
Junction ambient Junction case
Rth, Rth,
AC/DC-Characteristics
General Test Conditions indicated otherwise):
RS1.4 1700
CS1.4 =220 %(63
Supply voltages typical characteristics:
VILF =-100
Note: listed characteristics ensured over operating range integrated circuit. Typical characteristics specify mean values expected over production spread. otherwise specified, typical characteristics apply given supply voltage
Data Sheet
2001-10-31
2426
Electrical Characteristics
Table
Characteristics Symbol Limit Values min. typ. max. excluding line currents PF1.4 PF1.4 PF1.4 Unit Test Condition Test Fig.
Parameter
Supply Currents
current VILF current
IILF
Line Currents, Delay Time DMOS-RON resistance
ImaxOC1.4 Overcurrent Indication Level
Current Limiting ImaxL1.4 Level Line Current "on"-condition Line Current "off"-condition Delay Time DMOS-RON resistance Input Voltage Input Voltage pull down Input Current Output Voltage Output Voltage
75.5
ImaxON1.4 ImaxOFF1.4 tOC1.4 RON1.4
ImaxL1.4 ImaxON1.4
PF1.4
msec PF1.4 "1", ILine PF1.4 "1", ILine
PF1.4, Logic Input Levels
VHPF1.4 VLPF1.4 IPF1.4
VPF1.4
VHNACK1.4 VLNACK1.4
NACK1.4, Logic Output Levels
ISource1.4 ISink1.4
Data Sheet
2001-10-31
2426
Electrical Characteristics Table Characteristics (Continued) Symbol Limit Values min. typ. RDin1.8, Relay Driver Inputs "ON" Input Voltage "OFF" Input Voltage pull down Input Current Saturation Voltage Saturation Voltage Current "off"condition max. Unit Test Condition Test Fig.
Parameter
Von,RDin1.8 Voff,RDin1.8 Ipd,RDin1.8
VRDin1.8
RDout1.8, Relay Driver Outputs
Vsat1,RD1.8 Vsat2,RD1.8 Ioff,RD1.8
0.25
VRDin1.8 IRDout1.8 VRDin1.8 IRDout1.8 VRDin1.8
Testing Electrical Parameters
RDin1.8: open RDout1.8: open
RDin1 RDin8 D1.4: open
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
PF1.4: combinations
QIHPC
NACK1.4: open
VILF RS1.4
RFpos RFneg CS1.4
1700
IILF
VILF
Figure
Data Sheet
Supply Currents
2001-10-31
2426
Electrical Characteristics
ImaxOC1 Imax1 ImaxOFF1 ILine
Channel1
ImaxOC1, Imax1 ImaxOFF1 tOC1
RDin1.8: open ImaxOC2 Imax2 ImaxOFF2 ILine
ImaxOC2, Imax2 ImaxOFF2 tOC2
RDout1.8: open
Channel2
RDin1 RDin8
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
ImaxOC3 Imax3 ImaxOFF3 ILine
Channel3
ImaxOC3, Imax3 ImaxOFF3 tOC3
QIHPC
NACK1.4: open
ImaxOC4 Imax4 ImaxOFF4 ILine
VILF Channel4
ImaxOC4, Imax4 ImaxOFF4 tOC4
VILF RS1.4
RFpos RFneg CS1.4
1700
VILF
Start ILine
VILF
Stop
Timer
tOC1.4
Figure
Line Currents Delay Time
RDin1.8: open
IDS4 IDS3 IDS2 IDS1
RDout1.8: open
RDin1 RDin8
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
QIHPC
NACK1.4: open
VDS4
VDS3
VDS2
VDS1 VILF
VILF
RFpos RFneg CS1.4
1700
RS1.4
VILF VILF
Figure
Data Sheet
DMOS-RON resistance
2001-10-31
2426
Electrical Characteristics
IPF1 VHPF1 VLPF1 VPF1 RDin1.8: open RDout1.8: open IPF3 VHPF3 VLPF3 VPF3 ISink1 VHNACK1 VLNACK1 ISource1 VHNACK2 VLNACK2 ISink2 ISource2
IPF2 VHPF2 VLPF2 VPF2 IPF4 VHPF4 VLPF4 VPF4
RDin1 RDin8 RLoad1.4
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
QIHPC
VILF VILF RS1.4
RFpos RFneg CS1.4
ISink3 VHNACK3 VLNACK3
1700
ISource3 VHNACK4 VLNACK4 ISink4 ISource4
VILF
VILF
Figure
PF1.4, Logic Input Levels NACK1.4, Logic Output Levels
Data Sheet
2001-10-31
2426
Electrical Characteristics
Ipd,RDin8 Von,RDin8 Voff,RDin8 VRDin8 Ioff,RD1
IRDout1 Vsat,RD1
Ioff,RD1 Vsat,RD1
Ioff,RD8 Ipd,RDin2 Von,RDin2 Voff,RDin2 VRDin2 Von,RDin1 Voff,RDin1 VRDin1
IRDout8 Vsat,RD8
Ipd,RDin1
Ioff,RD8 Vsat,RD8
RDin1 RDin8 D1.4: open
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
PF1.4: open
QIHPC
NACK1.4: open
VILF VILF RS1.4
RFpos CS1.4
1700
VILF
VILF
Figure
RDin1.8, Relay Driver Inputs RDout1.8 Relay Driver Outputs
RDin1.8: open
RDout1.8: open PF1.4: combinations
VD1maxRs VD1pulse VD1impulse VILF
VD2maxRs VD2pulse VD2impulse VILF
RDin1 RDin8
RDout1 RDout8 NACK1 NACK2 NACK3 NACK4
QIHPC
NACK1.4: open
VD3maxRs VD3pulse VD3impulse VILF
VD4maxRs VD4pulse VD4impulse VILF
VILF VILF RS1.4
RFpos RFneg CS1.4
1700
VILF
VILF
Figure
Test circuit maximum DC-voltages, pulse voltages impulse voltages pins D1.4
Data Sheet
2001-10-31
2426
Package Outlines
Package Outlines
P-MQFP-44 (Plastic Metric Quad Flat Package)
Sorts Packing Package outlines tubes, trays etc. contained Data Book "Package Information".
Surface Mounted Device Data Sheet
Dimensions
2001-10-31
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