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Independent Controllers Regulation Fixed 2.5-V Adjustable Output (Max)
Top Searches for this datasheetLFC789D25-ADJ DUAL LINEAR CONTROLLER Independent Controllers Regulation Fixed 2.5-V Adjustable Output (Max) Regulation Across Temperature Load Adjustable Output External Reference Pin, Allowing Creation Tracking Regulator Great Design Flexibility With Minimal External Components Applications: High-Current, Low-Dropout Regulators for: DDR/RDRAM Memory Termination Motherboards Chipset GTLP Termination PACKAGE (TOP VIEW) DRV_VADJ SEN_VADJ VREF DRV_V25 SEN_V25 internal connection description/ordering information LFC789D25-ADJ dual linear controller that simplifies design dual power supplies. device consists independent controllers, each which drives external MOSFET implement low-dropout regulator. controller programmed regulate fixed 2.5-V output, while second controller programmed regulate desired output voltage reference input pin, allowing creation tracking regulator often needed termination schemes. because heating effects external FETs easily isolated from controllers, controllers regulate output voltages maximum tolerance across temperature load. LFC789D25-ADJ allows designers great deal flexibility selecting external components topology implement their specific power-supply needs. With appropriate heat sinking, designer build regulator with much current capability allowed external MOSFET power supply. And, because dropout regulator simply product RDS(on) external power MOSFET load current, very dropout achieved proper selection power MOSFET. Packaged 8-pin SOIC space-saving TSSOP, LFC789D25-ADJ characterized operation from 70°C. ORDERING INFORMATION SOIC 70°C TSSOP (PW) PACKAGE Tube Reel 2500 Tube Reel 2000 ORDERABLE PART NUMBER LFC789D25-ADJCD LFC789D25-ADJCDR LFC789D25-ADJCPW LFC789D25-ADJCPWR TOP-SIDE MARKING KADAC KADAC Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303 DALLAS, TEXAS 75265 LFC789D25-ADJ DUAL LINEAR CONTROLLER functional block diagram DRV_VADJ SEN_VADJ VREF Bandgap Reference DRV_V25 SEN_V25 DESCRIPTION NAME DRV_VADJ SEN_VADJ VREF SEN_V25 DRV_V25 FUNCTION Output adjustable controller. Drives gate(s) FET(s) output user-programmable voltage (VADJ) Sense input adjustable controller. Senses changes VADJ Input used program VADJ, allowing VADJ track changes VREF Ground connection Sense Input 2.5-V controller. Senses changes 2.5-V supply Output 2.5-V controller. Drives gate(s) FET(s) output fixed Power supply device POST OFFICE 655303 DALLAS, TEXAS 75265 LFC789D25-ADJ DUAL LINEAR CONTROLLER typical application circuit (12V) VPWR (3.3V) LFC789D25-ADJ DRV_VADJ DRV_V25 SEN_VADJ VREF SEN_V25 1.25 (0.1% matched resistors) Figure absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, (see Note Input voltage range, VREF, SEN_VADJ, SEN_V25 -0.3 Package thermal impedance, (see Notes package 97°C/W package 149°C/W Operating virtual junction temperature, 150°C Lead temperature (1/16 inch) from case seconds 260°C Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: voltage values with respect network ground terminal. Maximum power dissipation function TJ(max), maximum allowable power dissipation allowable ambient temperature (TJ(max) TA)/JA. Operating absolute maximum 150°C impact reliability. package thermal impedance calculated accordance with JESD 51-7. recommended operating conditions Supply voltage Operating free-air temperature UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 LFC789D25-ADJ DUAL LINEAR CONTROLLER electrical characteristics, ±5%, 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS Full range Full range -1.5 Full range IDRV Reference Driver output current current VREF current, output voltage regulation Output regulation (see Figure VADJ output voltage regulation IOUT VPWR ±10% IOUT VPWR ±10%, VREF V25/2 VDRV VSEN VOUT (nom) Full range Full range Full range 2.45 VREF VREF Full range VREF Full range VREF 2.55 VCC-3 -250 -500 -500 UNIT SEN_V Sense VADJ sense current sense-pin sense current sense-pin SEN_V VDRV Driver Driver output voltage IDRV Supply Supply current POST OFFICE 655303 DALLAS, TEXAS 75265 LFC789D25-ADJ DUAL LINEAR CONTROLLER APPLICATION INFORMATION FUNCTIONAL DESCRIPTION linear voltage regulator broken down into four essential building blocks: pass transistor, voltage reference, feedback network, control circuit drive pass element, based comparison between output voltage sampled feedback network) voltage reference. With exception pass transistor, LFC789D25-ADJ provides other three building blocks needed. Thus, with minimal external components overall solution cost, designer create independent, tightly regulated output voltages capable delivering high currents excess limited external pass transistor). output fixed other output adjusted desired voltage externally applied signal VREF pin. Because output regulator always tracks changes this VREF pin, relatively easy implement tracking regulator. typical application circuit (Figure internal reference fixed 2.5-V output controller uses internal temperature-compensated bandgap reference centered tolerance designed <±2% over specified temperature range, which, when coupled with offset driver circuit, allows 2.5-V output have tolerance over specified temperature range full load. external reference (VREF) adjustable output controller, VREF allows great flexibility designer. Taking simple resistor divider tied external voltage source connecting divider VREF allows controller regulate output voltage that some fraction external voltage source. And, because changes external voltage source sensed voltage divider, regulated output tracks those changes. tracking regulator desired, fixed voltage achieved applying constant voltage VREF pin. This signal provided simple device such economical TL431 adjustable shunt regulator. VREF typically sources current and, such, minimal loading effect resistor divider shunt regulator. accuracy adjustable output depends accuracy signal applied VREF pin. Using high-precision resistors TL431A output tolerance) helps achieve good accuracy. feedback network (SENSE pins) 2.5-V controller senses output voltage SEN_V25 pin. This tied internal resistor divider that essentially halves sensed output voltage feeds back controller comparison internal bandgap reference. adjustable output controller, SEN_VADJ provides direct feedback output voltage controller comparison externally applied VREF signal. controller/driver Both drivers essentially error amplifiers that output worst-case minimum (10.5 25°C) when LFC789D25-ADJ powered This allows controllers regulate large range output voltages, limited threshold voltages external NMOS. Both drivers sample output voltage pin. adjustable version, this typically sources current and, thus, minimal loading output voltage. 2.5-V version, this sinks current about (including currents through internal resistor divider); this results minimal loading output voltage. Although tested, both these controllers designed with very offset (typically less than mV), resulting very accurate control drive signals. POST OFFICE 655303 DALLAS, TEXAS 75265 LFC789D25-ADJ DUAL LINEAR CONTROLLER APPLICATION INFORMATION MOSFET SELECTION: BENEFITS NMOS PASS ELEMENTS REVISITEA great benefit having external pass element that control circuitry powered separate supply (VCC), other than used input pass element (VPWR). This feature allows NMOS pass element, which requires positive operation. With separate controller, voltage gate NMOS readily exceed voltage drain; thus, easily exceed allowing NMOS operate triode region (VDS VT). triode region, very small, thus achieving very dropout. external NMOS selected pass transistor significant impact overall characteristics regulator, discussed following paragraphs. Maximum output current benefit external pass element that designer size NMOS comfortably sustain maximum IOUT expected. This allows great flexibility, along with cost space savings, because each regulator pass element tailored individual needs. addition, using NMOS pass element allows smaller size (and subsequently, lower cost) than PMOS element same current-carrying ability. Dropout Choosing NMOS with very RDS(on) characteristics provides regulator with very dropout because dropout will IOUT RDS(on). This lower dropout also results better efficiency lower heat dissipation pass element given IOUT. Maximum programmable output voltage nmos threshold voltage, maximum output voltage that regulated programmable regulator depends device's power supply (VCC) threshold voltage (VT) NMOS. With drive voltage tied gate VOUT connected source NMOS, minimum must maintained order maintain n-channel inversion layer. maximum VOUT calculated follows: VOUT With corresponding worst-case gate drive voltage highest achievable VOUT Stability quality regulators their inherent stability almost type load conditions output capacitors. NMOS regulator same benefit. Thus, capacitor selection equivalent-series-resistance (ESR) values needed stability, still should chosen properly best transient response (see below). capacitor selection Cout: Although minimum capacitance needed stability with NMOS pass device, higher capacitance values improve transient response. addition, low-ESR capacitors also help transient response. Tantalum aluminum electrolytics used bulk capacitances, while ceramic bypass capacitors used decouple high-frequency transients their (equivalent series inductance). Cin: Input capacitors placed drain NMOS pass transistor (VPWR) help improve overall transient response suppressing surges VPWR during fast load changes. Low-ESR tantalum aluminum electrolytic capacitors used; higher capacitance values improve transient response. 0.1-µF ceramic capacitor placed LFC789D25-ADJ provide bypassing. POST OFFICE 655303 DALLAS, TEXAS 75265 LFC789D25-ADJ DUAL LINEAR CONTROLLER APPLICATION INFORMATION layout Another benefit separate controller pass element that heat dissipated external NMOS well isolated from controller, which very power dissipation. Both these factors allow bandgap reference control circuitry operate over more stable temperature range, resulting very good accuracy over full-load conditions. LFC789D25-ADJ should placed close possible external pass element because short traces allow minimal coupling both drive sense lines. best accuracy, connect pins close load possible, source NMOS. Also, place trace same direction plane power trace that connects source NMOS load. Also, good practice keep load current return path possible from trace. Place 0.1-µF bypass capacitor close possible connect directly ground plane. LFC789D25-ADJ should connected ground plane. POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MSOI002B JANUARY 1995 REVISED SEPTEMBER 2001 (R-PDSO-G**) PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 0.010 (0,25) PLASTIC SMALL-OUTLINE PACKAGE 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) 0.008 (0,20) Gage Plane 0.044 (1,12) 0.016 (0,40) 0.010 (0,25) Seating Plane 0.069 (1,75) 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) PINS 0.197 (5,00) 0.189 (4,80) 0.344 (8,75) 0.337 (8,55) 0.394 (10,00) 0.386 (9,80) 4040047/E 09/01 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,30 0,19 0,10 0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,10 PINS 3,10 5,10 5,10 6,60 7,90 9,80 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153 POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. 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