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Data Acquisition Microcontroller XE88LC03 Ultra Low-Power Mi


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Datasheet XE88LC03
Data Acquisition Microcontroller
XE88LC03
Ultra Low-Power Microcontroller
General Description
XE88LC03 ultra low-power low-voltage microcontroller unit (MCU) with extremely high efficiency, allowing MIPS 300uA bits multiplying clock cycle.
product Features
Ultra low-power MIPS operation operation time keeping Low-voltage operation (2.4 supply voltage) MTP, counters PWM, UART Analog matrix switching independant crystal oscillators reset, interrupt, event sources years Flash retention 55°C
XE88LC03 available with chip Multiple-TimeProgrammable (MTP) program memory.
Applications
Internet connected appliances Portable, battery operated instruments system supervisor Remote control HVAC control
Ordering Information
Reference
XE88LC03MI000 XE88LC03MI015 XE88LC03MI026
Memory type Temperature
Flash Flash Flash -40°C 85°C -40°C 85°C -40°C 85°C
Package
SO28 TQFP32
Cool Solutions forWireless Connectivity XEMICS email: info@xemics.com web: www.xemics.com
Datasheet XE88LC03
Data Acquisition Microcontroller
Detailed Description
device type production identification packaging date
XEMICS
XE88LC03MI
N9K1444 9920
VBat VReg Xout Vgnd PA[0] PA[1] PA[2] PA[3] PA[4] PA[5] PA[6] PA[7]
XEMICS XE88LC03xI015 9920
RESET PB[7] PB[6] PB[5] PB[4] PB[3] PB[2] PB[1] PB[0] PC[3] PC[2] PC[1] PC[0]
Figure 1.1:
Pinout XE88LC03 TQFP32 package
Function name
Vbat Vreg XOut Vhigh/TEST OscOut/ptck
Figure 1.1:
Pinout XE88LC03 SOP28 package
Description
Positive power supply Regulated supply Test mode/High voltage programing Connection Xtal/ Peripheral clock test programing Connection Xtal/ CoolRISC clock test programing Negative power supply, connected substrate Input Port Data input test programing/ Counter input Input Port Data clock test programing/ Counter input Input Port Counter input/ Counter capture input Input Port Counter input/ Counter capture input Input Port Input Port Input Port Input Port Input-Output Port Input-Output Port Input-Output Port Input-Output Port Input-Output Port Input-Output Port Input-Output Port Input-Output Port Input-Output-Analog Port Data output test programing/ output
Position SO28
Position TQFP32
Second function name
Type
Power Analog Special Analog/Input
PA(0)
OscIn/crck
Analog/Input Power
testin
Input
PA(1) PA(2) PA(3) PA(4) PA(5) PA(6) PA(7) PC(0) PC(1) PC(2) PC(3) PC(4) PC(5) PC(6) PC(7) PB(0)
testck
Input Input Input Input Input Input Input Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output
testout
Input/Output/Analog
Table 1.1:
Pin-out XE88LC03 SO28 TQFP32 (see Table pins performances" page drive capabilities pins)
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Position SO28
Position TQFP32
Function name
PB(1) PB(2) PB(3) PB(4) PB(5) PB(6) PB(7) RESET Reserved
Second function name
Type
Input/Output/Analog Input/Output/Analog
Description
Input-Output-Analog Port output Input-Output-Analog Port Input-Output-Analog Port Output USRT Input-Output-Analog Port Clock USRT Input-Output-Analog Port Data input input-output USRT Input-Output-Analog Port Emission UART Input-Output-Analog Port Reception UART Reset (active high) connected
S0/SCL S1/SIN
Input/Output/Analog Input/Output/Analog Input/Output/Analog Input/Output/Analog Input/Output/Analog Input Analog
Table 1.1:
Pin-out XE88LC03 SO28 TQFP32 (see Table pins performances" page drive capabilities pins)
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Absolute maximum ratings
Stresses beyond these listed this chapter cause permanent damage device. functional operation implied beyond these conditions. Exposure these conditions extended period affect device reliability.
Parameter
VBAT with respect Input voltage input Storage temperature Storage temperature programmed devices
Value
-0.3V 6.0V VSS-0.3V VBAT+0.3V -55°C 125°C -40°C 85°C
Remarks
Table 2.1: Note:
Absolute maximum ratings unprogrammed devices. Blocking bits software must rewritten devices storage temperature exceedes storage temperature programmed devices. These devices sensitive. Although these devices feature proprietary protection structures, permanent damage occur devices subjected high energy electrostatic discharges. Proper precautions have taken avoid performance degradation loss functionality.
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Electrical Characteristics
specification -40°C 85°C unless otherwise noted. operates 125°C.
Operation conditions
Power supply Operating speed Instruction cycle version version instruction running MIPS running Xtal, halt, timer Xtal, halt, timer Xtal, ready halt, Xtal timer Voltage level detection Prog. voltage Erase time Write/Erase cycles Data retention
0.032
Unit
Remarks
Current requirement
11.5
years years
Flash instruction memory
85°C, 55°C,
Table 3.1: Note:
Specifications current requirement XE88LC03 Power supply: temperature 27°C. erase cycles. More cycles possible during development, with restraint retention With clock, instructions using exactly clock cycle Longer erase time degrade retention
XE88LC03 power RISC core. internal registers efficient implementation compiler. instruction made generic instructions, coded bits, with addressing modes. instructions executed clock cycle, including conditional jumps multiplication.
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Memory organization
uses Harvard architecture, that memory organized separated fields: program memory data memory. both memories separated, central processing unit read/write data same time loads instruction. Peripherals system control registers mapped data memory space. Program memory made page. Data made several bytes pages.
Program address
Data address
0h1FFF 01hBFF
0h027F Bytes 0h0080 Peripherals
Program memory instructions instructions
0h0000 bits wide Figure 5.1: Memory organization
Instruction pipeline registers
0h0010 bits wide 0h0000
Program memory
program memory implemented Multiple Time Programmable (MTP) Flash memory ROM. power consumption memory linear with access frequency significant static current). Size Flash memory 8192 bits kBytes)
block
size
8192
address
H0000 H1FFF
Table 5.1:
Program addresses memory
Data memory
data memory implemented static Random-Access Memory (RAM). size bits plus power bytes that require very current when addressed. Programs using low-power instead will even less current.
block
size
address
H0000 H0007 H0080 H027F
Table 5.2:
addresses
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Registers list
Left column include register name address. Right columns include name, access read, always when read, write, cleared writing value, cleared writing reset status signal. Empty bits reserved future should written, neither should their read value used purpose change without notice.
Peripherals mapping
block
System control Port Port Port Reserved Event Interrupts control reserved UART Counters Zooming Reserved DACs Other (VLD) RAM1 RAM2 RAM3
size
16x8 12x8 128x8 256x8 128x8
address
H0000-H0007 H0010-H001F H0020-H0027 H0028-H002F H0030-H0033 H0034-H0037 H0038-H003B H003C-H003F H0040-H0047 H0048-H004F H0050-H0057 H0058-H005F H0060-H0067 H0068-H0073 H0074-H007B H007C-H007F H0080 H00FF H0100 H01FF H0200 H027F
Page
Page
Page Page
Table 6.1:
Peripherals addresses
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Resets
reset source name simplified following registers description. Name mapping next table.
reset source
resetsystem resetSynch resetPOR resetCold resetPad resetPconf resetSleep
name this document
global
cold pconf sleep
Table 6.2:
Reset signal name mapping
power
power small additionnal area with extremely power requirement.
Name Address h0000 h0001 h0002 h0003 h0004 h0005 h0006 h0007
Table 6.3:
power
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
System, oscillators, prescaler watchdog
SleepEn Sleep cold CpuSel sleep
Name Address
RegSysCtrl
EnResPConf cold ResPor ExtClk cold
EnBus-Error cold ResBusError cold EnExtClk cold
EnResWD cold ResWD cold BiasRC cold
h0010, type
RegSysReset
ResPortA cold ColdXtal sleep RCOnPA0 sleep special
ResPad-Deb cold ColdRC sleep DebFast sleep special
ResPad cold EnableXtal sleep OutputCkXtal sleep special EnableRC sleep OutputCkCPU sleep special ResPre ClearLowPrescal
h0011, type
RegSysClock
h0012, type
RegSysMisc
h0013, type
RegSysWD
WatchDog(3) WatchDog(2) WatchDog(1) WatchDog(0)
h0014
RegSysPre0
h0015
RegSysRCTrim1 RCFreqRange cold RCFreqFine(5) cold RCFreqFine(4) cold RCFreqCoarse(3) cold RCFreqFine(3) cold RCFreqCoarse(2) cold RCFreqFine(2) cold RCFreqCoarse(1) cold RCFreqFine(1) cold
h001B
RegSysRCTrim2
cold RCFreqCoarse(0) cold RCFreqFine(0) cold
h001C
Table 6.4:
System control registers
PortA
PAIn(7) PADeb(7) pconf PAEdge(7)
Name Address
RegPAIn
RegPAIn(6) PADeb(6) pconf PAEdge(6)
PAIn(5) PADeb(5) pconf PAEdge(5)
PAIn(4) PADeb(4) pconf PAEdge(4)
PAIn(3) PADeb(3) pconf PAEdge(3)
PAIn(2) PADeb(2) pconf PAEdge(2)
PAIn(1) PADeb(1) pconf PAEdge(1)
PAIn(0) PADeb(0) pconf PAEdge(0)
h0020
RegPADebounce
h0021
RegPAEdge
h0022
RegPAPullup
global global pconf PARes0(7) PARes1(7) pconf PARes0(6) PARes1(6)
global global global pconf PARes0(5) PARes1(5) pconf PARes0(4) PARes1(4) pconf PARes0(3) PARes1(3)
global global global pconf PARes0(2) PARes1(2) pconf PARes0(1) PARes1(1) pconf PARes0(0) PARes1(0)
PAPullUp(7) PAPullUp(6) PAPullUp(5) PAPullUp(4) PAPullUp(3) PAPullUp(2) PAPullUp(1) PAPullUp(0)
h0023, type
RegPARes0
h0024
RegPARes1
global global global global
global global global global global global
global global global global global global
h0025
Table 6.5:
Port registers
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
PortB
PBOut(7) pconf PBIn(7) PBDir(7) pconf PBOpen(7) pconf pconf
Name Address
RegPBOut
PBOut(6) pconf PBIn(6) PBDir(6) pconf PBOpen(6) pconf pconf
PBOut(5) pconf PBIn(5) PBDir(5) pconf PBOpen(5) pconf pconf
PBOut(4) pconf PBIn(4) PBDir(4) pconf PBOpen(4) pconf pconf
PBOut(3) pconf PBIn(3) PBDir(3) pconf PBOpen(3) pconf pconf PBAna(3) pconf
PBOut(2) pconf PBIn(2) PBDir(2) pconf PBOpen(2) pconf pconf PBAna(2) pconf
PBOut(1) pconf PBIn(1) PBDir(1) pconf PBOpen(1) pconf pconf PBAna(1) pconf
PBOut(0) pconf PBIn(0) PBDir(0) pconf PBOpen(0) pconf pconf PBAna(0) pconf
h0028
RegPBIn
h0029
RegPBDir
h002A
RegPBOpen
h002B
RegPBPullup
PBPullUp(7) PBPullUp(6) PBPullUp(5) PBPullUp(4) PBPullUp(3) PBPullUp(2) PBPullUp(1) PBPullUp(0)
h002C
RegPBAna
h002D
Table 6.6:
Port registers
PortC
PCOut(7) pconf PCIn(7) PCDir(7) pconf
Name Address
RegPCOut
PCOut(6) pconf PCIn(6) PCDir(6) pconf
PCOut(5) pconf PCIn(5) PCDir) pconf
PCOut(4) pconf PCIn(4) PCDir(4) pconf
PCOut(3) pconf PCIn(3) PCDir(3) pconf
PCOut(2) pconf PCIn(2) PCDir(2) pconf
PCOut(1) pconf PCIn(1) PCDir(1) pconf
PCOut(0) pconf PCIn(0) PCDir(0) pconf
h0030
RegPCIn
h0031
RegPCDir
h0032
Table 6.7:
Port registers
Name Address
RegEEP
h0038
RegEEP1
special special
special special
special special
special special
special special
special special
special special
special special
h0039
RegEEP2
h003A
RegEEP3
h003B
Table 6.8:
control registers
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Events
EvnCntA rc1, global EvnEnCntA global global
Name Address
RegEvn
EvnCntC rc1, global EvnEnCntC global global
EvnPre1 rc1, global EvnEnPre1 global global
EvnPA(1) rc1, global EvnEnPA(1) global global
EvnCntB rc1, global EvnEnCntB global global
EvnCntD rc1, global EvnEnCntD global global
EvnPre2 rc1, global EvnEnPre2 global global EvnHigh global
EvnPA(0) rc1, global EvnEnPA(0) global global EvnLow global
h003C
RegEvnEn
h003D
RegEvnPriority
EvnPriority(7) EvnPriority(6) EvnPriority(5) EvnPriority(4) EvnPriority(3) EvnPriority(2) EvnPriority(1) EvnPriority(0)
h003E
RegEvnEvn
h003F
Table 6.9:
Events control registers
6.10
Interrupts
IrqPre1 rc1, global IrqPA(5) rc1, global IrqPA(7) rc1, global IrqPA(6) rc1, global IrqEnPre1 global IrqEnPA(5) global IrqEnPA(7) global IrqPriority(7) global IrqEnPA(6) global IrqPriority(6) global IrqEnCntB global IrqPriority(5) global IrqCntB rc1, global
Name Address
RegIrqHig
IrqCntA rc1, global IrqPA(4) rc1, global IrqCntD rc1, global IrqEnCntA global IrqEnPA(4) global IrqEnCntD global IrqPriority(4) global
IrqCntC rc1, global IrqPre2 rc1, global IrqPA(3) rc1, global IrqEnCntC global IrqEnPre2 global IrqEnPA(3) global IrqPriority(3) global
IrqUartTx rc1, global
IrqUartRx rc1, global IrqPA(0) rc1, global
h0040
RegIrqMid
IrqVld rc1, global IrqPA(2) rc1, global
IrqPA(1) rc1, global
h0041
RegIrqLow
h0042
RegIrqEnHig
IrqEnUartTx global IrqEnVld global IrqEnPA(2) global IrqPriority(2) global IrqHig global IrqPriority(1) global IrqMid global IrqEnPA(1) global
IrqEnUartRx global IrqEnPA(0) global
h0043
RegIrqEnMid
h0044
RegIrqEnLow
h0045
RegIrqPriority
IrqPriority(0) global IrqLow global
h0046
RegIrqIrq
h0047
Table 6.10:
Interrupts control registers
6.11
USRT
UsrtSin global UsrtScl global UsrtWaitS0 global UsrtEnWaitUsrtEnWaitS0 Cond1 global global UsrtEnable global UsrtData UsrtEdgeScl global
Name Address
RegUsrtSin
h0048
RegUsrtScl
h0049
RegUsrtCtrl
h004A
RegUsrtData
h004D
RegUsrtEdgeScl
h004E
Table 6.11:
USRT control registers
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
6.12
UART
UartEcho global SelXtal global UartTx(7) global
Name Address
RegUartCtrl
UartEnRx global global UartTx(6) global
UartEnTx global global UartTx(5) global
UartXRx global global UartTx(4) global
UartXTx global global UartTx(3) global
UartBR(2) global UartPM global UartTx(2) global
UartBR(1) global UartPE global UartTx(1) global UartTxBusy global
UartBR(0) global UartWL global UartTx(0) global UartTxFull global UartRx(0) UartRxFull
h0050
RegUartCmd
UartWakeup UartRCSel(2) UartRCSel(1) UartRCSel(0)
h0051
RegUartTx
h0052
RegUartTxSta
h0053
RegUartRx UartRx(7) UartRx(6) UartRx(5) UartRxSErr UartRx(4) UartRxPErr UartRx(3) UartRxFErr UartRx(2) UartRxOErr
UartRx(1) UartRxBusy
h0054
RegUartRxSta
h0055
Table 6.12:
UART control registers
6.13
Counters
CounterA(7) CounterB(7) CounterC(7) CounterD(7) CntDSel(1) CapSel(1) global
Name Address
RegCntA
CounterA(6) CounterB(6) CounterC(6) CounterD(6) CntDSel(0) CapSel(0) global
CounterA(5) CounterB(5) CounterC(5) CounterD(5) CntCSel(1) CapFunc(1) global
CounterA(4) CounterB(4) CounterC(4) CounterD(4) CntCSel(0) global
CounterA(3) CounterB(3) CounterC(3) CounterD(3) CntBSel(1) CntDEnable global
CounterA(2) CounterB(2) CounterC(2) CounterD(2) CntBSel(0) CascadeAB CntCEnable global
CounterA(1) CounterB(1) CounterC(1) CounterD(1) CntASel(1) CntPWM1 global CntBEnable global
CounterA(0) CounterB(0) CounterC(0) CounterD(0) CntASel(0) CntPWM0 global CntAEnable global
h0058
RegCntB
h0059
RegCntC
h005A
RegCntD
h005B
RegCntCtrlCk
h005C
RegCntConfig1
CntDDownUp CntCDownUp CntBDownUp CntADownUp CascadeCD
h005D
RegCntConfig2
CapFunc(0) PWM1Size(1) PWM1Size(0) PWM0Size(1) PWM0Size(0)
h005E
RegCntOn
h005F
Table 6.13:
Counters control registers
6.14
registers
VldMult cold
Name Address
RegVldCtrl
VldTune(2) cold VldIrq global
VldTune(1) cold VldValid global
VldTune(0) cold VldEn global
h007E
RegVldStat
h007F
Table 6.14:
Vmult control registers
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Peripherals
XE88LC03 includes usual microcontroller peripherals some other blocks more specific low-voltage mixed-signal operation. There parallel ports, input port (A), analog port with analog switching capabilities general purpose port (C). watchdog available, connected prescaler. Four 8-bit counters, with capture, chaining capabilities available. UART handle transmission speeds high 115kbaud. Low-power low-voltage blocks include voltage level detector, oscillators (one internal 0.1-2 oscillator crystal oscillator) specific regulation scheme that largely uncouples current requirement from external power supply (usual CMOS ASICs require much more current than they need This case XE88LC03).
Counters
8-bit counters Daisy chain bits 8-16 bits Capture compare bits Events interrupts generation
Prescaler
Interrupt generated with millisecond second period ultra power hibernation mode
Watchdog
seconds watchdog
UART
full duplex operation with buffered receiver transmitter. internal baud rate generator with programmable baud rate (300 115'000 bauds). bits word length. even, odd, no-parity generation detection stop error receive detection: Start, Parity, Frame Overrun receiver echo mode interrupts (receive full transmit empty) enable receive and/or transmit invert and/or
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Xtal clock
Xtal Oscillator operates with external crystal 32'768
symbol
f_clk32k st_x32k duty_clk32k fstab_1
description
nominal frequency oscillator start-up time duty cycle digital output relative frequency deviation from nominal, crystal with CL=8.2 temperature between -40° +85°C
32768
+300
unit
comments
full precision
-100
included: crystal frequency tolerance aging crystal frequency temperature dependence
Table 7.1: Note:
Xtal oscillator specifications. Board layout recommendations safer crystal oscillation lower current consumption: Keep lines xtal_in xtal_out short insert line between them. Connect package crystal VSS. noisy digital lines near xtal_in xtal_out. Insert guards where needed.
oscillator
Oscillator always turned power-on reset turned after optional Xtal oscillator been started. oscillator frequency ranges: sub-MHz (100KHz 1MHz) above-MHz (1MHz frequency). Inside range, frequency tuned software coarse fine adjustment.
Note:
external component required oscillator. oscillator modes. mode 1(RC on), oscillator bias mode ready), oscillator bias mode off), oscillator bias off. ready mode compromise between power consumption start-up time.
Figure 7.1:
frequencies programming example range (typical values)
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
symbol
range mult[3:0] tune[5:0]
description
frequency start-up range selection coarse tuning range fine tuning range fine tuning step start-up time overshoot start-up wakeup time overshoot wakeup jitter temperature drift
0.65
unit
comments
27°C multiplies bits, multiplies range bits, multiplies range mult
bias current off) bias current off) bias current ready) bias current ready)
%/°C
Table 7.2:
specifications
Parallel ports
input port with interrupt, reset event generation. input-output-analog port with analog switching capabilities. input-output port
description
Port threshold limit Port high threshold limit output drop when sinking output drop when sinking output drop when sourcing output drop when sourcing Port threshold limit Port high threshold limit output drop when sinking output drop when sinking output drop when sourcing output drop when sourcing pull-up, pull-down resistor
condition
unit
kohm
Comments
Vbat Vbat
Vbat
Vbat Vbat
Vbat
Table 7.3:
pins performances
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Voltage level detector
switched off, simultaneously with activities Generates interrupt power supply below pre-determined level
Voltage Level Detector monitors state system battery. returns logical high value interrupt) status register supplied voltage drops below user defined level.
symbol
description
Threshold voltage
Note
unit
comments
trimming values: VldRange VldTune Note Note
3.06 2.88 2.72 2.57 2.44 2.33 2.22 2.13 TEOM duration measurement Minimum pulse width detected 1350
Table 7.4: Note:
Voltage level detector operation Absolute precision threshold voltage ±10%. This timing respected case internal crystal oscillators selected. Refer clock block documentation case external clock used.
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Physical description
Packages:
Figure 8.1:
TQFP32 package, size
Figure 8.2:
SO28 package, size
Die:
Figure 8.3:
Die. Chip size thickness. Physical chip size exact positioning change without notification.
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
8.2.1 Bonding location
Coordinates start with point near bottom left border (with respect above picture). horizontal, vertical. size
Symbol
PC(5) PC(6) PC(7) PB(0) PB(1) PB(2) PB(3) PB(4) PB(5) PB(6) PB(7) RESET Vbat Vreg
340.4 617.4 894.4 1079.0 1314.2 1809.9 2045.1 2280.3 2532.9
3493.9 3221.9 2949.8 2677.8 2442.6 2165.6 1538.6 1261.6 984.6 729.4 452.4
Symbol
XOut PA(0) PA(1) PA(2) PA(3) PA(4) PA(5) PA(6) PA(7) PC(0) PC(1) PC(2) PC(3) PC(4)
3015.2 3282.0 3282.0 3282.0 3282.0 3282.0 3282.0 3282.0 3282.0 3114.6 2930.0 2745.4 2510.2 1870.8 1498.8 1226.7 954.7 719.5 447.4
413.6 998.2 1833.4 2484.0 2768.6 3103.8 3313.4 3523.0 3785.0 3785.0 3785.0 3785.0 3785.0 3785.0 3785.0 3785.0 3785.0 3785.0
Table 8.1:
Bonding pads location. connect pads named Pads substrate must connected Vss.
D0202-59
Datasheet XE88LC03
Data Acquisition Microcontroller
Contacting XEMICS
will find more information about XE88LC03 other XEMICS products, well addresses representatives distributors your region http://www.xemics.com.
XEMICS 2002 rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent other industrial intellectual property rights. XEMICS PRODUCTS DESIGNED, INTENDED, AUTHORIZED WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION XEMICS PRODUCTS SUCH APPLICATIONS UNDERSTOOD UNDERTAKEN SOLELY CUSTOMER'S RISK. Should customer purchase XEMICS products such unauthorized application, customer shall indemnify hold Xemics officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs damages attorney fees which could arise.
D0202-59

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