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Wide Operating Voltage Range High-Current Outputs Drive LSTTL Loads Po
Top Searches for this datasheetSN54HC688, SN74HC688 8-BIT IDENTITY COMPARATORS Wide Operating Voltage Range High-Current Outputs Drive LSTTL Loads Power Consumption, 80-µA SN54HC688 PACKAGE SN74HC688 PACKAGE (TOP VIEW) Typical ±4-mA Output Drive Input Current Compare 8-Bit Words SN54HC688 PACKAGE (TOP VIEW) description/ordering information These identity comparators perform comparisons 8-bit binary words. output-enable (OE) input used force output high level. ORDERING INFORMATION PDIP -40°C 85°C 40°C SOIC TSSOP CDIP -55°C 125°C LCCC PACKAGE Tube Tube Tape reel Tape reel Tube Tube Tube ORDERABLE PART NUMBER SN74HC688N SN74HC688DW SN74HC688DWR SN74HC688PWR SNJ54HC688J SNJ54HC688W SNJ54HC688FK TOP-SIDE MARKING SN74HC688N HC688 HC688 SNJ54HC688J SNJ54HC688W SNJ54HC688FK Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. FUNCTION TABLE INPUTS DATA OUTPUT Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Copyright 2003, Texas Instruments Incorporated products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC688, SN74HC688 8-BIT IDENTITY COMPARATORS logic diagram (positive logic) absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, -0.5 Input clamp current, VCC) (see Note Output clamp current, VCC) (see Note Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 58°C/W package 69°C/W package 83°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC688, SN74HC688 8-BIT IDENTITY COMPARATORS recommended operating conditions (see Note SN54HC688 Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage Input transition (rise fall) time 3.15 1.35 1000 SN74HC688 3.15 1.35 1000 UNIT Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS -5.2 3.98 5.48 25°C 1.998 4.499 5.999 0.002 0.001 0.001 0.17 0.15 ±0.1 0.26 0.26 ±100 SN54HC688 ±1000 SN74HC688 3.84 5.34 0.33 0.33 ±1000 UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC688, SN74HC688 8-BIT IDENTITY COMPARATORS switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER FROM (INPUT) (OUTPUT) 25°C SN54HC688 SN74HC688 UNIT operating characteristics, 25°C PARAMETER Power dissipation capacitance TEST CONDITIONS load UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC688, SN74HC688 8-BIT IDENTITY COMPARATORS PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point (see Note In-Phase Output Input tPLH tPHL Out-of-Phase Output Input tPLH tPHL LOAD CIRCUIT VOLTAGE WAVEFORM INPUT RISE FALL TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY OUTPUT TRANSITION TIMES NOTES: includes probe test-fixture capacitance. Phase relationships between waveforms were chosen arbitrarily. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement. tPLH tPHL same tpd. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B OCTOBER 1996 (S-CQCC-N**) TERMINAL SHOWN LEADLESS CERAMIC CHIP CARRIER TERMINALS 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6) 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0) 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 0.045 (1,14) 0.035 (0,89) 4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL MPDI002C JANUARY 1995 REVISED DECEMBER 20002 (R-PDIP-T**) PINS SHOWN PLASTIC DUAL-IN-LINE PACKAGE PINS 0.775 (19,69) 0.745 (18,92) 0.775 (19,69) 0.745 (18,92) 0.920 (23,37) 0.850 (21,59) 1.060 (26,92) 0.940 (23,88) 0.260 (6,60) 0.240 (6,10) MS-100 VARIATION 0.070 (1,78) 0.045 (1,14) 0.045 (1,14) 0.030 (0,76) 0.020 (0,51) 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) Seating Plane 0.125 (3,18) 0.010 (0,25) Gauge Plane 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) 0.430 (10,92) 14/18 ONLY vendor option 4040049/E 12/2002 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Falls within JEDEC MS-001, except minimum body lrngth (Dim lead shoulder width vendor option, either half full width. POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MSOI003E JANUARY 1995 REVISED SEPTEMBER 2001 (R-PDSO-G**) PINS SHOWN 0.020 (0,51) 0.014 (0,35) PLASTIC SMALL-OUTLINE PACKAGE 0.050 (1,27) 0.010 (0,25) 0.419 (10,65) 0.400 (10,15) 0.299 (7,59) 0.291 (7,39) 0.010 (0,25) Gage Plane 0.010 (0,25) 0.050 (1,27) 0.016 (0,40) Seating Plane 0.104 (2,65) 0.012 (0,30) 0.004 (0,10) PINS 0.004 (0,10) 0.410 (10,41) 0.400 (10,16) 0.462 (11,73) 0.453 (11,51) 0.510 (12,95) 0.500 (12,70) 0.610 (15,49) 0.600 (15,24) 0.710 (18,03) 0.700 (17,78) 4040000/E 08/01 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0.006 (0,15). Falls within JEDEC MS-013 POST OFFICE 655303 DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C JANUARY 1995 REVISED FEBRUARY 1999 (R-PDSO-G**) PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 0,30 0,19 0,10 0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50 Seating Plane 1,20 0,15 0,05 0,10 PINS 3,10 5,10 5,10 6,60 7,90 9,80 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153 POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. 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