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SSD1789A
CSTN Segment Common COLOR Driver with Controller
This document contains information product. Specifications information herein subject change without notice. http://www.solomon-systech.com SSD1789A Series 2004 Copyright 2004 Solomon Systech Limited
TABLE CONTENTS GENERAL DESCRIPTION.5 FEATURES.5 ORDERING INFORMATION BLOCK DIAGRAM FLOOR PLAN DESCRIPTION FUNCTIONAL BLOCK DESCRIPTIONS.19 COMMAND TABLE.26 COMMAND DESCRIPTIONS.37 MAXIMUM RATINGS CHARACTERISTICS CHARACTERISTICS APPLICATION EXAMPLES.66 SSD1789AZ TRAY DIMENSIONS
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2004
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SSD1789A Series
TABLE TABLES Table Ordering Information Table SSD1789A Series Bump Coordinates (Bump center) Table interface mode selection PS2-PS0. Table VOUT Relationship Table Data selection modes Table Command Table Table Graphic command table. Table Extended command table Table Read Command Table Table arrangements 18-bit/pixel, direct write mode. Table Arrangement modes Table Data arrangement different pixel mode. Table Area scrolling selection modes. Table Maximum Ratings Table Characteristics Table Characteristics Table Parallel Timing Characteristics 85°C, 2.6V 3.3V) Table Parallel Timing Characteristics 85°C, 2.6V 3.3V) Table Parallel Timing Characteristics 85°C, 2.4V) Table Parallel Timing Characteristics 85°C, 2.4V) Table Serial Timing Characteristics 85°C, 2.6V 3.6V) Table Serial Timing Characteristics 85°C, 2.6V 3.6V) Table Serial Timing Characteristics 85°C, 2.4V) Table Serial Timing Characteristics 85°C, 2.4V)
SSD1789A Series
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2004
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TABLE FIGURES Figure SSD1789A Block Diagram Figure SSD1789A Floor Plan Figure Read Display Data Figure Graphic Display Data Map. Figure SSD1789A Booster Configurations Figure Oscillator structural block diagram Figure Column page scan direction Figure Example Normal Inverse page/column/ scan directions. Figure Area scrolling selection modes Figure GDDRAM updates area scrolling. Figure Example center scroll mode. Figure Contrast Control Flow Segment Re-map Figure Contrast Control Voltage Range Curve. Figure Partial display mode. Figure programming circuitry Figure Flow chart programming Procedure Figure 8-bit/16-bit Parallel 6800-series Interface Timing Characteristics. Figure 8-bit/16-bit Parallel 8080-series Interface Timing Characteristics. Figure 8-bit/16-bit Parallel 6800-series Interface Timing Characteristics. Figure 8-bit/16-bit Parallel 8080-series Interface Timing Characteristics. Figure wire Serial Timing Characteristics (PS2=PS1=PS0=L) Figure wire Serial Timing Characteristics (PS2=PS1=L, PS0=H) Figure wire Serial Timing Characteristics (PS2=PS1=PS0=L) Figure wire Serial Timing Characteristics (PS2=PS1=L, PS0=H) Figure Application example Figure VDD, VDDIO, connection example Figure SSD1789AZ Tray Dimension
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2004
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SSD1789A Series
GENERAL DESCRIPTION
SSD1789A single-chip CMOS color driver with controller dot-matrix graphic liquid crystal display system. SSD1789A consists high voltage driving output pins driving maximum Segments, Commons CSTN panel. SSD1789A consists bits Graphic Display Data (GDDRAM). Data/Commands sent from common through 16-bit/8-bit 6800-series 8080-series compatible Parallel Interface 3-wires 4-wires Serial Peripheral Interface pins selection. SSD1789A embeds On-Chip Oscillator, DC-DC Converter, bias divider reduce number external component. With advanced design, power consumption, stable operating voltage flexible package layout, SSD1789A suitable portable battery-driven applications requiring long operation period with compact size.
FEATURES
VDDIO 1.2V 2.4V 3.6V 3.6V Driving Output Voltage: Current Sleep Mode Maximum display size: columns rows. Display color support: 262K/65K/4K/256 color selectable, with preset/programmable color look table (CLUT) 16-bit/8-bit 6800-series Parallel Interface, 16-bit/8-bit 8080-series Parallel Interface, 3-wires Serial Peripheral Interface 4-wires Serial Peripheral Interface On-Chip (132 RGB) (132) 313632 bits Graphic Display Data Programmable partial display function Column Re-mapping Page scan direction control Software selection Center Screen Scrolling, Screen Scrolling, Bottom Screen Scrolling Whole Screen Scrolling On-Chip Voltage Generator External Driving Power Supply Selectable On-Chip DC-DC Converter Levels Internal Contrast Control Programmable Driving Voltage Temperature Compensation Coefficients On-Chip Bias Divider Programmable drive duty ratio: 1/32 /132 On-Chip Oscillator Non-Volatile Memory (OTP) calibration On-Chip Graphic Acceleration Engine featuring Line/Rectangle Drawing, Dim/Clear/Copy operation Window mode. Driving Scheme Interlace/progressive common pins sequence selectable Power Supply:
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ORDERING INFORMATION Ordering Part Number 132x3 (396) Package Form Gold Bump Reference Figure page Remark
SSD1789AZ
Table Ordering Information
Solomon Systech
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SSD1789A Series
BLOCK DIAGRAM
ROW0 ROW131 COL0 ~COL395
Common Driver Circuits
Segment Driver Circuits
VOUT
Display Data Latch
Driving Voltage Generator, DC/DC Converter, Voltage Regulator, Contrast Control Bias Divider Temperature Compensation
VCix2 VOUTD3
BUSY Display Timing Generator GDDRAM (132RGB) bits Page Address Control Circuit Column Address Control Circuit Graphic Accelerator
Oscillator
System Control Circuit
Status Register VDDIO CVSS
Command Decoder
Microprocessor Interface Logic
RVSS LCDVSS
Figure SSD1789A Block Diagram
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FLOOR PLAN
centre: (-9998.4,373.5) centre: (9998.4,373.5) centre: (9998.4,-416.5)
centre: (-9998.4,-416.5)
25um
25um
25um
25um
75um 18um
25um
25um
25um
25um
25um
25um
25um
25um
Note: Diagram showing face Coordinates reference centre alignment keys contain gold bump size: 20.99 1.78 thickness: Bump height: 15um (normal) Bump co-planarity: <3um (within die) Bump size: 1-272 274-295 297-298 299-782 783-784 786-807
(um)
(um)
Figure SSD1789A Floor Plan
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2004
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SSD1789A Series
Table SSD1789A Series Bump Coordinates (Bump center)
Signal DUMMY DUMMY DUMMY coor -10340.80 -10262.35 -10186.05 -10109.75 -10033.45 -9957.15 -9880.85 -9804.55 -9728.25 -9651.95 -9575.65 coor -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 Signal VLREF VOUTD3 VOUTD3 VOUTD3 coor -6523.65 -6447.35 -6371.05 -6294.75 -6218.45 -6142.15 -6065.85 -5989.55 -5913.25 -5836.95 -5760.65 coor -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 Signal VOUT VOUT VOUT VOUT
coor -2708.65 -2632.35 -2556.05 -2479.75 -2403.45 -2327.15 -2250.85 -2174.55 -2098.25 -2021.95 -1945.65
coor -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
-9499.35 -733.00 -9423.05 -733.00 -9346.75 -733.00 -9270.45 -733.00 -9194.15 -733.00 -9117.85 -9041.55 -8965.25 -8888.95 -8812.65 -8736.35 -8660.05 -8583.75 -8507.45 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
-5684.35 -733.00 -5608.05 -733.00 -5531.75 -733.00 -5455.45 -733.00 -5379.15 -733.00 -5302.85 -5226.55 -5150.25 -5073.95 -4997.65 -4921.35 -4845.05 -4768.75 -4692.45 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
-1869.35 -733.00 -1793.05 -733.00 -1716.75 -733.00 -1640.45 -733.00 -1564.15 -733.00 -1487.85 -1411.55 -1335.25 -1258.95 -1182.65 -1106.35 -1030.05 -953.75 -877.45 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
-8431.15 -733.00 -8354.85 -733.00 -8278.55 -733.00 -8202.25 -8125.95 -8049.65 -7973.35 -7897.05 -7820.75 -7744.45 -7668.15 -7591.85 -7515.55 -7439.25 -7362.95 -7286.65 -7210.35 -7134.05 -7057.75 -6981.45 -6905.15 -6828.85 -6752.55 -6676.25 -6599.95 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
VOUTD3 -4616.15 -733.00 VOUTD3 -4539.85 -733.00 VOUTD3 -4463.55 -733.00 VOUTD3 VOUTD3 VOUTD3 VOUTD3 VOUTD3 VOUTD3 VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT -4387.25 -4310.95 -4234.65 -4158.35 -4082.05 -4005.75 -3929.45 -3853.15 -3776.85 -3700.55 -3624.25 -3547.95 -3471.65 -3395.35 -3319.05 -3242.75 -3166.45 -3090.15 -3013.85 -2937.55 -2861.25 -2784.95 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
-801.15 -733.00 -724.85 -733.00 BUSY -648.55 -733.00 -572.25 -495.95 -419.65 -343.35 -267.05 -190.75 -114.45 -38.15 38.15 114.45 190.75 267.05 343.35 419.65 495.95 572.25 648.55 724.85 801.15 877.45 953.75 1030.05 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
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Signal RVSS CVSS CVSS CVSS CVSS CVSS CVSS CVSS CVSS CVSS CVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS LCDVSS
coor 1106.35 1182.65 1258.95 1335.25 1411.55 1487.85 1564.15 1640.45 1716.75 1793.05 1869.35 1945.65 2021.95 2098.25 2174.55 2250.85 2327.15 2403.45 2479.75 2556.05 2632.35 2708.65 2784.95 2861.25 2937.55 3013.85 3090.15 3166.45 3242.75 3319.05 3395.35 3471.65 3547.95 3624.25 3700.55 3776.85 3853.15 3929.45 4005.75 4082.05 4158.35 4234.65 4310.95 4387.25 4463.55 4539.85 4616.15 4692.45 4768.75 4845.05
coor -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
Signal VDDIO VDDIO VCIX2 VCIX2 VCIX2 VCIX2 VCIX2 VCIX2 VCIX2 VCIX2 VHREF VOUT VLREF VLREF VCIX2
coor 4921.35 4997.65 5073.95 5150.25 5226.55 5302.85 5379.15 5455.45 5531.75 5608.05 5684.35 5760.65 5836.95 5913.25 5989.55 6065.85 6142.15 6218.45 6294.75 6371.05 6447.35 6523.65 6599.95 6676.25 6752.55 6828.85 6905.15 6981.45 7057.75 7134.05 7210.35 7286.65 7362.95 7439.25 7515.55 7591.85 7668.15 7744.45 7820.75 7897.05 7973.35 8049.65 8125.95 8202.25 8278.55 8354.85 8431.15 8507.45 8583.75 8660.05
coor -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
Signal DUMMY DUMMY DUMMY
coor 8736.35 8812.65 8888.95 8965.25 9041.55 9117.85 9194.15 9270.45 9346.75 9423.05 9499.35 9575.65 9651.95 9728.25 9804.55 9880.85 9957.15 10033.45 10109.75 10186.05 10262.35 10340.80
coor -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00 -733.00
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SSD1789A Series
Name DUMMY ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7 ROW8 ROW9 ROW10 ROW11 ROW12 ROW13 ROW14 ROW15 ROW16 ROW17 ROW18 ROW19 ROW20 ROW21 DUMMY DUMMY DUMMY ROW22 ROW23 ROW24 ROW25 ROW26 ROW27 ROW28 ROW29 ROW30 ROW31 ROW32 ROW33 ROW34 ROW35 ROW36 ROW37 ROW38 ROW39 ROW40 ROW41 ROW42 ROW43 ROW44
coor 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10310.80 10344.80 10231.60 10178.30 10136.50 10094.70 10052.90 10011.10 9969.30 9927.50 9885.70 9843.90 9802.10 9760.30 9718.50 9676.70 9634.90 9593.10 9551.30 9509.50 9467.70 9425.90 9384.10 9342.30 9300.50 9258.70
coor -526.60 -473.30 -431.50 -389.70 -347.90 -306.10 -264.30 -222.50 -180.70 -138.90 -97.10 -55.30 -13.50 28.30 70.10 111.90 153.70 195.50 237.30 279.10 320.90 362.70 404.50 457.80 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
Name ROW46 ROW47 ROW48 ROW49 ROW50 ROW51 ROW52 ROW53 ROW54 ROW55 ROW56 ROW57 ROW58 ROW59 ROW60 ROW61 ROW62 ROW63 ROW64 ROW65
coor 9175.10 9133.30 9091.50 9049.70 9007.90 8966.10 8924.30 8882.50 8840.70 8798.90 8757.10 8715.30 8673.50 8631.70 8589.90 8548.10 8506.30 8464.50 8422.70 8380.90
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
Name COL395 COL394 COL393 COL392 COL391 COL390 COL389 COL388 COL387 COL386 COL385 COL384 COL383 COL382 COL381 COL380 COL379 COL378 COL377 COL376 COL375 COL374 COL373 COL372 COL371 COL370 COL369 COL368 COL367 COL366 COL365 COL364 COL363 COL362 COL361 COL360 COL359 COL358 COL357 COL356 COL355 COL354 COL353 COL352 COL351 COL350 COL349 COL348 COL347 COL345
Signal SEG131
SEG130
SEG129
SEG128
SEG127
SEG126
SEG125
Color
coor 8255.50 8213.70 8171.90 8130.10 8088.30 8046.50 8004.70 7962.90 7921.10 7879.30 7837.50 7795.70 7753.90 7712.10 7670.30 7628.50 7586.70 7544.90 7503.10 7461.30 7419.50 7377.70 7335.90 7294.10 7252.30 7210.50 7168.70 7126.90 7085.10 7043.30 7001.50 6959.70 6917.90 6876.10 6834.30 6792.50 6750.70 6708.90 6667.10 6625.30 6583.50 6541.70 6499.90 6458.10 6416.30 6374.50 6332.70 6290.90 6249.10
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
SEG124
SEG123
SEG122
SEG121
SEG120
SEG119
SEG118
SEG117
SEG116
ROW45 9216.90
COL346 SEG115
6207.30 706.00 6165.50 706.00
SSD1789A Series
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Name COL344 COL343 COL342 COL341 COL340 COL339 COL338 COL337 COL336 COL335 COL334 COL333 COL332 COL331 COL330 COL329 COL328 COL327 COL326 COL325 COL324 COL323 COL322 COL321 COL320 COL319 COL318 COL317 COL316 COL315 COL314 COL313 COL312 COL311 COL310 COL309 COL308 COL307 COL306 COL305 COL304 COL303 COL302 COL301 COL300 COL299 COL298 COL297 COL296 COL295 COL294
Signal SEG114
SEG113
SEG112
SEG111
SEG110
SEG109
SEG108
SEG107
SEG106
SEG105
SEG104
SEG103
SEG102
SEG101
SEG100
SEG99
Color
coor 6123.70 6081.90 6040.10 5998.30 5956.50 5914.70 5872.90 5831.10 5789.30 5747.50 5705.70 5663.90 5622.10 5580.30 5538.50 5496.70 5454.90 5413.10 5371.30 5329.50 5287.70 5245.90 5204.10 5162.30 5120.50 5078.70 5036.90 4995.10 4953.30 4911.50 4869.70 4827.90 4786.10 4744.30 4702.50 4660.70 4618.90 4577.10 4535.30 4493.50 4451.70 4409.90 4368.10 4326.30 4284.50 4242.70 4200.90 4159.10 4117.30 4075.50 4033.70
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
Name COL293 COL292 COL291 COL290 COL289 COL288 COL287 COL286 COL285 COL284 COL283 COL282 COL281 COL280 COL279 COL278 COL277 COL276 COL275 COL274 COL273 COL272 COL271 COL270 COL269 COL268 COL267 COL266 COL265 COL264 COL263 COL262 COL261 COL260 COL259 COL258 COL257 COL256 COL255 COL254 COL253 COL252 COL251 COL250 COL249 COL248 COL247 COL246 COL245 COL244 COL243
Signal SEG97
SEG96
SEG95
SEG94
SEG93
SEG92
SEG91
SEG90
SEG89
SEG88
SEG87
SEG86
SEG85
SEG84
SEG83
SEG82
Color
coor 3991.90 3950.10 3908.30 3866.50 3824.70 3782.90 3741.10 3699.30 3657.50 3615.70 3573.90 3532.10 3490.30 3448.50 3406.70 3364.90 3323.10 3281.30 3239.50 3197.70 3155.90 3114.10 3072.30 3030.50 2988.70 2946.90 2905.10 2863.30 2821.50 2779.70 2737.90 2696.10 2654.30 2612.50 2570.70 2528.90 2487.10 2445.30 2403.50 2361.70 2319.90 2278.10 2236.30 2194.50 2152.70 2110.90 2069.10 2027.30 1985.50 1943.70 1901.90
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
SEG98
SEG81
Solomon Systech
2004
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SSD1789A Series
Name COL242 COL241 COL240 COL239 COL238 COL237 COL236 COL235 COL234 COL233 COL232 COL231 COL230 COL229 COL228 COL227 COL226 COL225 COL224 COL223 COL222 COL221 COL220 COL219 COL218 COL217 COL216 COL215 COL214 COL213 COL212 COL211 COL210 COL209 COL208 COL207 COL206 COL205 COL204 COL203 COL202 COL201 COL200 COL199 COL198 COL197 COL196 COL195 COL194 COL192
Signal Color SEG80 SEG79 SEG78 SEG77 SEG76 SEG75 SEG74 SEG73 SEG72 SEG71 SEG70 SEG69 SEG68 SEG67 SEG66 SEG65 COL193 SEG64
coor 1860.10 1818.30 1776.50 1734.70 1692.90 1651.10 1609.30 1567.50 1525.70 1483.90 1442.10 1400.30 1358.50 1316.70 1274.90 1233.10 1191.30 1149.50 1107.70 1065.90 1024.10 982.30 940.50 898.70 856.90 815.10 773.30 731.50 689.70 647.90 606.10 564.30 522.50 480.70 438.90 397.10 355.30 313.50 271.70 229.90 188.10 146.30 104.50 62.70 20.90 -20.90 -62.70 -104.50 -146.30
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
-188.10 706.00 -229.90 706.00
Signal Color SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 COL142 SEG47 COL141
Name COL191 COL190 COL189 COL188 COL187 COL186 COL185 COL184 COL183 COL182 COL181 COL180 COL179 COL178 COL177 COL176 COL175 COL174 COL173 COL172 COL171 COL170 COL169 COL168 COL167 COL166 COL165 COL164 COL163 COL162 COL161 COL160 COL159 COL158 COL157 COL156 COL155 COL154 COL153 COL152 COL151 COL150 COL149 COL148 COL147 COL146 COL145 COL144 COL143
coor -271.70 -313.50 -355.30 -397.10 -438.90 -480.70 -522.50 -564.30 -606.10 -647.90 -689.70 -731.50 -773.30 -815.10 -856.90 -898.70 -940.50 -982.30 -1024.10 -1065.90 -1107.70 -1149.50 -1191.30 -1233.10 -1274.90 -1316.70 -1358.50 -1400.30 -1442.10 -1483.90 -1525.70 -1567.50 -1609.30 -1651.10 -1692.90 -1734.70 -1776.50 -1818.30 -1860.10 -1901.90 -1943.70 -1985.50 -2027.30 -2069.10 -2110.90 -2152.70 -2194.50 -2236.30 -2278.10
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
-2319.90 706.00 -2361.70 706.00
SSD1789A Series
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2004
Solomon Systech
Name COL140 COL139 COL138 COL137 COL136 COL135 COL134 COL133 COL132 COL131 COL130 COL129 COL128 COL127 COL126 COL125 COL124 COL123 COL122 COL121 COL120 COL119 COL118 COL117 COL116 COL115 COL114 COL113 COL112 COL111 COL110 COL109 COL108 COL107 COL106 COL105 COL104 COL103 COL102 COL101 COL100 COL99 COL98 COL97 COL96 COL95 COL94 COL93 COL92 COL90
Signal Color SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 COL91 SEG30
coor -2403.50 -2445.30 -2487.10 -2528.90 -2570.70 -2612.50 -2654.30 -2696.10 -2737.90 -2779.70 -2821.50 -2863.30 -2905.10 -2946.90 -2988.70 -3030.50 -3072.30 -3114.10 -3155.90 -3197.70 -3239.50 -3281.30 -3323.10 -3364.90 -3406.70 -3448.50 -3490.30 -3532.10 -3573.90 -3615.70 -3657.50 -3699.30 -3741.10 -3782.90 -3824.70 -3866.50 -3908.30 -3950.10 -3991.90 -4033.70 -4075.50 -4117.30 -4159.10 -4200.90 -4242.70 -4284.50 -4326.30 -4368.10 -4409.90
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
Name COL89 COL88 COL87 COL86 COL85 COL84 COL83 COL82 COL81 COL80 COL79 COL78 COL77 COL76 COL75 COL74 COL73 COL72 COL71 COL70 COL69 COL68 COL67 COL66 COL65 COL64 COL63 COL62 COL61 COL60 COL59 COL58 COL57 COL56 COL55 COL54 COL53 COL52 COL51 COL50 COL49 COL48 COL47 COL46 COL45 COL44 COL43 COL42 COL41 COL39
-4451.70 706.00 -4493.50 706.00
Signal Color SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 COL40 SEG13
coor -4535.30 -4577.10 -4618.90 -4660.70 -4702.50 -4744.30 -4786.10 -4827.90 -4869.70 -4911.50 -4953.30 -4995.10 -5036.90 -5078.70 -5120.50 -5162.30 -5204.10 -5245.90 -5287.70 -5329.50 -5371.30 -5413.10 -5454.90 -5496.70 -5538.50 -5580.30 -5622.10 -5663.90 -5705.70 -5747.50 -5789.30 -5831.10 -5872.90 -5914.70 -5956.50 -5998.30 -6040.10 -6081.90 -6123.70 -6165.50 -6207.30 -6249.10 -6290.90 -6332.70 -6374.50 -6416.30 -6458.10 -6499.90 -6541.70
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
-6583.50 706.00 -6625.30 706.00
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2004
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SSD1789A Series
Name COL38 COL37 COL36 COL35 COL34 COL33 COL32 COL31 COL30 COL29 COL28 COL27 COL26 COL25 COL24 COL23 COL22 COL21 COL20 COL19 COL18 COL17 COL16 COL15 COL14 COL13 COL12 COL11 COL10 COL9 COL8 COL7 COL6 COL5 COL4 COL3 COL2 COL1 COL0
Signal Color SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6
coor -6667.10 -6708.90 -6750.70 -6792.50 -6834.30 -6876.10 -6917.90 -6959.70 -7001.50 -7043.30 -7085.10 -7126.90 -7168.70 -7210.50 -7252.30 -7294.10 -7335.90 -7377.70 -7419.50 -7461.30 -7503.10 -7544.90 -7586.70 -7628.50 -7670.30 -7712.10 -7753.90 -7795.70 -7837.50 -7879.30 -7921.10 -7962.90 -8004.70 -8046.50 -8088.30 -8130.10 -8171.90
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
Name ROW66 ROW67 ROW68 ROW69 ROW70 ROW71 ROW72 ROW73 ROW74 ROW75 ROW76 ROW77 ROW78 ROW79 ROW80 ROW81 ROW82 ROW83 ROW84 ROW85 ROW86 ROW87 ROW88 ROW89 ROW90 ROW91 ROW92 ROW93 ROW94 ROW95 ROW96 ROW97 ROW98 ROW99 ROW100 ROW101 ROW102
coor -8380.90 -8422.70 -8464.50 -8506.30 -8548.10 -8589.90 -8631.70 -8673.50 -8715.30 -8757.10 -8798.90 -8840.70 -8882.50 -8924.30 -8966.10 -9007.90 -9049.70 -9091.50 -9133.30 -9175.10 -9216.90 -9258.70 -9300.50 -9342.30 -9384.10 -9425.90 -9467.70 -9509.50 -9551.30 -9593.10 -9634.90 -9676.70 -9718.50 -9760.30 -9802.10 -9843.90 -9885.70
coor 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00 706.00
Name ROW113 ROW114 ROW115 ROW116 ROW117 ROW118 ROW119 ROW120 ROW121 ROW122 ROW123 ROW124 ROW125 ROW126 ROW127 ROW128 ROW129 ROW130 ROW131 DUMMY
coor -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80 -10310.80
coor 279.10 237.30 195.50 153.70 111.90 70.10 28.30 -13.50 -55.30 -97.10 -138.90 -180.70 -222.50 -264.30 -306.10 -347.90 -389.70 -431.50 -473.30 -526.60
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
-8213.70 706.00 -8255.50 706.00
ROW103 -9927.50 706.00 ROW104 -9969.30 706.00 ROW105 ROW106 ROW107 ROW108 ROW109 DUMMY DUMMY DUMMY ROW110 ROW111 ROW112 -10011.10 -10052.90 -10094.70 -10136.50 -10178.30 -10231.60 -10344.80 -10310.80 -10310.80 -10310.80 -10310.80 706.00 706.00 706.00 706.00 706.00 706.00 706.00 457.80 404.50 362.70 320.90
SSD1789A Series
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2004
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DESCRIPTION
This chip selection input. chip enabled communication only when pulled low.
This reset signal input. Initialization chip started once reset pulled low. minimum pulse width reset sequence 10us.
This Data/Command control pin. When pulled high, input D7-D0 treated display data. When pulled low, input D7-D0 will transferred command register.
This interface input. When 6800 interface mode selected, this will used Read/Write selection input. Read mode will carried when this pulled high write mode when this pulled low. When 8080 interface mode selected, this Write control signal input. Data write operation initiated when this pulled chip selected.
This interface input. When 6800 interface mode selected, this will used Enable signal. Read/ write operation initiated when this pulled high chip selected. When 8080 interface mode selected, this Read control signal input. Data read operation initiated when this pulled chip selected.
These pins interface mode selection input. Different interface selected changing setting these pins. Interface 16-bit 8080 parallel interface 8-bit 8080 parallel interface 16-bit 6800 parallel interface 8-bit 6800 parallel interface 3-lines serial peripheral interface (SPI) 4-lines serial peripheral interface (SPI) Table interface mode selection PS2-PS0 Note1: serial applications, D15, recommended connect VDD. Note2: Read back operation only available parallel mode
D0-D15
These pins 16-bit bi-directional data parallel interface mode. while LSB. When serial mode selected, serial data input serial clock input SCK.
This system power supply logic block.
VDDIO
This system power supply buffer. Please refer Figure Page connection example.
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6.10
This reference voltage input internal DC-DC converter. DC-DC converter output equal multiple factor (4X, times with respect VSS. maximum output voltage will limit max. VOUT characteristic. Note: Voltage this input must larger than equal VDD. (VCI VDD)
6.11 VCIX2
This voltage reference output which equal VCI.
6.12 VLREF
This ground operation amplifier VL5. should connected VOUTD3.
6.13 VHREF
This power supply operation amplifier VL3. should connected VCIX2.
6.14
This ground logic.
6.15 RVSS
This ground Vref where Vref reference voltage internal regulator.
6.16 CVSS
This ground analog.
6.17 LCDVSS
This ground segment common output pins.
6.18 VOUT
This most positive voltage supply chip. generated internal voltage regulator. This voltage level used internal referencing only voltage level VOUT used driving external circuitry.
6.19 VOUTD3
This voltage reference output.
6.20 VL5, VL4,
driving voltages. They supplied externally generated internal bias divider. They have following relationship: VOUT bias (a-1)/a VOUT (a-2)/a VOUT VOUT VOUT
Table VOUT Relationship
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6.21 ROW0 ROW131
These pins provide driving signals, COMMON, panel.
6.22 COL0 COL395
These pins provide driving signals, SEGMENT, panel. Red, Green, Blue colors signal sent from SEGMENT output same time. output voltage level these pins during sleep mode standby mode.
6.23 C1P, C1N, C2P, C2N, C1Y, C3P,
When internal DC-DC voltage converter used, external capacitor connected between these pins. Please refer system block diagram external capacitors connection Figure
6.24
This system clock I/O. This external clock input device, which enabled using extended command. should left open under normal operation. internal oscillator will used after power reset.
6.25
This used cascade purpose only. should left open under normal operation.
6.26
This used cascade purpose only. should left open under normal operation.
6.27 BUSY
This will high during buffer read/write operation during graphic commands executing. System programmer should read this (low ready, high busy) before sending next buffer related command (e.g. write 5CH; read graphic commands)
6.28
connection (NC) should connected signal shorted other pins application. should left open.
6.29 DUMMY
This floating dummy with internal circuit connection.
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FUNCTIONAL BLOCK DESCRIPTIONS
Microprocessor Interface Logic
Microprocessor Interface unit consists three functional blocks driving 6800-series parallel interface, 8080series parallel interface, 3-lines serial peripheral interface 4-lines serial peripheral interface. selection different interface done PS2, pins. Please refer descriptions page Parallel 6800-series Interface parallel Interface consists bi-directional data pins (D15 D0), input high indicates read operation from Graphical Display Data (GDDRAM) status register. input indicates write operation Display Data Internal Command Registers depending status input. input serves data latch signal (clock) when high provided that low. Please refer Figure Figure Parallel Interface Timing Diagram 6800-series microprocessors. order match operating frequency GDDRAM with that MCU, some pipeline processing internally performed which requires insertion dummy read before first actual display data read. This shown following diagram.
DATA
dummy read
data read1
data read
data read
write column address
Figure Read Display Data
Parallel 8080-series Interface
parallel interface consists bi-directional data pins input serves data read latch signal (clock) when provided that low. Whether reading display data from GDDRAM reading status from status register controlled input serves data write latch signal (clock) when provided that low. Whether writing display data GDDRAM writing command command register controlled dummy read also required before first actual display data read 8080-series interface. 4-lines Serial Peripheral Interface 4-lines serial peripheral Interface consists serial clock SCK, serial data SDA, shifted into 8-bit shift register every rising edge order data data data
sampled every eighth clock determine whether data byte shift register written Display Data command register same clock. Please refer Figure Figure page serial interface timing.
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3-lines Serial Peripheral Interface operation similar 4-lines serial peripheral interface while used. There altogether 9-bits will shifted into shift register every ninth clock sequence: bit, bit. (first sequential data) will determine following data byte shift register written Display Data command register 6800 series Parallel Interface 8080 series Parallel Interface 16/8-bits 16/8-bits Status only 3-lines 4-lines Serial peripheral Interface 8-bits
Data Read Data Write Command Read Command Write
16/8-bits 16/8-bits Status only
Table Data selection modes
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Reset Circuit
This block integrated into Microprocessor Interface Logic which includes Power Reset circuitry hardware reset pin, Both these having same reset function. Once receives negative reset pulse, internal circuitry will start initialize. minimum pulse width completing reset sequence 10us. status chip after reset given
When input low, chip initialized following:
Display ON/OFF: Normal/Inverse Display: Scan Direction: Internal Oscillator: Reference Voltage Generation Circuit: Voltage regulator Voltage Follower: Booster: Bias ratio: Multiplex ratio: Contrast level: Internal Regulator gain: Average temperature gradient: Partial display mode: Start address: address: Area Scroll block address: Bottom block address: Number specified block: Area scroll mode: Scroll start Start block address: Data Scan Direction Normal/inverse display page address: Normal/inverse display column address: Address-scan direction: arrangement: Gray-scale setup: Start Page Address set: Page Address set: Start Column address set: Column address set: Select PWM/FRC Display Normal Display ROW0-ROW131 COM0-COM131 Disable Disable Disable Disable 6.49 -0.25%/ Disable Whole screen scroll mode Normal Normal Column direction color 5-bit 1-bit mode
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Command Decoder
This module determines whether input data interpreted data command. Data directed this module based upon input pin. high, data written Graphic Display data (GDDRAM). low, input interpreted Command will decoded. decoded command will written corresponding command register.
Graphic Display Data (GDDRAM)
GDDRAM mapped static holding pattern displayed. size (132 RGB) 313632 bits. Figure page description GDDRAM address map. mechanical flexibility, re-mapping both Segment Common outputs selected software. Please refer command "Data Output/Scan direction" Table page detail description. Four pages display data form address block stored GDDRAM. Each block will form fundamental units scrolling addresses. Various types area scrolling performed software program according command "Set area Scroll" "Set Scroll Start" Table page
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bits data this cell BLOCK PAGE DATA COMMON OUTPUT ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7 ROW8 ROW9 ROW10 ROW11 ROW124 ROW125 ROW126 ROW127 ROW128 ROW129 ROW130 ROW131
COL388 SEG129
COL391 SEG130
SEGMENT COL0
COL394 SEG131
SEG0
SEG1
SEG2
COL387
COL389
COL390
COL392
COL393
COLUMN
Notes: Page SEGMENT data scan direction depend Data Output Scan Direction Setting. Data Output Scan Direction setting cannot affect Block scan direction.
Figure Graphic Display Data
SSD1789A Series
COL395
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
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Driving Voltage Generator Regulator
This module generates voltage needed display output. takes single supply input generates necessary bias voltages. consists DC-DC voltage converter Bias Divider output op-amp buffer option Power Control Register command enabled, this circuit block will divide regulator output (VOUT) give driving levels (VL2 VL5). Contrast Control -Software control voltage levels voltage. Bias Ratio Selection circuitry -Software control 1/10 bias ratio match characteristic panel. Self adjust temperature compensation circuitry Provide different compensation grade selections satisfy various liquid crystal temperature grades. grading selected software control. Defaulted temperature coefficient (TC) value -0.20%/°C.
VCIX2
VHREF VOUT
application, booster configuration, maximum VOUT 16V. 4.7uF 4.7uF C10: C11: 0.1uF
VOUTD3 VLREF
Figure SSD1789A Booster Configurations
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SSD1789A Series
Oscillator Circuit
This module On-Chip power oscillator circuitry (Figure oscillator generates clock DC-DC voltage converter. This clock also used Display Timing Generator.
Oscillator enable
enable Oscillation Circuit
enable Buffer
(CL)
Internal resistor
OSC1 OSC2
Figure Oscillator structural block diagram
Display Data Latch
This block series latches carrying display signal information. These latches hold data, which will Buffer Cell Level Selector output required voltage level.
Buffer Cell (Level Shifter)
This block embedded Segment/Common Driver Circuits. Buffer Cell works level shifter, which translates voltage output signal required driving voltage. output shifted with reference internal clock, which comes from Display Timing Generator. voltage levels given level selector, which synchronized with internal signal.
Level Selector
This block embedded Segment/Common Driver circuits. Level Selector control display synchronization. Display voltage levels separated into sets used with different cycles. Synchronization important since selects required voltage level Buffer Cell, which turn outputs waveform.
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COMMAND TABLE
Output Scan Direction Page Address Command Column Address Description start column address X7X6X5X4X3X2X1X0 column address Y7Y6Y5Y4Y3Y2Y1Y0 Column address 00000000b (POR) Column address range 0~131. start page address X7X6X5X4X3X2X1X0 page address Y7Y6Y5Y4Y3Y2Y1Y0 Page address 00000000b (POR) Page address range 0~131. ROW0.ROW65 COM0 ->COM65 COM0 ->COM65 COM65<-COM0 COM65<-COM0 ROW66.ROW131 COM66 COM131 (POR) COM131<-COM66 COM66 COM131 COM131<-COM66
Table COMMAND TABLE
Data Output Scan Direction
Normal Reverse page/column/scan directions page address normal display (POR) page address inverse display column address normal rotation (POR) column address inverse rotation scan direction column scan (POR) scan direction page scan Please refer Figure page detail description column/page scan direction modes color arrangement P22, P21, P20: control bits used setting (RGB) color arrangement segment output. value. Please refer Table page detail mapping segment output. Gray-scale selection Gray-scale modes 16-bit/pixel mode 8-bit/pixel mode 12-bit/pixel mode (POR) 18-bit/pixel mode direct write mode (POR) gamma correction type using 18-bit/pixel mode) (POR) type using 18-bit/pixel mode) type using 18-bit/pixel mode) Please refer Table page detail description different gray-scale selection modes. Different gray-scale selection modes.
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SSD1789A Series
Command 262K/65K/4K/256 Color Look Table (LUT) N=32 mode N=32 mode N=16 mode N=10 mode
Description
X516 X416 X316 X216 X116 X016 X517 X417 X317 X217 X117 X017
Display Control Driver duty selection Select driver duty from 1/32 1/132. increased from 000001b 100111b, number display lines, increased same rating. specify
Area Scroll
Block Address X5X4X3X2X1X0 used specify block address block lines) scrolling area. block address 000000b (POR) Bottom Block Address Y5Y4Y3Y2Y1Y0 used specify block address block lines) bottom scrolling area. Bottom block address 000000b (POR) Number specified Blocks number specified blocks Number (Top fixed area Scroll area) blocks bottom scroll whole screen scroll mode chosen, number specified blocks Number specified blocks 000000b (POR) Area Scroll Mode There four types area scroll. Types Area Scroll Center Screen Scroll Screen Scroll Bottom Screen Scroll Whole Screen Scroll Type area scroll Whole Screen Scroll (POR)
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Command Scroll Start
Description X5X4X3X2X1X0 specify start block address block lines) area scrolling. Start block address 000000b (POR) X0=0: turns reference voltage generator (POR) X0=1: turns reference voltage generator X1=0: turns internal regulator voltage follower (POR) X1=1: turns internal regulator voltage follower Select booster level Boost level Select contrast level from contrast steps Contrast increases X5X4X3X2X1X0 increased from 000000b 111111b. X5X4X3X2X1X0 100000b (POR) internal regulator gain (1+R2/R1) VOUT increases Y2Y1Y0 increased from 000b 111b. factor, 1+R2/R1, given Y2Y1Y0 000: 6.49 (POR) Y2Y1Y0 001: 7.03 Y2Y1Y0 010: 7.80 Y2Y1Y0 011: 8.91 Y2Y1Y0 100: 9.37 Y2Y1Y0 101: 10.53 Y2Y1Y0 110: 11.13 Y2Y1Y0 111: 12.02
Power Control Register
Contrast Level Internal Regulator Resistor Ratio
Increment Decrement contrast Normal/Inverse Display Enter partial Display
X0=0: contrast voltage regulator incremented X0=1: contrast voltage regulator decremented X0=0: normal display (POR) X0=1: inverse display X7X6X5X4X3X2X1X0 Start Address 0000000b (POR) Y7Y6Y5Y4Y3Y2Y1Y0 Address 0000000b (POR) Exit "partial display mode" executing command 10101001b (POR) X0=0: turns panel (POR) X0=1: turns panel X0=0: exit sleep mode. X0=1: enter sleep mode. (POR) Internal oscillator status (POR)
Exit partial Display Display On/Off Enter/Exit sleep mode Enable/disable internal oscillator
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SSD1789A Series
Command Temperature compensation coefficient
Description Average temperature gradients Average Temperature Gradient [%/oC] -0.13 -0.15 -0.20(POR) -0.25 X7X6X5X4X3X2X1X0 131) specify ROW0ROW131 which first display line (COM0) mapped
first display
Enable Disable enable Vout discharging path Vout discharging disable Vout discharging path (POR) Vout discharging path enabled when path display changing from high (eg. mux) (eg. mux) which Vout need drop relative voltage short time. Command result Operation. command should issued after execution Status Read command Enter "write display data mode executing command 01011100b. following byte used specify data byte written GDDRAM directly. should stated logic during display data written GDDRAM.
Write display data
Remark: denote DON'T CARE
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2004
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Table Graphic command table Fill Enable/Disable Command Draw Line Description Enter "Draw line mode" executing command 10000011. following four bytes used specify start coordinates address, start coordinates address, coordinates address coordinates address. remaining bytes used specify color. 16-bits color will used 18/16-bit pixel mode, color will used 12/8-bit pixel mode.
16-bit color
12-bit color Remark: 131, 131, Enter "Fill Enable/Disable mode" executing command 10010010. A0=0: Filled color option disabled (POR) A0=1: Filled color option enabled A1=0: disable content graphic object (POR) A1=1: enable content graphic object A3A2=00: gradient fill (POR) A3A2=01: enable x-direction gradient fill A3A2=10: enable y-direction gradient fill A3A2=11: reserved A5A4=00: gradient color sources defined corner's colors command H(POR) A5A4=01: reserved A5A4=10: reserved A5A4=11: reserved A6=0: white (POR) A6=1: black Enter "Draw rectangle mode" executing command 10000100. following four bytes used specify start coordinates address, start coordinates address, coordinates address coordinates address. next bytes used specify border color. last bytes used specify fill color. (depends fill option command 0x92). gradient fill enabled command 0x92, data byte which specific border color also used specify coordinate gradient start, should within rectangle.
Draw rectangle
16-bit color
12-bit color
Remark: 131, 131,
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SSD1789A Series
Command Draw circle
Description Enter "Draw circle mode" executing command 10000110. first three bytes used specify centre's coordinate, coordinate, circle's radius respectively. next bytes used specify border color. last bytes used specify fill color (depends fill option command 0x92).
16-bit color
12-bit color
Remark: A7~A0 255; B7~B0 255; C7~C0 Copy Enter "Copy mode" executing command. following four bytes used specify start coordinates address, start coordinates address, coordinates address coordinates address. remaining bytes used specify location coordinates coordinates. Remarks: 131, 131, Window Enter "Dim Window mode" executing command 10001100. following four bytes used specify start coordinates address, start coordinates address, coordinates address coordinates address. selected window area will dimmed white black according data command 0x92 Remarks: 131, 131,
Clear Window
Enter "Clear Window mode" executing command 10001110. following four bytes used specify start coordinates address, start coordinates address, coordinates address coordinates address. pixels contrast will Remarks: 131, 131,
Remark:
denote DON'T CARE After executed graphic command, waiting time required update GDDRAM content. (When VDD=2.4~3.0V, waiting time 340ns/pixel; When VDD=3.0~3.6V, waiting time 270ns/pixel)
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Table Extended command table Command biasing ratio B1B0 Frame frequency Nline Inversion Bias ratio bias bias bias (POR) 1/10 bias Description Allow user bias from 1/10
This command uses change frame frequency; N-line inversion N-line inversion mode F3F2F1F0 79.3 75.8 73.5 (POR) 71.3 69.8 second byte data N5N4N3N2N1N0 sets n-line inversion register from lines reduce display crosstalk. Register values from 000001b 111111b mapped lines lines respectively. Value 00000b disables N-line inversion. 010000 value. avoid polarity some lines, should noted that total number should multiple lines inversion (n). reset n-line counter frame (POR) will reset n-line counter frame
Note: frame frequency measured 7-line inversion condition calculated (Period 7-line)
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Command Reserved Select PWM/FRC
Description
bits (POR) bits bits bits Reserved
sequence
COM0 COM66 Normal Sequence Normal Sequence (POR) COM0 COM31 COM32 COM63, COM64 COM97 COM98 COM131 COM1 COM131 (odd) COM0 COM130 (even) COM0 COM130 (even) COM1 COM131 (odd)
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Command setting X3X2X1X0Y5 00000 original contrast
Description This command offset value contrast
00001 original contrast step 00010 original contrast steps 00011 original contrast steps 00100 original contrast steps 00101 original contrast steps 00110 original contrast steps 00111 original contrast steps 01000 original contrast steps 01001 original contrast steps 01010 original contrast steps 01011 original contrast steps 01100 original contrast steps 01101 original contrast steps 01110 original contrast steps 01111 original contrast steps 10000 original contrast steps 10001 original contrast steps 10010 original contrast steps 10011 original contrast steps 10100 original contrast steps 10101 original contrast steps 10110 original contrast steps 10111 original contrast steps 11000 original contrast steps 11001 original contrast steps 11010 original contrast steps 11011 original contrast steps 11100 original contrast steps 11101 original contrast steps 11110 original contrast steps 11111 original contrast step programming This command starts program driver with offset value. Each programmed once. Detail programming procedure page
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SSD1789A Series
Table Read Command Table Command Status Register Read Description D7D6 Center Screen Scroll Mode D7D6 Screen Scroll Mode D7D6 Bottom Screen Scroll Mode D7D6 Whole Screen Scroll Mode Scan Direction column direction Scan Direction page direction Display Display Sleep Mode disabled Sleep Mode enabled Display Inverse Display Normal Partial display disabled Partial display enabled Read display data Enter "read display data mode executing command 01011101b. next byte dummy data. GDDRAM data will read form second byte. GDDRAM column address pointer will increased automatically after each 2-bytes data read. (65K color mode).
Note: Command patterns other than that given Command Table prohibited. Otherwise, unexpected result will occur. Remark: denote DON'T CARE
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Solomon Systech
Data Read Write
read data from GDDRAM, command should executed then input High 6800-series parallel mode. High 8080-series parallel mode. data read provided serial mode. normal mode, GDDRAM column address pointer will increased automatically after each data read 8-levels gray scale mode after each 3-bytes data read 16-levels gray scale mode. Also, dummy read required before first data read. Figure Functional Description. write data GDDRAM, input High 6800-series parallel mode. serial interface, will always write mode. GDDRAM column address pointer will increased automatically after each data write 8-levels gray scale mode each 3-bytes data write 16-levels scale mode. address will reset next data read/write operation executed when 131.
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COMMAND DESCRIPTIONS
Column Address Hex)
This command specifies 8-bit column address display data RAM. start column address specified this command. driver supports columns. addresses incremented from start column column column direction scan, page address incremented column address then returned start column. column address will increased each data access after preset MCU. Start column column must maintained.
Alignment using 262K color mode Column
P11:0 Color
P11:1 Color
BLOCK
Page P10:0
Data P10:1
COMMON OUTPUTS ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7 ROW120 ROW121 ROW122 ROW123 ROW124 ROW125 ROW126 ROW127 ROW128 ROW129 ROW130 ROW131 COL390 COL391 COL392 COL393 COL394 COL395 COL10 COL11
Read Direction
Page
Data
COL0 COL1 COL2 COL3 COL4 COL5
COL6
COL7
COL8
SEGMENT OUTPUTS
Table arrangements 18-bit/pixel, direct write mode.
SSD1789A Series
COL9
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Page Address Hex)
This command enters page address from page register read/write operations. driver supports lines. all, there pages. addresses incremented from start page page page direction scan, column address incremented page address then returned start page. Start page page must maintained.
Output Scan Direction Hex)
This command sets scan direction output allowing layout flexibility module assembly. Please refer Table Page detail mapping. addition, display will have immediate effect once this command issued. That this command sent during normal display, graphic display will have vertical flipping effect.
Data Output Scan Direction Hex)
This command sets DDRAM such that operates display data internal RAM. Normal Inverse page/column/scan directions Data Scan direction either normal inverse display page column address scan direction. column page direction illustrated following figure Figure page example normal inverse page/column/ scan directions. Column Direction P11=0 P11=1 P10=0 P10=1 Page Direction P11=0 P11=1 P10=0 P10=1
Figure Column page scan direction
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Figure Example Normal Inverse page/column/ scan directions parameters following command data output scan direction specifies arrangement selection various gray-scale modes. Please find information arrangement gray scale mode following section. arrangement mode arrangement mode selected according following table. Three selection bits will give eight combinations arrangements. Each combination will specify Red, Green Blue segment output arrangement even page. P22, P21, (POR) LINE Even page page COL0 COL1 COL2 COL3 COL4 COL5 COL6 COL7 COL395
Table Arrangement modes
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Gray scale mode Gray scale selection corresponding data arrangement different interface mode illustrated following table. interface mode (select PS2PS0, Table Data arrangement (D15.D0) mode, (D7.D0) mode denote don't care RRRRRGGGGGGBBBBB RRRRRGGG (byte GGGBBBBB (byte RRRGGGBB RRRRGGGGBBBB**** RRRRGGGG (byte BBBBRRRR (byte GGGGBBBB (byte RRRRRR**GGGGGG** (word BBBBBB**RRRRRR** (word GGGGGG**BBBBBB** (word RRRRRR**GGGGGG** (word ********BBBBBB** (word RRRRRR**GGGGGG** (word BBBBBB********** (word RRRRRR** (byte GGGGGG** (byte BBBBBB** (byte
P31,
Gray Scale selection
P34,
Note
16-bit pixel 8-bit pixel 12-bit pixel
word pixel byte/ pixel byte pixel word pixel byte pixel word pixel word pixel word pixel byte pixel
18-bit pixel
Table Data arrangement different pixel mode
Color Look Table Hex)
This command used color look table (LUT) different pixel mode. 6-bit entries, number entry write depends different pixel mode, each data byte following this command correspond entry LUT.
Pixel mode bit/pixel bit/pixel bit/pixel entry Note data byte each) define data byte each) define data byte each) define with byte define colors Green, while Blue will byte data correspondingly, will byte data correspondingly.
Display Control Hex)
This command used select duty ratio available driving duty selected using this command. driving duty changed from 1/32 1/132.
Area Scroll Hex)
This command specifies portion screen scrolling. command sets starting block address, finishing block address, number specific blocks area scroll mode area scrolling. Please noted that starting block address should smaller than finishing block address. block address increment direction started block such that GDDRAM address corresponds fixed area. Similarly, block address decrement direction started 41st block such that GDDRAM address corresponds bottom fixed area. remaining block address excluding bottom fixed areas assigned scroll plus background areas. area scroll function divided into four parts.
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Part -Specify block address scroll background areas. Specify block screen scroll whole screen scroll. scroll start block address also this block address until scroll start command executed. Part Specify bottom address scroll background areas. Specify screen scroll.
block bottom whole
Part Specify number scrolled blocks number (Top fixed area scroll area) blocks When bottom scroll whole screen scroll chosen, resulted value identical value stated part Part
Specify area scroll type. Altogether there four types area scroll. Please refer Table detail.
Types Area Scroll Center Screen Scroll Screen Scroll Bottom Screen Scroll Whole Screen Scroll
Table Area scrolling selection modes
Center Screen
Screen
Bottom Screen
Whole Screen Scroll
Fixed Area
Scroll Area
Figure Area scrolling selection modes area scroll function executed prompt area scroll command following changing start block address scroll start command. above Figure illustrates operation model scrolling function.
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Example: Center screen scroll 1/96 duty (display range: lines blocks) Description Command Area Scroll lines (block block specified fixed area block address Number lines fixed area lines (block block specified bottom fixed area Bottom block address (number lines bottom fixed area lines (block block specified scroll area Number specified block block address (number lines scroll area/4) lines (block block specified background areas area scroll mode Center screen mode Scroll start (Scroll range form 1EH)
Data
DDRAM:
panel
blocks line
Fixed area Display area Scroll area Background area
Figure GDDRAM updates area scrolling
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Block Line GDDRAM Content Area Scroll Start Scroll Start:
lines Panel COM0
Scroll Area
Background Area Bottom Area
COM95 COM0
Example Program Specified Center Scroll mode. Void center_scroll(void) //Set Comm_out (0xCA);
COM95 COM0
Data_out (0x17); Data_out(0x00); Scroll Start: //Set Area Scroll Comm_out(0xAA); Data_out(0x02); Block Address Data_out(0x1E); Specified Bottom Block Address Data_out(0x15); //Number Specified Block Data_out(0x00); //Center Screen Mode //Set Scroll Start (I=0x02; I<=0x1E; I++) Comm_out(0xAB); //set scroll start Data_out(I); Delay (200); //delay 200ms Scroll Start:
Data_out (0x00);
COM95 COM0
COM95
Figure Example center scroll mode
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Scroll Start Hex)
This command specifies starting block address area scrolling then executes area scroll changing start block address dynamically. Start block block must maintained. Please noted that scroll start command should executed after area scroll command.
Power Control Register Hex)
This command turns on/off various power circuits associated with chip. There three power sub-circuits (reference voltage generator, internal regulator voltage follower) could turned on/off this command. addition, configuration internal primary booster (4X/5X/6X/7X) selected this command.
9.10 Contrast Level Internal Regulator Resistor Ratio Hex)
This command adjusts contrast panel changing driving voltage, VOUT, provided On-Chip power circuits. VOUT with steps (6-bit) contrast control register compound commands. Please refer Figure contrast control process flow diagram.
Contrast Control Register Contrast Level Data Changes Complete?
Figure Contrast Control Flow Segment Re-map This command also sets feedback gain internal regulator. There altogether internal regulator gains, which used adjustment VOUT level. This command enable eight internal resistor (IRS) settings different regulator gains when using internal regulator resistor network. Contrast Control Voltage Range curves referred following formula:
VOUT /R1) VCON VCON 260) VREF where VREF 1.105V TC0,
Please refer Table 15-DC Characteristic VREF other values.
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Contrast Control Voltage Range, Vdd=Vci=2.7V,
Vout
Contrast
Figure Contrast Control Voltage Range Curve (Vdd=Vci=2.7V, TC0)
9.11 Increment/Decrement contrast (D6/D7 Hex)
This command increase contrast step Hex) decrease contrast step Hex). most convenient change contrast display programming.
9.12 Normal/Inverse Display (A6/A7 Hex)
This command turns display either normal Hex) inverse (A7). normal display mode, data indicates illumination corresponding pixel normal white panel. inverse display mode, data will turn pixel. should noted that icon line affected. icon line inversed this command. Example: normal white display panel (Set Normal Display: A6Hex): Content Color White Black Green Blue normal black display panel (Set Normal Display: A7Hex): Content Color White Black Green Blue
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9.13 Enter Partial Display Hex)
This command following parameters specify display area partial display mode. following figure shows display non-display area when partial display mode executed.
Display area
(Partial Display Area) Non-display area
Figure Partial display mode
9.14 Exit Partial Display Hex)
This command exits partial display mode.
9.15 Display On/Off (AF/AE Hex)
This command used turn display Hex) Hex). When display issued with entire display power save mode will entered.
9.16 Enter/Exit sleep mode (95/94 Hex)
This command enter Hex) exit Hex) sleep mode.
9.17 Enable/Disable internal oscillator (D1/D2 Hex)
This command enables Hex) disables Hex) internal oscillator. internal oscillator turned after reset.
9.18 Temperature compensation coefficient Hex)
This command sets average temperature gradients. Four sets average temperature gradients selected. Please refer command table detail description average temperature gradients. default value temperature gradient -0.20
9.19 First Display Hex)
This command first display data ROW0 ROW131.
9.20 Enable/Disable Vout discharging path Hex)
This command enable/disable Vout discharging path. Vout discharging path enabled when display changing from high (eg. mux) (eg. mux) which Vout need drop voltage short time.
9.21 Hex)
command causing chip takes Operation.
9.22 Write display data mode Hex)
This command used execute write display data mode. display data byte directly written GDDRAM. Please noted that signal should high during display data written GDDRAM.
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9.23 Read display data mode Hex)
This command used execute read display data mode. display data byte directly read from GDDRAM. Please noted that signal should high during display data from GDDRAM.
9.24 biasing ratio Hex)
This command selects suitable bias ratio (1/7 1/10) required driving particular panel use.
9.25 Frame Frequency Hex)
This command specifies frame frequency minimize flickering main frequency. frequency after POR.
9.26 N-line inversion Hex)
Number line inversion this command reducing crosstalk noise. 64-line inversion operations could selected. POR, this operation 10000b lines). should noted that total number (including icon line) should multiple inversion number (n). else, some lines will change their polarity during frame change. n-line counter such that will reset display frame (POR).
9.27 Select PWM/FRC Hex)
This command Pulse Width Modulation, Frame Rate Control FRC.
9.28 setting Hex)
(One Time Programming) method adjust VOUT. order eliminate variations module term contrast level, used achieve best contrast every modules. Each programmed time. setting programming should include major steps. Find offset programming following,
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Step Find offset Hardware Reset (sending active reset pulse pin) Send original initialization routines display test patterns Adjust contrast value (C:0x81, D:0x00~0x3F, 0x00 0x07) until there best visual contrast setting steps Contrast value best visual contrast Contrast value original initialization
Example Contrast value original initialization 0x20 Contrast value best original initialization 0x24 offset value 0x24 0x20 setting command should 0xF6, 0x12, 0x0A) Example Contrast value original initialization 0x20 Contrast value best original initialization 0x1B setting 0x1B 0x20 setting command should (C:0xF6, 0x1D, 0x2A)
Step programming Hardware Reset (sending active reset pulse pin) Enable Oscillator 0xD1) Exit Sleep Mode 0x94) Connect external VOUT (see diagram below) Send setting commands that find step 0xF6, 0x10~0x1F, 0x0A~0x2A) (10)Send programming command 0xF8) (11)Wait least seconds (12)Hardware Reset (13)Verify result repeating step
SSD1789A
(12)
VOUT
14.5-15.5V
Note: 4.7u
Figure programming circuitry
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Start Step Step
Hardware reset Send original initialization routines iii) display test patterns
Hardware reset Enable oscillator
Adjust contrast level best visual level
Connect external voltage (14.5~15.5V) VOUT pins
Accept contrast level panel?
Send setting commands Send programming command iii) Wait Hardware reset
setting steps Adjusted contrast value Original contrast value
Send original initialization routines display test patterns iii) Inspect contrast
Figure Flow chart programming Procedure
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Example program Find offset:
Hardware reset sending active reset pulse COMMAND(0XD1); COMMAND(0X94); COMMAND(0X20); DATA(0x0F); COMMAND(0XFB) DATA(0X2) COMMAND(0X81) DATA(0X14) DATA(0X05) \\Enable oscillator; exit sleep mode; turn reference voltage generator, internal regulator voltage follower; Select booster level. Biasing ratio \\Set target gain contrast. contrast Internal Regulator Gain 11.57
target display contents COMMAND(0X15) DATA(0x00) DATA(0X83) COMMAND(0X75) DATA(0X00) DATA(0X83) COMMAND(0X5C) DATA(.) COMMAND(0xAF) display column address start column address column address page address start page address page address write target content GDDRAM
offset calculation. target offset value Hardware reset sending active reset pulse COMMAND(0XD1) COMMAND(0x94) Enable Oscillator Exit Sleep Mode
programming:
Connect external VOUT (14.5V~15.5V) COMMAND(0XF6) DATA(0X11) DATA(0x2A) offset value (0011) 00011 X3X2X1X0Y5 where X3X2X1X0Y5 offset value
COMMAND(0XF8)
Send programming command.
Wait least seconds programming wait time.
Verify result:
After programming, procedure repeated inspection contrast panel.
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9.29 Draw Line Hex)
Given starting point (X1, ending point (X2, Y2), line will drawn with color specified.
following example illustrates line drawing procedure. Enter "draw line mode" execute command starting X-coordinates, E.g., 00H. starting Y-coordinates, E.g., 00H. finishing X-coordinates, E.g., finishing Y-coordinates, E.g., color (0,1,0) e.g., followed Result: green line will drawn between coordinates (0,0) (1,1) Remark: 131; 131;
9.30 Fill Enable/Disable Hex)
This command allows fill color option enabled disabled. This command applicable Draw Rectangle feature. When selection "0", fill color option disabled. When selection "1", fill color option enabled.
9.31 Draw rectangle Hex)
Given starting point (X1, ending point (X2, Y2), specify width height rectangle that will drawn with color specified. Remarks: fill color option disabled, enclosed area will filled.
following example illustrates rectangle drawing procedure. Enter "draw rectangle mode" execute command starting X-coordinates, E.g., 00H. starting Y-coordinates, E.g., 00H. finishing X-coordinates, E.g., finishing Y-coordinates, E.g., color (1,0,0) e.g., following filled color (0,1,0) e.g., following Result: rectangle will drawn (0,0) (2,2), filled green with border Remark: 131; 131;
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9.32 Draw Circle Hex)
Given center point (X1, radius circle will drawn with color specified. Remarks: fill color option disabled, enclosed area will filled.
color fill color
following example illustrates rectangle drawing procedure. Enter "draw circle mode" execute command center X-coordinates, E.g., 40H. center Y-coordinates, E.g., 40H. radius, E.g., color (1,0,0) e.g., following filled color (0,1,0) e.g., following Result: circle will drawn with center (64,64) radius filled green with border Remark: X1,Y1
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9.33 Copy Hex)
Copy rectangular region defined starting point (X1, ending point (X2, location (X3, Y3). There possible results with command copy executed depending setting start point coordinates point coordinates.
following example illustrates copy procedure. Case overlap region will superimpose. Enter "copy mode" execute command starting X-coordinates, E.g., 00H. starting Y-coordinates, E.g., 00H. finishing X-coordinates, E.g., finishing Y-coordinates, E.g., X-coordinates, E.g., Y-coordinates, E.g.,
Case original content remains unchanged
Enter "copy mode" execute command starting X-coordinates, E.g., 00H. starting Y-coordinates, E.g., 00H. finishing X-coordinates, E.g., finishing Y-coordinates, E.g., X-coordinates, E.g., Y-coordinates, E.g., Remark: 131; 131;
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9.34 Window Hex)
This command will window area specify starting point (X1, ending point (X2, Y2). After execution this command, selected window area will dimmed white. Additional execution this command over same window area will change data content. Remark: 131; 131;
9.35
Clear Window Hex)
This command sets window area specify starting point (X1, ending point (X2, clear window display. GDDRAM content window will zero. Remark: 131; 131;
9.36 Status register read
following parameters monitored status read register. Various area scroll mode Column scan direction Page scan direction Display ON/OFF Sleep mode ON/OFF Display Normal/Inverse Partial display mode ON/OFF
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MAXIMUM RATINGS
Table Maximum Ratings (Voltage Referenced VSS) Symbol VOUT Tstg Parameter Supply Voltage Input Voltage Current Drain Excluding Operating Temperature Storage Temperature Input Resistance Value -0.3 +4.0 -0.3 VSS-0.3 +150 1000 Unit
Maximum ratings those values beyond which damages device occur. Functional operation should restricted limits Electrical Characteristics tables Description section This device contains circuitry protect inputs against damage high static voltages electric fields; however, advised that normal precautions taken avoid application voltage higher than maximum rated voltages this high impedance circuit. proper operation recommended that VOUT constrained range VOUT. Reliability operation enhanced unused input connected appropriate logic voltage level (e.g., either VDD). Unused outputs must left open. This device light sensitive. Caution should taken avoid exposure this device light source during normal operation. This device radiation protected.
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CHARACTERISTICS
Table Characteristics (Unless otherwise specified, Voltage Referenced VSS, 3.6V, 85°C) Symbol VDDIO Parameter System power supply pins logic block Range Test Condition Recommend Operating Voltage Possible Operating Voltage Recommend Operating Voltage Power supply pins Possible Operating Voltage Booster Reference Supply Recommend Operating Voltage Voltage Range Possible Operating Voltage 2.7V, Voltage Generator DC-DC 16-bit 8080 parallel Access Mode Supply Current writing AAAA HTcyc =3MHz, Typ. Drain (VDD Pins) Osc. Freq., Display panel attached. 2.7V, VOUT 16V, Voltage Generator DC-DC Display Mode Supply Current Converter Enabled, R/W(WR) Halt, Drain (VDD Pins) Typ. Osc. Freq., Display panel attached. 2.7V, Driving Waveform Sleep Mode Supply Current Off, Oscillator Off, R/W(WR) halt. Drain (VDD Pins) Display Voltage Generator Enabled, DC-DC Converter Driving Voltage Generator Enabled, Typ. Osc. Freq., Output (VOUT Pin) Regulator Enabled, Divider Enabled. -0.13%/ -0.15%/ Internal Reference Voltage -0.20%/ (POR) (T=25 -0.25%/ Logic High Output Voltage Logic Output Voltage Logic High Input voltage Logic Input voltage Logic High Output Current VOUT VDD-0.4V Source Logic Output Current Drain VOUT 0.4V Logic Output Tri-state Current Drain Source Logic Input Current Logic Pins Input Capacitance Regulator Enabled, Internal Variation VOUT Output (VDD Contrast Control Enabled, fixed) Contrast Control Register Iout=-100µA Iout=100µA Unit
1150
IDP2
1000
ISLEEP
VOUT
1.072 1.080 1.101 1.117 0.9* 0.8* -0.10 -0.14 -0.18 -0.23
1.105 1.113 1.135 1.152 -0.13 -0.15 -0.20 -0.25
1.138 1.146 1.169 1.187 0.1*VDD 0.2* -0.14 -0.18 -0.23 -0.28
VREF VOH1 VOL1 VIH1 VIL1 IIL/IIH
VOUT
SEG/COM output resistance Average Temperature Gradient Flat Temperature Coefficient Temperature Coefficient Voltage Regulator Enabled Temperature Coefficient (POR) Temperature Coefficient *The formula temperature coefficient TC(%) Vref Vref Vref
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CHARACTERISTICS
Table Characteristics (Unless otherwise specified, Voltage Referenced VSS, 2.7V, Symbol FFRM Parameter Frame Frequency for: Mode Test Condition Graphic Display Mode, Display Internal Oscillator Enabled. frequency. 7-line inversion. frame frequency calculated (Period 7-line) 71.5 73.5 75.5 Unit
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Table Parallel Timing Characteristics 85°C, 2.6V 3.3V) Symbol tcycle tDSW tDHW tACC Parameter Clock Cycle Time (write cycle) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Data Access Time Output Hold time Chip Select High Pulse Width (write cycle) Chip Select Pulse Width (write cycle) Unit
tcycle
tDHW
tDSW D0~D15 (WRITE) tACC (READ) Valid Data Figure 8-bit/16-bit Parallel 6800-series Interface Timing Characteristics Valid Data tDHR
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Table Parallel Timing Characteristics 85°C, 2.6V 3.3V) Symbol tcycle tDSW tDHW tACC Write Cycle
tcycle
Parameter Clock Cycle Time (write cycle) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Data Access Time Output Hold time Chip Select High Pulse Width (write cycle) Chip Select Pulse Width (write cycle)
Unit
tDSW
tDHW
D0~D15 (WRITE) Read Cycle
Valid Data
tcycle
tACC tDHR Valid Data
D0~D15 (READ)
Figure 8-bit/16-bit Parallel 8080-series Interface Timing Characteristics
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Table Parallel Timing Characteristics 85°C, 2.4V) Symbol tcycle tDSW tDHW tACC Parameter Clock Cycle Time (write cycle) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Data Access Time Output Hold time Chip Select High Pulse Width (write cycle) Chip Select Pulse Width (write cycle) Unit
tcycle
tDHW
tDSW D0~D15 (WRITE) tACC D0~D7 (READ) Valid Data Figure 8-bit/16-bit Parallel 6800-series Interface Timing Characteristics Valid Data tDHR
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Table Parallel Timing Characteristics 85°C, 2.4V) Symbol tcycle tDSW tDHW tACC Write Cycle
tcycle
Parameter Clock Cycle Time (write cycle) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Data Access Time Output Hold time Chip Select High Pulse Width (write cycle) Chip Select Pulse Width (write cycle)
Unit
tDSW
tDHW
D0~D15 (WRITE) Read Cycle
Valid Data
tcycle
tACC tDHR Valid Data
D0~D7 (READ)
Figure 8-bit/16-bit Parallel 8080-series Interface Timing Characteristics
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Table Serial Timing Characteristics 85°C, 2.6V 3.6V) Symbol tcycle fCLK tCSS tCSH tDSW tOHW tCLKL tCLKH Parameter Clock Cycle Time Serial Clock Cycle Time Clock tolerance Register select Setup Time Register select Hold Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Time Clock High Time Unit
tCSH tcycle
tCSS
tCLKL
tCLKH
SCK(D6)
tDSW tDHW
SDA(D7)
Valid Data
SCK(D6)
SDA(D7)
Figure wire Serial Timing Characteristics (PS2=PS1=PS0=L)
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Table Serial Timing Characteristics 85°C, 2.6V 3.6V) Symbol tcycle fCLK tCSS tCSH tDSW tOHW tCLKL tCLKH Parameter Clock Cycle Time Serial Clock Cycle Time Clock tolerance Register select Setup Time Register select Hold Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Time Clock High Time Unit
tCSS tcycle
tCSH
tCLKL
tCLKH
SCK(D6)
tDSW
tDHW
SDA(D7)
Valid Data
SCK(D6)
SDA(D7)
Figure wire Serial Timing Characteristics (PS2=PS1=L, PS0=H)
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Table Serial Timing Characteristics 85°C, 2.4V) Symbol tcycle fCLK tCSS tCSH tDSW tOHW tCLKL tCLKH Parameter Clock Cycle Time Serial Clock Cycle Time Clock tolerance Register select Setup Time Register select Hold Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Time Clock High Time Unit
tCSH tcycle
tCSS
tCLKL
tCLKH
SCK(D6)
tDSW
tDHW
SDA(D7)
Valid Data
SCK(D6)
SDA(D7)
Figure wire Serial Timing Characteristics (PS2=PS1=PS0=L)
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Table Serial Timing Characteristics 85°C, 2.4V) Symbol tcycle fCLK tCSS tCSH tDSW tOHW tCLKL tCLKH Parameter Clock Cycle Time Serial Clock Cycle Time Clock tolerance Register select Setup Time Register select Hold Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Time Clock High Time Unit
tCSS tcycle
tCSH
tCLKL
tCLKH
SCK(D6)
tDSW
tDHW
SDA(D7)
Valid Data
SCK(D6)
SDA(D7)
Figure wire Serial Timing Characteristics (PS2=PS1=L, PS0=H)
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APPLICATION EXAMPLES
COM/SEG connection SSD1789A 128x128 application: Note: 1.write page (128 page) COM0 COM65, COM70 COM131 3.issue command (C)BB-(D)01 scan direction ROW0-ROW65 COM0 COM65 ROW66-ROW131 COM131-COM66 PANEL COM66 COM127
SEG0 SEG383
COM0 COM65
COL0 COL383 COL384 COL395
ROW70 ROW69 ROW68 ROW67 ROW66
ROW65 ROW64 ROW63 ROW2 ROW1 ROW0
ROW130 ROW131
SSD1789A
VOUTD3
RVSS CVSS LCDVSS
VHREF VCIX2
VLREF
VDDIO
VOUT
C1,C2 C6,C7 C11,C12 C13,C14
value (25V) (10V) 0.1uF (6V) (10V) (6V) 4.7uF (25V) (25V) (25V) (25V)
size 0805 0603 0603 0603 0603 1206 0805 0805 0805
VDD=VDDIO=VCI=2.775V PS2='H', PS1=PS0='L' (16-bit 6800 bus)
Figure Application example
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Figure VDD, VDDIO, connection example 2.7V
RES, PS2, PS1, PS0, D/C, D0-D15
VDDIO
SSD1789A
a)Normal Application; VDD=VDDIO=VCI =VDD(MCU) =2.7V
1.8V
2.7V
RES, PS2, PS1, PS0, D/C, D0-D15
VDDIO
SSD1789A
Voltage MCU; =VCI =2.7V, VDDIO =VDD(MCU)=1.8V
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SSD1789AZ TRAY DIMENSIONS
Spec
+0.2 76.0 /-0.1 +0.2 68.0 /-0.1 4.2060.1 22.3060.1 3.2160.1 +0.1 21.20 +0.1 1.98 0.6260.05
(mil) (2992) (2677) (165) (878) (126) (835) (78) (24) Figure SSD1789AZ Tray Dimension
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SSD1789A Series
Solomon Systech reserves right make changes without further notice products herein. Solomon Systech makes warranty, representation guarantee regarding suitability products particular purpose, does Solomon Systech assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters vary different applications. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Solomon Systech does convey license under patent rights rights others. Solomon Systech products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Solomon Systech product could create situation where personal injury death occur. Should Buyer purchase Solomon Systech products such unintended unauthorized application, Buyer shall indemnify hold Solomon Systech offices, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Solomon Systech negligent regarding design manufacture part
http://www.solomon-systech.com
SSD1789A Series
69/69
2004
Solomon Systech
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